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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1756785138248124100 From: Brian Cain Define TCG overrides for start, stop, wait, resume instructions. Reviewed-by: Taylor Simpson Signed-off-by: Brian Cain --- target/hexagon/gen_tcg_sys.h | 18 ++++++++++++++++++ target/hexagon/helper.h | 4 ++++ target/hexagon/op_helper.c | 20 ++++++++++++++++++++ 3 files changed, 42 insertions(+) diff --git a/target/hexagon/gen_tcg_sys.h b/target/hexagon/gen_tcg_sys.h index 642ca3d3ff..942d07b401 100644 --- a/target/hexagon/gen_tcg_sys.h +++ b/target/hexagon/gen_tcg_sys.h @@ -63,4 +63,22 @@ tcg_gen_extrh_i64_i32(ctx->t_sreg_new_value[HEX_SREG_SGP1], tmp); \ } while (0) =20 +#define fGEN_TCG_Y2_wait(SHORTCODE) \ + do { \ + RsV =3D RsV; \ + gen_helper_wait(tcg_env, tcg_constant_tl(ctx->pkt->pc)); \ + } while (0) + +#define fGEN_TCG_Y2_resume(SHORTCODE) \ + gen_helper_resume(tcg_env, RsV) + +#define fGEN_TCG_Y2_start(SHORTCODE) \ + gen_helper_start(tcg_env, RsV) + +#define fGEN_TCG_Y2_stop(SHORTCODE) \ + do { \ + RsV =3D RsV; \ + gen_helper_stop(tcg_env); \ + } while (0) + #endif diff --git a/target/hexagon/helper.h b/target/hexagon/helper.h index 2fe4440ddc..ada520bd52 100644 --- a/target/hexagon/helper.h +++ b/target/hexagon/helper.h @@ -124,4 +124,8 @@ DEF_HELPER_2(greg_read_pair, i64, env, i32) DEF_HELPER_3(sreg_write, void, env, i32, i32) DEF_HELPER_3(sreg_write_pair, void, env, i32, i64) DEF_HELPER_3(setprio, void, env, i32, i32) +DEF_HELPER_2(start, void, env, i32) +DEF_HELPER_1(stop, void, env) +DEF_HELPER_2(wait, void, env, i32) +DEF_HELPER_2(resume, void, env, i32) #endif diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index 01e2677a62..57d8e8305b 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -1367,6 +1367,26 @@ uint32_t HELPER(iassignr)(CPUHexagonState *env, uint= 32_t src) g_assert_not_reached(); } =20 +void HELPER(start)(CPUHexagonState *env, uint32_t imask) +{ + g_assert_not_reached(); +} + +void HELPER(stop)(CPUHexagonState *env) +{ + g_assert_not_reached(); +} + +void HELPER(wait)(CPUHexagonState *env, target_ulong PC) +{ + g_assert_not_reached(); +} + +void HELPER(resume)(CPUHexagonState *env, uint32_t mask) +{ + g_assert_not_reached(); +} + uint32_t HELPER(getimask)(CPUHexagonState *env, uint32_t tid) { g_assert_not_reached(); --=20 2.34.1