From nobody Sun Sep 28 15:28:19 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756714787054322.63302809895174; Mon, 1 Sep 2025 01:19:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uszl1-0004Ok-M7; Mon, 01 Sep 2025 04:19:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uszky-0004OA-C0 for qemu-devel@nongnu.org; Mon, 01 Sep 2025 04:19:17 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uszku-0006v4-GM for qemu-devel@nongnu.org; Mon, 01 Sep 2025 04:19:16 -0400 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8Dx+tH1VrVoBEoFAA--.10945S3; Mon, 01 Sep 2025 16:19:01 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJAxVOT0VrVotoZ2AA--.46439S2; Mon, 01 Sep 2025 16:19:01 +0800 (CST) From: Bibo Mao To: Song Gao Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Peter Maydell , Xianglai Li , qemu-devel@nongnu.org Subject: [PATCH v2] hw/loongarch/virt: Add reset interface for virt-machine Date: Mon, 1 Sep 2025 16:19:00 +0800 Message-Id: <20250901081900.2931303-1-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJAxVOT0VrVotoZ2AA--.46439S2 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1756714790163116600 Content-Type: text/plain; charset="utf-8" With generic cpu reset interface, pc register is entry of FLASH for UEFI BIOS. However with direct kernel booting requirement, there is a little different, pc register of primary cpu is entry address of ELF file. At the same time with requirement of cpu hotplug, hot-added CPU should register reset interface for this cpu object. Now reset callback is not registered for hot-added CPU. With this patch reset callback for CPU is register when CPU instance is created, and reset interface is added for virt-machine board. In reset interface of virt-machine, reset for direct kernel booting requirement is called. Signed-off-by: Bibo Mao --- v1 ... v2: 1. Add qemu_unregister_reset() in function loongarch_cpu_unrealizefn(), remove reset callback if vCPU is unrealized. --- Signed-off-by: Bibo Mao --- hw/loongarch/boot.c | 9 +-------- hw/loongarch/virt.c | 14 ++++++++++++++ include/hw/loongarch/boot.h | 1 + target/loongarch/cpu.c | 11 +++++++++++ 4 files changed, 27 insertions(+), 8 deletions(-) diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c index 14d6c52d4e..4919758a20 100644 --- a/hw/loongarch/boot.c +++ b/hw/loongarch/boot.c @@ -324,12 +324,11 @@ static int64_t load_kernel_info(struct loongarch_boot= _info *info) return kernel_entry; } =20 -static void reset_load_elf(void *opaque) +void reset_load_elf(void *opaque) { LoongArchCPU *cpu =3D opaque; CPULoongArchState *env =3D &cpu->env; =20 - cpu_reset(CPU(cpu)); if (env->load_elf) { if (cpu =3D=3D LOONGARCH_CPU(first_cpu)) { env->gpr[4] =3D env->boot_info->a0; @@ -429,12 +428,6 @@ static void loongarch_direct_kernel_boot(MachineState = *ms, void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *i= nfo) { LoongArchVirtMachineState *lvms =3D LOONGARCH_VIRT_MACHINE(ms); - int i; - - /* register reset function */ - for (i =3D 0; i < ms->smp.cpus; i++) { - qemu_register_reset(reset_load_elf, LOONGARCH_CPU(qemu_get_cpu(i))= ); - } =20 info->kernel_filename =3D ms->kernel_filename; info->kernel_cmdline =3D ms->kernel_cmdline; diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index b15ada2078..4fc8506c10 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -1199,6 +1199,19 @@ static int64_t virt_get_default_cpu_node_id(const Ma= chineState *ms, int idx) } } =20 +static void virt_reset(MachineState *machine, ResetType type) +{ + CPUState *cs; + + /* Reset all devices including CPU devices */ + qemu_devices_reset(type); + + /* Reset PC and register context for kernel direct booting method */ + CPU_FOREACH(cs) { + reset_load_elf(LOONGARCH_CPU(cs)); + } +} + static void virt_class_init(ObjectClass *oc, const void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); @@ -1223,6 +1236,7 @@ static void virt_class_init(ObjectClass *oc, const vo= id *data) mc->has_hotpluggable_cpus =3D true; mc->get_hotplug_handler =3D virt_get_hotplug_handler; mc->default_nic =3D "virtio-net-pci"; + mc->reset =3D virt_reset; hc->plug =3D virt_device_plug_cb; hc->pre_plug =3D virt_device_pre_plug; hc->unplug_request =3D virt_device_unplug_request; diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h index 9819f7fbe3..386b4406ad 100644 --- a/include/hw/loongarch/boot.h +++ b/include/hw/loongarch/boot.h @@ -114,5 +114,6 @@ struct memmap_entry { }; =20 void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *i= nfo); +void reset_load_elf(void *opaque); =20 #endif /* HW_LOONGARCH_BOOT_H */ diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 3a7621c0ea..61c8acb3c2 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -652,6 +652,13 @@ static void loongarch_cpu_disas_set_info(CPUState *s, = disassemble_info *info) info->print_insn =3D print_insn_loongarch; } =20 +#ifndef CONFIG_USER_ONLY +static void loongarch_cpu_reset_cb(void *opaque) +{ + cpu_reset((CPUState *) opaque); +} +#endif + static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); @@ -668,6 +675,9 @@ static void loongarch_cpu_realizefn(DeviceState *dev, E= rror **errp) =20 qemu_init_vcpu(cs); cpu_reset(cs); +#ifndef CONFIG_USER_ONLY + qemu_register_reset(loongarch_cpu_reset_cb, dev); +#endif =20 lacc->parent_realize(dev, errp); } @@ -678,6 +688,7 @@ static void loongarch_cpu_unrealizefn(DeviceState *dev) =20 #ifndef CONFIG_USER_ONLY cpu_remove_sync(CPU(dev)); + qemu_unregister_reset(loongarch_cpu_reset_cb, dev); #endif =20 lacc->parent_unrealize(dev); base-commit: 91589bcd9fee0e66b241d04e5f37cd4f218187a2 --=20 2.39.3