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Fri, 29 Aug 2025 06:00:06 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHeRExpKznG0FMDzIDcV7empYGImPiru2lwiaqSFyXZr9Lf9EUeIxynWnRcR61ivvoyNeEtMw== X-Received: by 2002:a05:6000:178b:b0:3c9:a722:e189 with SMTP id ffacd0b85a97d-3c9a722e3e6mr13429039f8f.62.1756472405790; Fri, 29 Aug 2025 06:00:05 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 11/28] hw/i386/pc_piix.c: simplify RAM size logic in pc_init_isa() Date: Fri, 29 Aug 2025 14:59:18 +0200 Message-ID: <20250829125935.1526984-12-pbonzini@redhat.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250829125935.1526984-1-pbonzini@redhat.com> References: <20250829125935.1526984-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1756568641880116600 From: Mark Cave-Ayland All isapc machines must have 32-bit CPUs and so the RAM split logic can be = hardcoded accordingly. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daud=C3=A9 Link: https://lore.kernel.org/r/20250828111057.468712-12-mark.caveayland@nu= tanix.com Signed-off-by: Paolo Bonzini --- hw/i386/pc_piix.c | 58 ++++------------------------------------------- 1 file changed, 4 insertions(+), 54 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index daf63a326b6..0bc033943ca 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -445,7 +445,6 @@ static void pc_init_isa(MachineState *machine) GSIState *gsi_state; MemoryRegion *ram_memory; MemoryRegion *rom_memory =3D system_memory; - ram_addr_t lowmem; uint64_t hole64_size =3D 0; =20 /* @@ -480,65 +479,16 @@ static void pc_init_isa(MachineState *machine) } =20 /* - * Calculate ram split, for memory below and above 4G. It's a bit - * complicated for backward compatibility reasons ... - * - * - Traditional split is 3.5G (lowmem =3D 0xe0000000). This is the - * default value for max_ram_below_4g now. - * - * - Then, to gigabyte align the memory, we move the split to 3G - * (lowmem =3D 0xc0000000). But only in case we have to split in - * the first place, i.e. ram_size is larger than (traditional) - * lowmem. And for new machine types (gigabyte_align =3D true) - * only, for live migration compatibility reasons. - * - * - Next the max-ram-below-4g option was added, which allowed to - * reduce lowmem to a smaller value, to allow a larger PCI I/O - * window below 4G. qemu doesn't enforce gigabyte alignment here, - * but prints a warning. - * - * - Finally max-ram-below-4g got updated to also allow raising lowme= m, - * so legacy non-PAE guests can get as much memory as possible in - * the 32bit address space below 4G. - * - * - Note that Xen has its own ram setup code in xen_ram_init(), - * called via xen_hvm_init_pc(). - * - * Examples: - * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high - * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high - * qemu -M pc,max-ram-below-4g=3D2G -m 4G -> 2048M low, 2048M h= igh - * qemu -M pc,max-ram-below-4g=3D4G -m 3968M -> 3968M low (=3D4G-1= 28M) + * There is no RAM split for the isapc machine */ if (xen_enabled()) { xen_hvm_init_pc(pcms, &ram_memory); } else { ram_memory =3D machine->ram; - if (!pcms->max_ram_below_4g) { - pcms->max_ram_below_4g =3D 0xe0000000; /* default: 3.5G */ - } - lowmem =3D pcms->max_ram_below_4g; - if (machine->ram_size >=3D pcms->max_ram_below_4g) { - if (pcmc->gigabyte_align) { - if (lowmem > 0xc0000000) { - lowmem =3D 0xc0000000; - } - if (lowmem & (1 * GiB - 1)) { - warn_report("Large machine and max_ram_below_4g " - "(%" PRIu64 ") not a multiple of 1G; " - "possible bad performance.", - pcms->max_ram_below_4g); - } - } - } =20 - if (machine->ram_size >=3D lowmem) { - x86ms->above_4g_mem_size =3D machine->ram_size - lowmem; - x86ms->below_4g_mem_size =3D lowmem; - } else { - x86ms->above_4g_mem_size =3D 0; - x86ms->below_4g_mem_size =3D machine->ram_size; - } + pcms->max_ram_below_4g =3D 3.5 * GiB; + x86ms->above_4g_mem_size =3D 0; + x86ms->below_4g_mem_size =3D machine->ram_size; } =20 x86_cpus_init(x86ms, pcmc->default_cpu_version); --=20 2.51.0