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Remove the heap_base and heap_limit fields from TaskState. Replace with static variables within do_common_semihosting. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/qemu.h | 5 ----- linux-user/aarch64/cpu_loop.c | 7 ------- linux-user/arm/cpu_loop.c | 25 +++++++++++-------------- linux-user/m68k/cpu_loop.c | 8 -------- linux-user/riscv/cpu_loop.c | 4 ---- semihosting/arm-compat-semi.c | 22 +++++++++------------- 6 files changed, 20 insertions(+), 51 deletions(-) diff --git a/linux-user/qemu.h b/linux-user/qemu.h index b6621536b3..4d6fad28c6 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -121,11 +121,6 @@ struct TaskState { abi_ulong child_tidptr; #ifdef TARGET_M68K abi_ulong tp_value; -#endif -#if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_RISCV) - /* Extra fields for semihosted binaries. */ - abi_ulong heap_base; - abi_ulong heap_limit; #endif int used; /* non zero if used */ struct image_info *info; diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index b65999a75b..030a630c93 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -140,9 +140,6 @@ void cpu_loop(CPUARMState *env) void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { ARMCPU *cpu =3D env_archcpu(env); - CPUState *cs =3D env_cpu(env); - TaskState *ts =3D get_task_state(cs); - struct image_info *info =3D ts->info; int i; =20 if (!(arm_feature(env, ARM_FEATURE_AARCH64))) { @@ -167,8 +164,4 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) if (cpu_isar_feature(aa64_pauth, cpu)) { qemu_guest_getrandom_nofail(&env->keys, sizeof(env->keys)); } - - ts->heap_base =3D info->brk; - /* This will be filled in on the first SYS_HEAPINFO call. */ - ts->heap_limit =3D 0; } diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index e40d6beafa..9d54422736 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -492,19 +492,16 @@ void target_cpu_copy_regs(CPUArchState *env, target_p= t_regs *regs) for(i =3D 0; i < 16; i++) { env->regs[i] =3D regs->uregs[i]; } -#if TARGET_BIG_ENDIAN - /* Enable BE8. */ - if (EF_ARM_EABI_VERSION(info->elf_flags) >=3D EF_ARM_EABI_VER4 - && (info->elf_flags & EF_ARM_BE8)) { - env->uncached_cpsr |=3D CPSR_E; - env->cp15.sctlr_el[1] |=3D SCTLR_E0E; - } else { - env->cp15.sctlr_el[1] |=3D SCTLR_B; - } - arm_rebuild_hflags(env); -#endif =20 - ts->heap_base =3D info->brk; - /* This will be filled in on the first SYS_HEAPINFO call. */ - ts->heap_limit =3D 0; + if (TARGET_BIG_ENDIAN) { + /* Enable BE8. */ + if (EF_ARM_EABI_VERSION(info->elf_flags) >=3D EF_ARM_EABI_VER4 + && (info->elf_flags & EF_ARM_BE8)) { + env->uncached_cpsr |=3D CPSR_E; + env->cp15.sctlr_el[1] |=3D SCTLR_E0E; + } else { + env->cp15.sctlr_el[1] |=3D SCTLR_B; + } + arm_rebuild_hflags(env); + } } diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 3aaaf02ca4..23693f3358 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -94,10 +94,6 @@ void cpu_loop(CPUM68KState *env) =20 void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { - CPUState *cpu =3D env_cpu(env); - TaskState *ts =3D get_task_state(cpu); - struct image_info *info =3D ts->info; - env->pc =3D regs->pc; env->dregs[0] =3D regs->d0; env->dregs[1] =3D regs->d1; @@ -116,8 +112,4 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) env->aregs[6] =3D regs->a6; env->aregs[7] =3D regs->usp; env->sr =3D regs->sr; - - ts->heap_base =3D info->brk; - /* This will be filled in on the first SYS_HEAPINFO call. */ - ts->heap_limit =3D 0; } diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 541de765ff..2dd30c7b28 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -108,8 +108,4 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) error_report("Incompatible ELF: RVE cpu requires RVE ABI binary"); exit(EXIT_FAILURE); } - - ts->heap_base =3D info->brk; - /* This will be filled in on the first SYS_HEAPINFO call. */ - ts->heap_limit =3D 0; } diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c index bc04b02eba..bcd13cd6df 100644 --- a/semihosting/arm-compat-semi.c +++ b/semihosting/arm-compat-semi.c @@ -666,7 +666,7 @@ void do_common_semihosting(CPUState *cs) int i; #ifdef CONFIG_USER_ONLY TaskState *ts =3D get_task_state(cs); - target_ulong limit; + static abi_ulong heapbase, heaplimit; #else LayoutInfo info =3D common_semi_find_bases(cs); #endif @@ -678,24 +678,20 @@ void do_common_semihosting(CPUState *cs) * Some C libraries assume the heap immediately follows .bss, = so * allocate it using sbrk. */ - if (!ts->heap_limit) { - abi_ulong ret; - - ts->heap_base =3D do_brk(0); - limit =3D ts->heap_base + COMMON_SEMI_HEAP_SIZE; + if (!heaplimit) { + heapbase =3D do_brk(0); /* Try a big heap, and reduce the size if that fails. */ - for (;;) { - ret =3D do_brk(limit); + for (abi_ulong size =3D COMMON_SEMI_HEAP_SIZE; ; size >>= =3D 1) { + abi_ulong limit =3D heapbase + size; + abi_ulong ret =3D do_brk(limit); if (ret >=3D limit) { + heaplimit =3D limit; break; } - limit =3D (ts->heap_base >> 1) + (limit >> 1); } - ts->heap_limit =3D limit; } - - retvals[0] =3D ts->heap_base; - retvals[1] =3D ts->heap_limit; + retvals[0] =3D heapbase; + retvals[1] =3D heaplimit; /* * Note that semihosting is *not* thread aware. * Always return the stack base of the main thread. --=20 2.43.0