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Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/qemu.h | 1 - linux-user/aarch64/cpu_loop.c | 1 - linux-user/arm/cpu_loop.c | 1 - linux-user/m68k/cpu_loop.c | 1 - linux-user/riscv/cpu_loop.c | 1 - semihosting/arm-compat-semi.c | 6 +++++- 6 files changed, 5 insertions(+), 6 deletions(-) diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 0b19fa43e6..b6621536b3 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -127,7 +127,6 @@ struct TaskState { abi_ulong heap_base; abi_ulong heap_limit; #endif - abi_ulong stack_base; int used; /* non zero if used */ struct image_info *info; struct linux_binprm *bprm; diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index fea43cefa6..b65999a75b 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -168,7 +168,6 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) qemu_guest_getrandom_nofail(&env->keys, sizeof(env->keys)); } =20 - ts->stack_base =3D info->start_stack; ts->heap_base =3D info->brk; /* This will be filled in on the first SYS_HEAPINFO call. */ ts->heap_limit =3D 0; diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index 33f63951a9..e40d6beafa 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -504,7 +504,6 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) arm_rebuild_hflags(env); #endif =20 - ts->stack_base =3D info->start_stack; ts->heap_base =3D info->brk; /* This will be filled in on the first SYS_HEAPINFO call. */ ts->heap_limit =3D 0; diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 5da91b997a..3aaaf02ca4 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -117,7 +117,6 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) env->aregs[7] =3D regs->usp; env->sr =3D regs->sr; =20 - ts->stack_base =3D info->start_stack; ts->heap_base =3D info->brk; /* This will be filled in on the first SYS_HEAPINFO call. */ ts->heap_limit =3D 0; diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 3ac8bbfec1..541de765ff 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -109,7 +109,6 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) exit(EXIT_FAILURE); } =20 - ts->stack_base =3D info->start_stack; ts->heap_base =3D info->brk; /* This will be filled in on the first SYS_HEAPINFO call. */ ts->heap_limit =3D 0; diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c index 86e5260e50..bc04b02eba 100644 --- a/semihosting/arm-compat-semi.c +++ b/semihosting/arm-compat-semi.c @@ -696,7 +696,11 @@ void do_common_semihosting(CPUState *cs) =20 retvals[0] =3D ts->heap_base; retvals[1] =3D ts->heap_limit; - retvals[2] =3D ts->stack_base; + /* + * Note that semihosting is *not* thread aware. + * Always return the stack base of the main thread. + */ + retvals[2] =3D ts->info->start_stack; retvals[3] =3D 0; /* Stack limit. */ #else retvals[0] =3D info.heapbase; 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([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.20.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:20:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336835; x=1756941635; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9xu3146lFwQ0p53EI3uEWAj9ZnciIjcfnpwnHwze1+c=; b=FgpA0AEo05g4tgTeLnFa/9DTo/ZS0N6Ytd2Gvfme0NNQkBG1de5bjMMiZKi3gMssmr F9sqP5+/CijiAdznWErFALdS0qujydzRat6up9ObGeSwR3/MLmJN1rVI5qEb7VoF9CZZ NXVjaXqbv71iVXxtDG3wVRYZs9Wq5l7pYgTIUhFS/qNMTHqvVXD4s9L6Z5wr9oolZiF5 WNQwTRhCP5K/BPy3U7ocLbqKA8JYTYYHfe/EmurNlItZcCL537mT3qEiVKqC6rDnfvDy R3EFdMWnsK/PCsyhGMaf5hYGr/Q3QC0KTDrttlu9b0EZDjpt1TeJwpt8yic7/MHq31Vy 5AXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336835; x=1756941635; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9xu3146lFwQ0p53EI3uEWAj9ZnciIjcfnpwnHwze1+c=; b=DRU8JQ/5u7JdFr4w3XGy+Mz2W6Zrvi5dO3Fke+aD91wVmeiaZ88E/qvaAF6ZfIITDE bQdx7Dyg1a+4jIQdsIG6nf+aZv1kDCd1eEx8DVzMFPdI+ZQM/4lChAH1/6AEWBZXk3Bq Z+QPcPSLVwSn2IHRdH9L+MHs5sGJTebIPnH3r6SSXv6jkgDfHsA435uHHuoJP/E/FE/k Kbs154Eqp1zLJoKuITBU9bPeq/az7O/1B1kbe3lxPITseu2LHGYfKovZHJYEZSbQLYxm +N0EnaezPkLZasb5KN1tvhGv9uVOzhdlyYTu0RqIxeTpB9fO/guHjjluW9N/B4S0CmbU MmsQ== X-Gm-Message-State: AOJu0YyecTacd0XRqpD7fQ/tv3OS25qThN1uGnkPzJ+McKe58eBRPR/J Tc8AB3cqyQKozOcevFv9/5eZERUV4VgeYXUVT5e2EvwkjYBLf4XXio7OQAeDaTYuYgnRfZj71Vo oFN5zo6s= X-Gm-Gg: ASbGncu+a+k5EGHl3dWyVpyX1+VrknGyiNEHH3K4Fd12zqId/YwkT0tu1fbe8aeF0Sj pAlnDu6h4zGSW3QCXJjjOvxmfzUzni9Co3q1DwCWf5t8w9yy7gRnJR6cdomVA4OrXl3EgC3dWlW cVDAoX9Gwlh1TflnA4zlbBeEO8qL0VahEkjKFIs4AVgUOgtnwictqtaCnqbQ0r+dgrSfotF93V3 o3eLRIVLO2XCIRR1mssqVsicDbrHvuKeszEVQDlt4ZzL5NecQiKMMTtgglDV3KuJudSu7SMOJ72 6gfu611P34rI8GbMDJj1AeaBhgp3UJQKZlOowvTSPFP4YOPkvhC2PWjz4+q5PWxkska4aOLiwIi 2pyADut8SAUlL8Vv6UgIEqD4gN2hqJ90Ez/WY X-Google-Smtp-Source: AGHT+IGEirVGwQFT5uLWXjQsUvSpGCUKwz6rjHBoX0jnjjB2w0tCl2bnpxxNoaD3cJiwlpNS+Rkx6Q== X-Received: by 2002:a05:6a00:2e18:b0:771:fc20:45e7 with SMTP id d2e1a72fcca58-771fc204c98mr10742157b3a.17.1756336835435; Wed, 27 Aug 2025 16:20:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 02/46] semihosting: Initialize heap once per process Date: Thu, 28 Aug 2025 09:19:39 +1000 Message-ID: <20250827232023.50398-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337056983116600 Content-Type: text/plain; charset="utf-8" While semihosting isn't really thread aware, the current implementation allocates space for the heap per-thread. Remove the heap_base and heap_limit fields from TaskState. Replace with static variables within do_common_semihosting. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/qemu.h | 5 ----- linux-user/aarch64/cpu_loop.c | 7 ------- linux-user/arm/cpu_loop.c | 25 +++++++++++-------------- linux-user/m68k/cpu_loop.c | 8 -------- linux-user/riscv/cpu_loop.c | 4 ---- semihosting/arm-compat-semi.c | 22 +++++++++------------- 6 files changed, 20 insertions(+), 51 deletions(-) diff --git a/linux-user/qemu.h b/linux-user/qemu.h index b6621536b3..4d6fad28c6 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -121,11 +121,6 @@ struct TaskState { abi_ulong child_tidptr; #ifdef TARGET_M68K abi_ulong tp_value; -#endif -#if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_RISCV) - /* Extra fields for semihosted binaries. */ - abi_ulong heap_base; - abi_ulong heap_limit; #endif int used; /* non zero if used */ struct image_info *info; diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index b65999a75b..030a630c93 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -140,9 +140,6 @@ void cpu_loop(CPUARMState *env) void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { ARMCPU *cpu =3D env_archcpu(env); - CPUState *cs =3D env_cpu(env); - TaskState *ts =3D get_task_state(cs); - struct image_info *info =3D ts->info; int i; =20 if (!(arm_feature(env, ARM_FEATURE_AARCH64))) { @@ -167,8 +164,4 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) if (cpu_isar_feature(aa64_pauth, cpu)) { qemu_guest_getrandom_nofail(&env->keys, sizeof(env->keys)); } - - ts->heap_base =3D info->brk; - /* This will be filled in on the first SYS_HEAPINFO call. */ - ts->heap_limit =3D 0; } diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index e40d6beafa..9d54422736 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -492,19 +492,16 @@ void target_cpu_copy_regs(CPUArchState *env, target_p= t_regs *regs) for(i =3D 0; i < 16; i++) { env->regs[i] =3D regs->uregs[i]; } -#if TARGET_BIG_ENDIAN - /* Enable BE8. */ - if (EF_ARM_EABI_VERSION(info->elf_flags) >=3D EF_ARM_EABI_VER4 - && (info->elf_flags & EF_ARM_BE8)) { - env->uncached_cpsr |=3D CPSR_E; - env->cp15.sctlr_el[1] |=3D SCTLR_E0E; - } else { - env->cp15.sctlr_el[1] |=3D SCTLR_B; - } - arm_rebuild_hflags(env); -#endif =20 - ts->heap_base =3D info->brk; - /* This will be filled in on the first SYS_HEAPINFO call. */ - ts->heap_limit =3D 0; + if (TARGET_BIG_ENDIAN) { + /* Enable BE8. */ + if (EF_ARM_EABI_VERSION(info->elf_flags) >=3D EF_ARM_EABI_VER4 + && (info->elf_flags & EF_ARM_BE8)) { + env->uncached_cpsr |=3D CPSR_E; + env->cp15.sctlr_el[1] |=3D SCTLR_E0E; + } else { + env->cp15.sctlr_el[1] |=3D SCTLR_B; + } + arm_rebuild_hflags(env); + } } diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 3aaaf02ca4..23693f3358 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -94,10 +94,6 @@ void cpu_loop(CPUM68KState *env) =20 void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { - CPUState *cpu =3D env_cpu(env); - TaskState *ts =3D get_task_state(cpu); - struct image_info *info =3D ts->info; - env->pc =3D regs->pc; env->dregs[0] =3D regs->d0; env->dregs[1] =3D regs->d1; @@ -116,8 +112,4 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) env->aregs[6] =3D regs->a6; env->aregs[7] =3D regs->usp; env->sr =3D regs->sr; - - ts->heap_base =3D info->brk; - /* This will be filled in on the first SYS_HEAPINFO call. */ - ts->heap_limit =3D 0; } diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 541de765ff..2dd30c7b28 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -108,8 +108,4 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) error_report("Incompatible ELF: RVE cpu requires RVE ABI binary"); exit(EXIT_FAILURE); } - - ts->heap_base =3D info->brk; - /* This will be filled in on the first SYS_HEAPINFO call. */ - ts->heap_limit =3D 0; } diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c index bc04b02eba..bcd13cd6df 100644 --- a/semihosting/arm-compat-semi.c +++ b/semihosting/arm-compat-semi.c @@ -666,7 +666,7 @@ void do_common_semihosting(CPUState *cs) int i; #ifdef CONFIG_USER_ONLY TaskState *ts =3D get_task_state(cs); - target_ulong limit; + static abi_ulong heapbase, heaplimit; #else LayoutInfo info =3D common_semi_find_bases(cs); #endif @@ -678,24 +678,20 @@ void do_common_semihosting(CPUState *cs) * Some C libraries assume the heap immediately follows .bss, = so * allocate it using sbrk. */ - if (!ts->heap_limit) { - abi_ulong ret; - - ts->heap_base =3D do_brk(0); - limit =3D ts->heap_base + COMMON_SEMI_HEAP_SIZE; + if (!heaplimit) { + heapbase =3D do_brk(0); /* Try a big heap, and reduce the size if that fails. */ - for (;;) { - ret =3D do_brk(limit); + for (abi_ulong size =3D COMMON_SEMI_HEAP_SIZE; ; size >>= =3D 1) { + abi_ulong limit =3D heapbase + size; + abi_ulong ret =3D do_brk(limit); if (ret >=3D limit) { + heaplimit =3D limit; break; } - limit =3D (ts->heap_base >> 1) + (limit >> 1); } - ts->heap_limit =3D limit; } - - retvals[0] =3D ts->heap_base; - retvals[1] =3D ts->heap_limit; + retvals[0] =3D heapbase; + retvals[1] =3D heaplimit; /* * Note that semihosting is *not* thread aware. * Always return the stack base of the main thread. --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336874; cv=none; d=zohomail.com; s=zohoarc; b=HUnqMh1ddIBmucmJJzriNqYzRyf8yGBPUjdS5OkbdR/Zmh6SsI7n461aFmjX945swNIjNElVyZzNSpJM7pfr6XP/Op+N83QGOLLNsm7/0nkf45vipsboVu52JH+mN8TAppjzuB7b+4ArmYPanOAfZJr504zNOEVEqUMpFU71xZo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336874; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Create empty files for each target, and add the common build rule. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/aarch64/elfload.c | 1 + linux-user/alpha/elfload.c | 1 + linux-user/arm/elfload.c | 1 + linux-user/hexagon/elfload.c | 1 + linux-user/hppa/elfload.c | 1 + linux-user/i386/elfload.c | 1 + linux-user/loongarch64/elfload.c | 1 + linux-user/m68k/elfload.c | 1 + linux-user/microblaze/elfload.c | 1 + linux-user/mips/elfload.c | 1 + linux-user/mips64/elfload.c | 1 + linux-user/openrisc/elfload.c | 1 + linux-user/ppc/elfload.c | 1 + linux-user/riscv/elfload.c | 1 + linux-user/s390x/elfload.c | 1 + linux-user/sh4/elfload.c | 1 + linux-user/sparc/elfload.c | 1 + linux-user/x86_64/elfload.c | 1 + linux-user/xtensa/elfload.c | 1 + meson.build | 6 +++++- 20 files changed, 24 insertions(+), 1 deletion(-) create mode 100644 linux-user/aarch64/elfload.c create mode 100644 linux-user/alpha/elfload.c create mode 100644 linux-user/arm/elfload.c create mode 100644 linux-user/hexagon/elfload.c create mode 100644 linux-user/hppa/elfload.c create mode 100644 linux-user/i386/elfload.c create mode 100644 linux-user/loongarch64/elfload.c create mode 100644 linux-user/m68k/elfload.c create mode 100644 linux-user/microblaze/elfload.c create mode 100644 linux-user/mips/elfload.c create mode 100644 linux-user/mips64/elfload.c create mode 100644 linux-user/openrisc/elfload.c create mode 100644 linux-user/ppc/elfload.c create mode 100644 linux-user/riscv/elfload.c create mode 100644 linux-user/s390x/elfload.c create mode 100644 linux-user/sh4/elfload.c create mode 100644 linux-user/sparc/elfload.c create mode 100644 linux-user/x86_64/elfload.c create mode 100644 linux-user/xtensa/elfload.c diff --git a/linux-user/aarch64/elfload.c b/linux-user/aarch64/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/aarch64/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/alpha/elfload.c b/linux-user/alpha/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/alpha/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/arm/elfload.c b/linux-user/arm/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/arm/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/hexagon/elfload.c b/linux-user/hexagon/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/hexagon/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/hppa/elfload.c b/linux-user/hppa/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/hppa/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/i386/elfload.c b/linux-user/i386/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/i386/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/loongarch64/elfload.c b/linux-user/loongarch64/elfl= oad.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/loongarch64/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/m68k/elfload.c b/linux-user/m68k/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/m68k/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/microblaze/elfload.c b/linux-user/microblaze/elfloa= d.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/microblaze/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/mips/elfload.c b/linux-user/mips/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/mips/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/mips64/elfload.c b/linux-user/mips64/elfload.c new file mode 100644 index 0000000000..b719555e65 --- /dev/null +++ b/linux-user/mips64/elfload.c @@ -0,0 +1 @@ +#include "../mips/elfload.c" diff --git a/linux-user/openrisc/elfload.c b/linux-user/openrisc/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/openrisc/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/ppc/elfload.c b/linux-user/ppc/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/ppc/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/riscv/elfload.c b/linux-user/riscv/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/riscv/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/s390x/elfload.c b/linux-user/s390x/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/s390x/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/sh4/elfload.c b/linux-user/sh4/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/sh4/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/sparc/elfload.c b/linux-user/sparc/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/sparc/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/x86_64/elfload.c b/linux-user/x86_64/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/x86_64/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/linux-user/xtensa/elfload.c b/linux-user/xtensa/elfload.c new file mode 100644 index 0000000000..73fa78ef14 --- /dev/null +++ b/linux-user/xtensa/elfload.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/meson.build b/meson.build index 50c774a195..0d42de61ae 100644 --- a/meson.build +++ b/meson.build @@ -4327,7 +4327,11 @@ foreach target : target_dirs ) if 'CONFIG_LINUX_USER' in config_target dir =3D base_dir / abi - arch_srcs +=3D files(dir / 'signal.c', dir / 'cpu_loop.c') + arch_srcs +=3D files( + dir / 'cpu_loop.c', + dir / 'elfload.c', + dir / 'signal.c', + ) if config_target.has_key('TARGET_SYSTBL_ABI') arch_srcs +=3D \ syscall_nr_generators[abi].process(base_dir / abi / config_targe= t['TARGET_SYSTBL'], --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337217; cv=none; d=zohomail.com; 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([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.20.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:20:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336840; x=1756941640; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qyfttuYrb2FmFhaTWAEnRHcv+c+b5Ku1UMCZw0CnHd8=; b=HGnVQo2HMhSAWAwNZ9VEMs+yus2JmQOLaKhfw3Uovo7T8/3RNpzMc17Ho6vrcSvYj1 1rwZ7cd4lgNy2BbIyXteBHiU5MotAscOaU1iLnphF+/L4aXcwsCSspKgRe1I/mr+OyQx EsPkeK+lEWb+nAm9fGj3KiTKOk/bzNwzh/OQ5d0SKQYHI1BwEdr225EnezL2i8Vh212c wCYyrC+dxHv6Ega+JzFRmtE40kzlvgB05FHrDMvR956RugARDuEkgTJK2POaF+Kaz1Qn 7+cPRZWUx/zgcYWTBYCezbwoZDVt83CTMM60ZtqlBgrxUb3rH77W/gikeHpRtTl5oFE8 tc6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336840; x=1756941640; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qyfttuYrb2FmFhaTWAEnRHcv+c+b5Ku1UMCZw0CnHd8=; b=YryLwhpaxszEjO+p+cz3WJbZhlfG73GZqx/T3/vTmDZtuFf4RXVwS1U5dk4S5nKdhu HyfSK4XJyIlEKYYoLBBpXF5eFZLxI7cUX+zNNs33d64CG5WdmYizxoMH6MEq9prd2fnk B3YrYp9ukMojRWz3Sph2gXfyNTGlCaGaYm5KEqgqLrIuurfJ74VS7EiOS2MvLo+c361D TsAWiTY+E4mBeAm+M9Vw+uyQjE5Eq1tjXww+5TVXg2Y19hHiylG7UV8ND6XGBPOahVwC Cxo06zQ846iJR2w5YPY68QDYZS4l4niyZqFHPMuM3U7RVJvD36l3AyWJtsUAB7y7ocpN eBsQ== X-Gm-Message-State: AOJu0Yzq2T3JBUbotazQxWn2MAEvudSppK8sw+0H4attVSD5R4+Rlg/U 3UovBRqoTDwrTxlN2b11uWL/rwNqjNftA7wYLPYi81fn4TL5FIMygwfl4bLxQLrXjkVJyQV1A1a zHlR3/Gw= X-Gm-Gg: ASbGncuGRSyU6O1nMQaw3/Jlbaf4xEOI/yB9RbjghpbqJeGcNVEbWP5do8PgjO9SGHc GbLQuebJlwvdORL9oiSaB7KzO17jHGd4FE3n0cI948ki+t+lzTBhqLdo1p2mc95sOwAnfpknmKk JHxxE2+3+PIdSWx53AaXtuYrsoFGVE6YInkLPm5Rf9pfu9aQBggS9BJi4l9eQKC7CitXjMs05ik zZnKnsAEYHVAPAnUVawI43zAOE+DOiQN+ZYC9xDugSEurPSUd01J21kfTa8Em63r633PAgDXyz9 eIGtB/uHwmiG1q2rT1lrE+VR4UCJjiuTyYiEmLQA18UNtyG+BnKXhY8pifWK9vfTO3+xxI62pgo GhqG6+LZDGQaduuUE/ni/3OSCWA== X-Google-Smtp-Source: AGHT+IGwR1nndh/yCqx3qKqeXTIGz242sb8KTpasaaEsXm7l7tScuAUJvJi07rhTyDJUsQAq7skqYQ== X-Received: by 2002:a05:6a00:1789:b0:770:3dc0:a4ad with SMTP id d2e1a72fcca58-771fc292de2mr8743767b3a.5.1756336840323; Wed, 27 Aug 2025 16:20:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 04/46] linux-user: Move ppc uabi/asm/elf.h workaround to osdep.h Date: Thu, 28 Aug 2025 09:19:41 +1000 Message-ID: <20250827232023.50398-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337219676124100 Content-Type: text/plain; charset="utf-8" Move the workaround out of linux-user/elfload.c, so that we don't have to replicate it in many places. Place it immediately after the include of , which draws in the relevant symbols. Note that ARCH_DLINFO is not defined by the kernel header, and so there's no need to undef it either. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- include/qemu/osdep.h | 8 ++++++++ hw/core/loader.c | 4 ---- linux-user/elfload.c | 10 ---------- 3 files changed, 8 insertions(+), 14 deletions(-) diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h index 96fe51bc39..be3460b32f 100644 --- a/include/qemu/osdep.h +++ b/include/qemu/osdep.h @@ -133,6 +133,14 @@ QEMU_EXTERN_C int daemon(int, int); #include #include =20 +/* + * Avoid conflict with linux/arch/powerpc/include/uapi/asm/elf.h, included + * from , but we might as well do this unconditionally. + */ +#undef ELF_CLASS +#undef ELF_DATA +#undef ELF_ARCH + #ifdef CONFIG_IOVEC #include #endif diff --git a/hw/core/loader.c b/hw/core/loader.c index e7056ba4bd..524af6f14a 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -295,10 +295,6 @@ static void *load_at(int fd, off_t offset, size_t size) return ptr; } =20 -#ifdef ELF_CLASS -#undef ELF_CLASS -#endif - #define ELF_CLASS ELFCLASS32 #include "elf.h" =20 diff --git a/linux-user/elfload.c b/linux-user/elfload.c index ea214105ff..4ca8c39dc2 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -35,16 +35,6 @@ #include "target/arm/cpu-features.h" #endif =20 -#ifdef _ARCH_PPC64 -#undef ARCH_DLINFO -#undef ELF_PLATFORM -#undef ELF_HWCAP -#undef ELF_HWCAP2 -#undef ELF_CLASS -#undef ELF_DATA -#undef ELF_ARCH -#endif - #ifndef TARGET_ARCH_HAS_SIGTRAMP_PAGE #define TARGET_ARCH_HAS_SIGTRAMP_PAGE 0 #endif --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336913; cv=none; d=zohomail.com; s=zohoarc; b=O8ew6NEMUISb3v0f8R2tsmACu+bakEpg5F8K4lKcW5uDU77KKRTnQIP8HX/HJkcaefVcUmIqT6VvFWomxzHJQjuyS3+mKEfFr/1X9t0cDi4JNwUPPBCXQt1J5WRXIuJSXi5KfJfcbtW2+BV3rbLG1QY/SDzEZ+gWni9AyahbGLA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336913; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=eoPWka5IGjXwmhHjvxnZ9KVWvPEaQtzh37FeYd1Lbz4=; b=Tz9qextyBEL+Iz/Pete3R8bgJuqY0xIeC9Vl5ggb2G08Eqh7I0OIO55FFwdM7W6hcoe8OKjcQlC6IXsM1KywMqWTCuHClCvujfmF2Ne7xvmyPr6xgqX32unQHgTTRLdFHd8vaH9kPm9dGX8ORBIVBzc8xeLOziMpT+WcnV2J0JE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 175633691370083.47179804065581; Wed, 27 Aug 2025 16:21:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPRj-0001Xu-0k; Wed, 27 Aug 2025 19:20:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPRg-0001WH-Ss for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:20:48 -0400 Received: from mail-pf1-x431.google.com ([2607:f8b0:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPRd-00048G-P6 for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:20:48 -0400 Received: by mail-pf1-x431.google.com with SMTP id d2e1a72fcca58-76e4f2e4c40so418533b3a.2 for ; Wed, 27 Aug 2025 16:20:45 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.20.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:20:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336844; x=1756941644; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eoPWka5IGjXwmhHjvxnZ9KVWvPEaQtzh37FeYd1Lbz4=; b=KruK0YPb2Idd7X64GTsEMV+HokaTvyBsMPdfqpIffapZZ9ssvHPIdnR/tpvxvr5FUM pYjpkedaF18mLBNGFnEjcrvIfRZtCAKMMIt9LH3R2+OKCyIMI/Drv4cT588x1CG6tSIf qF/Yq0rm6fw7PWxseDQqxc1n49OLraHi3xwz9uK52AGMZP9DvRfQASOiuDTXqlB6BbzI HLZIYX3IVP+xyrvHWpQTXLBpgJ0CHQrT1JPkv5yGm852WobzOT3yAXfjuXolw5I0xJSh Hs7H3qeguqf4vX2s5ByhyQKvedoEABuPzfz7blh60a9pvzx3x1gXuMc5Z96pRmzUzoat 6fKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336844; x=1756941644; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eoPWka5IGjXwmhHjvxnZ9KVWvPEaQtzh37FeYd1Lbz4=; b=W+/36eajrgjNZptKHi6btV+xoLyQpp3JcII4shnEqfkaXAcjWDhzvE1dPdSrF07Y6j 70x7k7PgPsphwDxU3RdX+nNzo1QhYqsb03ems8A0ZDtQhQursTNPr/QwDDr/rySaoRHB qS+01h4yruLSnY7Xlofp9dZFF5vH2/4+CPYIULtPJYktWmyTWd/Wo37bS2xFe7yM6h9c /ezt7udlfofUVu709kZgniYJPjjwF88YKzOwu8o4vANdMLYHK7DxsjvDzHxXJx5rpgmC H/dzwD6C5nZMJ02DiP1ggWsky55Oe06dUvfKCPtq0q+DG/ca2BB6WnhRexAVlC5ocCgj 5jJg== X-Gm-Message-State: AOJu0Yw8csQVFlfl4bCaxejuLQ8jeKw2VrFPgDQC6kn5zg4Dy8lXFzMm JK9bHrz4fgUljFnZdfGOSlol4yUSafzUh5VtnfVK7jT0LR9CrIJZTF3U9sUiJGU6PacZhRyLFmt GNtccAio= X-Gm-Gg: ASbGnctXGjvVcI+CplQAv6qsZuqrYM9Mty9HG/zK/K5LOHSqfECUIm6JYNm1Q074kMD 7XncBadJldMyF21MY/zuHjbvAQ6kW8j0WTRtXWQhQFgbi7CRazS4SRpApqlQxMCv6swqYjqBbv9 4ytTezKPyZlA37u14n6XPRJ6+HuHX95/m4DiqdQnM7+qkKoUGUWTrJ0ZWci5JGCZYcfeCssauX5 fypr7YWNFcuu1QZdCeb1z0n4VtIunQ3V/B3YBZ3kYIGgifb2scLBVm2rshanQPT3R+KKA9mnSij cCmjFZ+ak6GVKJ7FoYZDvdkHwE7xqLPw+S+o/QVNZqW44UP8wizTSnKCR1UrhIMq+HoOZgqg7Fl cMVDbOuOMnBX6UEhM+/paEzL8AA== X-Google-Smtp-Source: AGHT+IHnsmy2kCAy/d2dMjQpqMy7BAkvYWdedIcJRhVTDW3i57VZ41yqLH02RQqNkhot+cbey6Y68A== X-Received: by 2002:a05:6a00:3495:b0:771:fcd7:ad0 with SMTP id d2e1a72fcca58-771fcd710b9mr9067965b3a.22.1756336843538; Wed, 27 Aug 2025 16:20:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 05/46] linux-user: Move get_elf_cpu_model to target/elfload.c Date: Thu, 28 Aug 2025 09:19:42 +1000 Message-ID: <20250827232023.50398-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756336916231124100 Content-Type: text/plain; charset="utf-8" Rename from cpu_get_model to emphasize that this is an elf-specific function. Declare the function once in loader.h. This frees up target_elf.h for other uses. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/aarch64/target_elf.h | 5 +--- linux-user/alpha/target_elf.h | 5 +--- linux-user/arm/target_elf.h | 5 +--- linux-user/hexagon/target_elf.h | 29 ------------------- linux-user/hppa/target_elf.h | 5 +--- linux-user/i386/target_elf.h | 5 +--- linux-user/loader.h | 3 ++ linux-user/loongarch64/target_elf.h | 5 +--- linux-user/m68k/target_elf.h | 9 ------ linux-user/microblaze/target_elf.h | 5 +--- linux-user/mips/target_elf.h | 11 +------- linux-user/mips64/target_elf.h | 27 +----------------- linux-user/openrisc/target_elf.h | 5 +--- linux-user/ppc/target_elf.h | 9 +----- linux-user/riscv/target_elf.h | 5 +--- linux-user/s390x/target_elf.h | 5 +--- linux-user/sh4/target_elf.h | 5 +--- linux-user/sparc/target_elf.h | 9 +----- linux-user/x86_64/target_elf.h | 5 +--- linux-user/xtensa/target_elf.h | 5 ---- linux-user/aarch64/elfload.c | 10 +++++++ linux-user/alpha/elfload.c | 10 +++++++ linux-user/arm/elfload.c | 10 +++++++ linux-user/hexagon/elfload.c | 34 +++++++++++++++++++++++ linux-user/hppa/elfload.c | 10 +++++++ linux-user/i386/elfload.c | 10 +++++++ linux-user/loongarch64/elfload.c | 10 +++++++ linux-user/m68k/elfload.c | 17 ++++++++++++ linux-user/main.c | 3 +- linux-user/microblaze/elfload.c | 10 +++++++ linux-user/mips/elfload.c | 43 +++++++++++++++++++++++++++++ linux-user/openrisc/elfload.c | 10 +++++++ linux-user/ppc/elfload.c | 14 ++++++++++ linux-user/riscv/elfload.c | 10 +++++++ linux-user/s390x/elfload.c | 10 +++++++ linux-user/sh4/elfload.c | 10 +++++++ linux-user/sparc/elfload.c | 14 ++++++++++ linux-user/x86_64/elfload.c | 10 +++++++ linux-user/xtensa/elfload.c | 10 +++++++ 39 files changed, 272 insertions(+), 145 deletions(-) diff --git a/linux-user/aarch64/target_elf.h b/linux-user/aarch64/target_el= f.h index a7eb962fba..d955b3d07f 100644 --- a/linux-user/aarch64/target_elf.h +++ b/linux-user/aarch64/target_elf.h @@ -7,8 +7,5 @@ =20 #ifndef AARCH64_TARGET_ELF_H #define AARCH64_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - return "any"; -} + #endif diff --git a/linux-user/alpha/target_elf.h b/linux-user/alpha/target_elf.h index b77d638f6d..52b68680ad 100644 --- a/linux-user/alpha/target_elf.h +++ b/linux-user/alpha/target_elf.h @@ -7,8 +7,5 @@ =20 #ifndef ALPHA_TARGET_ELF_H #define ALPHA_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - return "ev67"; -} + #endif diff --git a/linux-user/arm/target_elf.h b/linux-user/arm/target_elf.h index 58ff6a0986..2abb27a733 100644 --- a/linux-user/arm/target_elf.h +++ b/linux-user/arm/target_elf.h @@ -7,8 +7,5 @@ =20 #ifndef ARM_TARGET_ELF_H #define ARM_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - return "any"; -} + #endif diff --git a/linux-user/hexagon/target_elf.h b/linux-user/hexagon/target_el= f.h index 36056fc9f0..eccf207f6b 100644 --- a/linux-user/hexagon/target_elf.h +++ b/linux-user/hexagon/target_elf.h @@ -18,33 +18,4 @@ #ifndef HEXAGON_TARGET_ELF_H #define HEXAGON_TARGET_ELF_H =20 -static inline const char *cpu_get_model(uint32_t eflags) -{ - static char buf[32]; - int err; - - /* For now, treat anything newer than v5 as a v73 */ - /* FIXME - Disable instructions that are newer than the specified arch= */ - if (eflags =3D=3D 0x04 || /* v5 */ - eflags =3D=3D 0x05 || /* v55 */ - eflags =3D=3D 0x60 || /* v60 */ - eflags =3D=3D 0x61 || /* v61 */ - eflags =3D=3D 0x62 || /* v62 */ - eflags =3D=3D 0x65 || /* v65 */ - eflags =3D=3D 0x66 || /* v66 */ - eflags =3D=3D 0x67 || /* v67 */ - eflags =3D=3D 0x8067 || /* v67t */ - eflags =3D=3D 0x68 || /* v68 */ - eflags =3D=3D 0x69 || /* v69 */ - eflags =3D=3D 0x71 || /* v71 */ - eflags =3D=3D 0x8071 || /* v71t */ - eflags =3D=3D 0x73 /* v73 */ - ) { - return "v73"; - } - - err =3D snprintf(buf, sizeof(buf), "unknown (0x%x)", eflags); - return err >=3D 0 && err < sizeof(buf) ? buf : "unknown"; -} - #endif diff --git a/linux-user/hppa/target_elf.h b/linux-user/hppa/target_elf.h index 19cae8bd65..5826ca2cd2 100644 --- a/linux-user/hppa/target_elf.h +++ b/linux-user/hppa/target_elf.h @@ -7,8 +7,5 @@ =20 #ifndef HPPA_TARGET_ELF_H #define HPPA_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - return "hppa"; -} + #endif diff --git a/linux-user/i386/target_elf.h b/linux-user/i386/target_elf.h index 238a9aba73..e6f0d8fa4e 100644 --- a/linux-user/i386/target_elf.h +++ b/linux-user/i386/target_elf.h @@ -7,8 +7,5 @@ =20 #ifndef I386_TARGET_ELF_H #define I386_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - return "max"; -} + #endif diff --git a/linux-user/loader.h b/linux-user/loader.h index e102e6f410..75ee9975a0 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -98,6 +98,9 @@ abi_long memcpy_to_target(abi_ulong dest, const void *src, =20 extern unsigned long guest_stack_size; =20 +/* Note that Elf32 and Elf64 use uint32_t for e_flags. */ +const char *get_elf_cpu_model(uint32_t eflags); + #if defined(TARGET_S390X) || defined(TARGET_AARCH64) || defined(TARGET_ARM) uint32_t get_elf_hwcap(void); const char *elf_hwcap_str(uint32_t bit); diff --git a/linux-user/loongarch64/target_elf.h b/linux-user/loongarch64/t= arget_elf.h index 95c3f05a46..39a08d35d9 100644 --- a/linux-user/loongarch64/target_elf.h +++ b/linux-user/loongarch64/target_elf.h @@ -5,8 +5,5 @@ =20 #ifndef LOONGARCH_TARGET_ELF_H #define LOONGARCH_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - return "la464"; -} + #endif diff --git a/linux-user/m68k/target_elf.h b/linux-user/m68k/target_elf.h index 998fe0fe2f..62ff9d38d4 100644 --- a/linux-user/m68k/target_elf.h +++ b/linux-user/m68k/target_elf.h @@ -7,14 +7,5 @@ =20 #ifndef M68K_TARGET_ELF_H #define M68K_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - if (eflags =3D=3D 0 || (eflags & EF_M68K_M68000)) { - /* 680x0 */ - return "m68040"; - } =20 - /* Coldfire */ - return "any"; -} #endif diff --git a/linux-user/microblaze/target_elf.h b/linux-user/microblaze/tar= get_elf.h index 8a8f1debff..bfe2997fd2 100644 --- a/linux-user/microblaze/target_elf.h +++ b/linux-user/microblaze/target_elf.h @@ -7,8 +7,5 @@ =20 #ifndef MICROBLAZE_TARGET_ELF_H #define MICROBLAZE_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - return "any"; -} + #endif diff --git a/linux-user/mips/target_elf.h b/linux-user/mips/target_elf.h index 71a32315a8..febf710c7a 100644 --- a/linux-user/mips/target_elf.h +++ b/linux-user/mips/target_elf.h @@ -7,14 +7,5 @@ =20 #ifndef MIPS_TARGET_ELF_H #define MIPS_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - if ((eflags & EF_MIPS_ARCH) =3D=3D EF_MIPS_ARCH_32R6) { - return "mips32r6-generic"; - } - if (eflags & EF_MIPS_NAN2008) { - return "P5600"; - } - return "24Kf"; -} + #endif diff --git a/linux-user/mips64/target_elf.h b/linux-user/mips64/target_elf.h index 502af9d278..02e6d14840 100644 --- a/linux-user/mips64/target_elf.h +++ b/linux-user/mips64/target_elf.h @@ -7,30 +7,5 @@ =20 #ifndef MIPS64_TARGET_ELF_H #define MIPS64_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - switch (eflags & EF_MIPS_MACH) { - case EF_MIPS_MACH_OCTEON: - case EF_MIPS_MACH_OCTEON2: - case EF_MIPS_MACH_OCTEON3: - return "Octeon68XX"; - case EF_MIPS_MACH_LS2E: - return "Loongson-2E"; - case EF_MIPS_MACH_LS2F: - return "Loongson-2F"; - case EF_MIPS_MACH_LS3A: - return "Loongson-3A1000"; - default: - break; - } - switch (eflags & EF_MIPS_ARCH) { - case EF_MIPS_ARCH_64R6: - return "I6400"; - case EF_MIPS_ARCH_64R2: - return "MIPS64R2-generic"; - default: - break; - } - return "5KEf"; -} + #endif diff --git a/linux-user/openrisc/target_elf.h b/linux-user/openrisc/target_= elf.h index 265ecd3079..b34f2ff672 100644 --- a/linux-user/openrisc/target_elf.h +++ b/linux-user/openrisc/target_elf.h @@ -7,8 +7,5 @@ =20 #ifndef OPENRISC_TARGET_ELF_H #define OPENRISC_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - return "any"; -} + #endif diff --git a/linux-user/ppc/target_elf.h b/linux-user/ppc/target_elf.h index 0616618854..8c0a8ea431 100644 --- a/linux-user/ppc/target_elf.h +++ b/linux-user/ppc/target_elf.h @@ -7,12 +7,5 @@ =20 #ifndef PPC_TARGET_ELF_H #define PPC_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ -#ifdef TARGET_PPC64 - return "POWER9"; -#else - return "750"; -#endif -} + #endif diff --git a/linux-user/riscv/target_elf.h b/linux-user/riscv/target_elf.h index dedd5956f3..bfe86105d0 100644 --- a/linux-user/riscv/target_elf.h +++ b/linux-user/riscv/target_elf.h @@ -7,8 +7,5 @@ =20 #ifndef RISCV_TARGET_ELF_H #define RISCV_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - return "max"; -} + #endif diff --git a/linux-user/s390x/target_elf.h b/linux-user/s390x/target_elf.h index 8114b59c1d..e51b053339 100644 --- a/linux-user/s390x/target_elf.h +++ b/linux-user/s390x/target_elf.h @@ -7,8 +7,5 @@ =20 #ifndef S390X_TARGET_ELF_H #define S390X_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - return "qemu"; -} + #endif diff --git a/linux-user/sh4/target_elf.h b/linux-user/sh4/target_elf.h index f485e0cef2..d17011bd75 100644 --- a/linux-user/sh4/target_elf.h +++ b/linux-user/sh4/target_elf.h @@ -7,8 +7,5 @@ =20 #ifndef SH4_TARGET_ELF_H #define SH4_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - return "sh7785"; -} + #endif diff --git a/linux-user/sparc/target_elf.h b/linux-user/sparc/target_elf.h index a510ceb612..7e46748d26 100644 --- a/linux-user/sparc/target_elf.h +++ b/linux-user/sparc/target_elf.h @@ -7,12 +7,5 @@ =20 #ifndef SPARC_TARGET_ELF_H #define SPARC_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ -#ifdef TARGET_SPARC64 - return "TI UltraSparc II"; -#else - return "Fujitsu MB86904"; -#endif -} + #endif diff --git a/linux-user/x86_64/target_elf.h b/linux-user/x86_64/target_elf.h index 3f628f8d66..5849f96350 100644 --- a/linux-user/x86_64/target_elf.h +++ b/linux-user/x86_64/target_elf.h @@ -7,8 +7,5 @@ =20 #ifndef X86_64_TARGET_ELF_H #define X86_64_TARGET_ELF_H -static inline const char *cpu_get_model(uint32_t eflags) -{ - return "max"; -} + #endif diff --git a/linux-user/xtensa/target_elf.h b/linux-user/xtensa/target_elf.h index a9a3fabd89..2c55c22e14 100644 --- a/linux-user/xtensa/target_elf.h +++ b/linux-user/xtensa/target_elf.h @@ -8,9 +8,4 @@ #ifndef XTENSA_TARGET_ELF_H #define XTENSA_TARGET_ELF_H =20 -static inline const char *cpu_get_model(uint32_t eflags) -{ - return XTENSA_DEFAULT_CPU_MODEL; -} - #endif diff --git a/linux-user/aarch64/elfload.c b/linux-user/aarch64/elfload.c index 73fa78ef14..b92442dfeb 100644 --- a/linux-user/aarch64/elfload.c +++ b/linux-user/aarch64/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return "any"; +} diff --git a/linux-user/alpha/elfload.c b/linux-user/alpha/elfload.c index 73fa78ef14..1e44475c47 100644 --- a/linux-user/alpha/elfload.c +++ b/linux-user/alpha/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return "ev67"; +} diff --git a/linux-user/arm/elfload.c b/linux-user/arm/elfload.c index 73fa78ef14..b92442dfeb 100644 --- a/linux-user/arm/elfload.c +++ b/linux-user/arm/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return "any"; +} diff --git a/linux-user/hexagon/elfload.c b/linux-user/hexagon/elfload.c index 73fa78ef14..d8b545032a 100644 --- a/linux-user/hexagon/elfload.c +++ b/linux-user/hexagon/elfload.c @@ -1 +1,35 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + static char buf[32]; + int err; + + /* For now, treat anything newer than v5 as a v73 */ + /* FIXME - Disable instructions that are newer than the specified arch= */ + if (eflags =3D=3D 0x04 || /* v5 */ + eflags =3D=3D 0x05 || /* v55 */ + eflags =3D=3D 0x60 || /* v60 */ + eflags =3D=3D 0x61 || /* v61 */ + eflags =3D=3D 0x62 || /* v62 */ + eflags =3D=3D 0x65 || /* v65 */ + eflags =3D=3D 0x66 || /* v66 */ + eflags =3D=3D 0x67 || /* v67 */ + eflags =3D=3D 0x8067 || /* v67t */ + eflags =3D=3D 0x68 || /* v68 */ + eflags =3D=3D 0x69 || /* v69 */ + eflags =3D=3D 0x71 || /* v71 */ + eflags =3D=3D 0x8071 || /* v71t */ + eflags =3D=3D 0x73 /* v73 */ + ) { + return "v73"; + } + + err =3D snprintf(buf, sizeof(buf), "unknown (0x%x)", eflags); + return err >=3D 0 && err < sizeof(buf) ? buf : "unknown"; +} diff --git a/linux-user/hppa/elfload.c b/linux-user/hppa/elfload.c index 73fa78ef14..2274fcbde4 100644 --- a/linux-user/hppa/elfload.c +++ b/linux-user/hppa/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return "hppa"; +} diff --git a/linux-user/i386/elfload.c b/linux-user/i386/elfload.c index 73fa78ef14..f92adb7308 100644 --- a/linux-user/i386/elfload.c +++ b/linux-user/i386/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return "max"; +} diff --git a/linux-user/loongarch64/elfload.c b/linux-user/loongarch64/elfl= oad.c index 73fa78ef14..874dc4c230 100644 --- a/linux-user/loongarch64/elfload.c +++ b/linux-user/loongarch64/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return "la464"; +} diff --git a/linux-user/m68k/elfload.c b/linux-user/m68k/elfload.c index 73fa78ef14..561ac5b3b3 100644 --- a/linux-user/m68k/elfload.c +++ b/linux-user/m68k/elfload.c @@ -1 +1,18 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" +#include "elf.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + if (eflags =3D=3D 0 || (eflags & EF_M68K_M68000)) { + /* 680x0 */ + return "m68040"; + } + + /* Coldfire */ + return "any"; +} diff --git a/linux-user/main.c b/linux-user/main.c index 68972f00a1..ad1a29d198 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -49,7 +49,6 @@ #include "qemu/guest-random.h" #include "elf.h" #include "trace/control.h" -#include "target_elf.h" #include "user/cpu_loop.h" #include "crypto/init.h" #include "fd-trans.h" @@ -809,7 +808,7 @@ int main(int argc, char **argv, char **envp) } =20 if (cpu_model =3D=3D NULL) { - cpu_model =3D cpu_get_model(get_elf_eflags(execfd)); + cpu_model =3D get_elf_cpu_model(get_elf_eflags(execfd)); } cpu_type =3D parse_cpu_option(cpu_model); =20 diff --git a/linux-user/microblaze/elfload.c b/linux-user/microblaze/elfloa= d.c index 73fa78ef14..b92442dfeb 100644 --- a/linux-user/microblaze/elfload.c +++ b/linux-user/microblaze/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return "any"; +} diff --git a/linux-user/mips/elfload.c b/linux-user/mips/elfload.c index 73fa78ef14..04e3b76740 100644 --- a/linux-user/mips/elfload.c +++ b/linux-user/mips/elfload.c @@ -1 +1,44 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" +#include "elf.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ +#ifdef TARGET_MIPS64 + switch (eflags & EF_MIPS_MACH) { + case EF_MIPS_MACH_OCTEON: + case EF_MIPS_MACH_OCTEON2: + case EF_MIPS_MACH_OCTEON3: + return "Octeon68XX"; + case EF_MIPS_MACH_LS2E: + return "Loongson-2E"; + case EF_MIPS_MACH_LS2F: + return "Loongson-2F"; + case EF_MIPS_MACH_LS3A: + return "Loongson-3A1000"; + default: + break; + } + switch (eflags & EF_MIPS_ARCH) { + case EF_MIPS_ARCH_64R6: + return "I6400"; + case EF_MIPS_ARCH_64R2: + return "MIPS64R2-generic"; + default: + break; + } + return "5KEf"; +#else + if ((eflags & EF_MIPS_ARCH) =3D=3D EF_MIPS_ARCH_32R6) { + return "mips32r6-generic"; + } + if (eflags & EF_MIPS_NAN2008) { + return "P5600"; + } + return "24Kf"; +#endif +} diff --git a/linux-user/openrisc/elfload.c b/linux-user/openrisc/elfload.c index 73fa78ef14..b92442dfeb 100644 --- a/linux-user/openrisc/elfload.c +++ b/linux-user/openrisc/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return "any"; +} diff --git a/linux-user/ppc/elfload.c b/linux-user/ppc/elfload.c index 73fa78ef14..7775dc06fa 100644 --- a/linux-user/ppc/elfload.c +++ b/linux-user/ppc/elfload.c @@ -1 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ +#ifdef TARGET_PPC64 + return "POWER9"; +#else + return "750"; +#endif +} diff --git a/linux-user/riscv/elfload.c b/linux-user/riscv/elfload.c index 73fa78ef14..f92adb7308 100644 --- a/linux-user/riscv/elfload.c +++ b/linux-user/riscv/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return "max"; +} diff --git a/linux-user/s390x/elfload.c b/linux-user/s390x/elfload.c index 73fa78ef14..989953a247 100644 --- a/linux-user/s390x/elfload.c +++ b/linux-user/s390x/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return "qemu"; +} diff --git a/linux-user/sh4/elfload.c b/linux-user/sh4/elfload.c index 73fa78ef14..546034ec07 100644 --- a/linux-user/sh4/elfload.c +++ b/linux-user/sh4/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return "sh7785"; +} diff --git a/linux-user/sparc/elfload.c b/linux-user/sparc/elfload.c index 73fa78ef14..243e6f9b66 100644 --- a/linux-user/sparc/elfload.c +++ b/linux-user/sparc/elfload.c @@ -1 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ +#ifdef TARGET_SPARC64 + return "TI UltraSparc II"; +#else + return "Fujitsu MB86904"; +#endif +} diff --git a/linux-user/x86_64/elfload.c b/linux-user/x86_64/elfload.c index 73fa78ef14..f92adb7308 100644 --- a/linux-user/x86_64/elfload.c +++ b/linux-user/x86_64/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return "max"; +} diff --git a/linux-user/xtensa/elfload.c b/linux-user/xtensa/elfload.c index 73fa78ef14..e35ba69a10 100644 --- a/linux-user/xtensa/elfload.c +++ b/linux-user/xtensa/elfload.c @@ -1 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "qemu/osdep.h" +#include "qemu.h" +#include "loader.h" + + +const char *get_elf_cpu_model(uint32_t eflags) +{ + return XTENSA_DEFAULT_CPU_MODEL; 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Duplicate the one line function between i386 and x86_64, as most other additions to elfload.c won't be common. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/i386/target_elf.h | 2 ++ linux-user/loader.h | 3 +++ linux-user/x86_64/target_elf.h | 2 ++ linux-user/elfload.c | 9 +-------- linux-user/i386/elfload.c | 5 +++++ linux-user/x86_64/elfload.c | 5 +++++ 6 files changed, 18 insertions(+), 8 deletions(-) diff --git a/linux-user/i386/target_elf.h b/linux-user/i386/target_elf.h index e6f0d8fa4e..802395af3a 100644 --- a/linux-user/i386/target_elf.h +++ b/linux-user/i386/target_elf.h @@ -8,4 +8,6 @@ #ifndef I386_TARGET_ELF_H #define I386_TARGET_ELF_H =20 +#define HAVE_ELF_HWCAP 1 + #endif diff --git a/linux-user/loader.h b/linux-user/loader.h index 75ee9975a0..457bb36daa 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -101,6 +101,9 @@ extern unsigned long guest_stack_size; /* Note that Elf32 and Elf64 use uint32_t for e_flags. */ const char *get_elf_cpu_model(uint32_t eflags); =20 +#if defined(TARGET_I386) || defined(TARGET_X86_64) +abi_ulong get_elf_hwcap(CPUState *cs); +#endif #if defined(TARGET_S390X) || defined(TARGET_AARCH64) || defined(TARGET_ARM) uint32_t get_elf_hwcap(void); const char *elf_hwcap_str(uint32_t bit); diff --git a/linux-user/x86_64/target_elf.h b/linux-user/x86_64/target_elf.h index 5849f96350..03483bad57 100644 --- a/linux-user/x86_64/target_elf.h +++ b/linux-user/x86_64/target_elf.h @@ -8,4 +8,6 @@ #ifndef X86_64_TARGET_ELF_H #define X86_64_TARGET_ELF_H =20 +#define HAVE_ELF_HWCAP 1 + #endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 4ca8c39dc2..0c62c249e9 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -148,14 +148,7 @@ typedef abi_int target_pid_t; =20 #ifdef TARGET_I386 =20 -#define ELF_HWCAP get_elf_hwcap() - -static uint32_t get_elf_hwcap(void) -{ - X86CPU *cpu =3D X86_CPU(thread_cpu); - - return cpu->env.features[FEAT_1_EDX]; -} +#define ELF_HWCAP get_elf_hwcap(thread_cpu) =20 #ifdef TARGET_X86_64 #define ELF_CLASS ELFCLASS64 diff --git a/linux-user/i386/elfload.c b/linux-user/i386/elfload.c index f92adb7308..f99336e73c 100644 --- a/linux-user/i386/elfload.c +++ b/linux-user/i386/elfload.c @@ -9,3 +9,8 @@ const char *get_elf_cpu_model(uint32_t eflags) { return "max"; } + +abi_ulong get_elf_hwcap(CPUState *cs) +{ + return cpu_env(cs)->features[FEAT_1_EDX]; +} diff --git a/linux-user/x86_64/elfload.c b/linux-user/x86_64/elfload.c index f92adb7308..f99336e73c 100644 --- a/linux-user/x86_64/elfload.c +++ b/linux-user/x86_64/elfload.c @@ -9,3 +9,8 @@ const char *get_elf_cpu_model(uint32_t eflags) { return "max"; } + +abi_ulong get_elf_hwcap(CPUState *cs) +{ + return cpu_env(cs)->features[FEAT_1_EDX]; +} --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756336873323656.8380946320198; Wed, 27 Aug 2025 16:21:13 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPRp-0001e2-SO; Wed, 27 Aug 2025 19:20:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPRn-0001bg-Ge for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:20:55 -0400 Received: from mail-pf1-x42d.google.com ([2607:f8b0:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPRi-000493-Kz for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:20:55 -0400 Received: by mail-pf1-x42d.google.com with SMTP id d2e1a72fcca58-771eecebb09so562960b3a.3 for ; Wed, 27 Aug 2025 16:20:50 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.20.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:20:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336849; x=1756941649; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=x8fvgpJtQEUOFk8X5/2Alk4+eQtdaFjh3aFtVl++Vic=; b=ONhn1asgJMk5KYqxNcbn7W5AcMXlKg+vL9Oghc78JxkpyTn2pBdPnDNwiGAbNMguww 3hCr7VHJ8kGqnnad6pFFQJ8zmRAis7XEpAm/8B8Fn9d8OZdVhlZ5XHwN3XXINoiFh+AU NaeT59fNYEOg6L5hxIKWC8UU/BN2IMIVLYesZ7eMyxK+nu30cLOq5oEP+HCOqnZtjOFO kcrlIRGQ/avtQxR817sfhQOVVjADcyTJe4CupbEijGmCzOmlAlHrjKBzHweDE5930Lne W8Mbox5G38MG7WKty0TlfWLN/y65+fDKb5c8FwtE/tGrQ3cTRd77D5eEbyXJ6nd+ZCtL picQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336849; x=1756941649; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=x8fvgpJtQEUOFk8X5/2Alk4+eQtdaFjh3aFtVl++Vic=; b=JYbip9lbC0XMXFWNPRUZ5OzlCShkowcXpY9B1wnyEhVwVGY3PfZWafaqqJBkQ0suAZ 200N7JmdUspyT/gIEOTvRPBHBK6EStCe+QtJDNfimEgd2Hi+CC67JT95zWMwmD7doVhS RnfTcag2yNZ2nYcIl6AzItuVDQhqkPthSZWyb+7Y/TqEmqhQ+Esw7wStURxYAXgK4V/K +A7rujfupKFxsEWhi99vBL/NyhntnggIg5vgk0QI0DHmbTFiiGD9IS+BHj4PQZYie1gL /+awcqcVNoi7oTFXBcGgb2HM5Q+w2S3e/Z7lw7/hyo9+Uaj6oyY7XoycszsyJam0oFkn sUaw== X-Gm-Message-State: AOJu0Yy8o7afPpEZuT0xaa7FTHeyxasiG3KuiYHwEQ220x2/cgv4JDu4 M+PZ7PNQiu3yHFg1TLH/Ox6zAtUdsOY8E5dJ0GqN88g80zurw8nMsBAhPmqwmP/5DHgaWjSXT+r 3OMnDCXs= X-Gm-Gg: ASbGncumjpZ5FMtGGQXKRyhy8YcsmK8kh5wcLZCH5kDtQnBIQpkwDBClbMgjtbwN+Wp zYo6fuaINV/3Za/8oChNdef0dQ1S8oole7cWq+kPbLMp/QU9eQFA2DCy4MnNbXG5KXauNxBTkKd ipQgEvqsOe49SehSJMeyzvZdth+/D1tRcfANIKEIKDJStFv8jjCbV5foqxFseSofX0aZGrFZ1nj aIonQD7K3vdMXeZk5Yp32sqdlx8ENLy8TuqhGFgri3YG5wkS1txG9gddbwbBcSP1iew+dHcGZ9E MsyNVuyv6KsIg7eEogYzB/1xcvKReDvi5cyNbTBIxQM1aDHPxF0mCkjC0nnp7fiGxrv4L9SAyzF zGigBLcW+2/LQ+iaX2tp8FVKuJpdGT8EU2OrV X-Google-Smtp-Source: AGHT+IF/xp9xtsrYYtFgWY2jgwZ1jxqt6pCqm3KuEdJINai2XQg3tCErVbgW6sM/VbYyLUIeYNUUGg== X-Received: by 2002:a05:6a21:33a2:b0:231:acae:1983 with SMTP id adf61e73a8af0-24340c2263fmr31266570637.3.1756336848666; Wed, 27 Aug 2025 16:20:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 07/46] linux-user: Move hwcap functions to {arm, aarch64}/elfload.c Date: Thu, 28 Aug 2025 09:19:44 +1000 Message-ID: <20250827232023.50398-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1756336875085116600 Content-Type: text/plain; charset="utf-8" For get_elf_hwcap and get_elf_hwcap2, change the return type to abi_ulong, and pass in the cpu. We must do these targets at the same time because of the ifdef dependency between TARGET_AARCH64 and TARGET_ARM. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/aarch64/target_elf.h | 3 + linux-user/arm/target_elf.h | 3 + linux-user/arm/target_proc.h | 4 +- linux-user/loader.h | 10 +- linux-user/aarch64/elfload.c | 333 +++++++++++++++++++++ linux-user/arm/elfload.c | 161 ++++++++++ linux-user/elfload.c | 505 +------------------------------- 7 files changed, 510 insertions(+), 509 deletions(-) diff --git a/linux-user/aarch64/target_elf.h b/linux-user/aarch64/target_el= f.h index d955b3d07f..77108f3cb0 100644 --- a/linux-user/aarch64/target_elf.h +++ b/linux-user/aarch64/target_elf.h @@ -8,4 +8,7 @@ #ifndef AARCH64_TARGET_ELF_H #define AARCH64_TARGET_ELF_H =20 +#define HAVE_ELF_HWCAP 1 +#define HAVE_ELF_HWCAP2 1 + #endif diff --git a/linux-user/arm/target_elf.h b/linux-user/arm/target_elf.h index 2abb27a733..90470bd87b 100644 --- a/linux-user/arm/target_elf.h +++ b/linux-user/arm/target_elf.h @@ -8,4 +8,7 @@ #ifndef ARM_TARGET_ELF_H #define ARM_TARGET_ELF_H =20 +#define HAVE_ELF_HWCAP 1 +#define HAVE_ELF_HWCAP2 1 + #endif diff --git a/linux-user/arm/target_proc.h b/linux-user/arm/target_proc.h index ac75af9ca6..a4cd6948c6 100644 --- a/linux-user/arm/target_proc.h +++ b/linux-user/arm/target_proc.h @@ -10,8 +10,8 @@ static int open_cpuinfo(CPUArchState *cpu_env, int fd) { ARMCPU *cpu =3D env_archcpu(cpu_env); int arch, midr_rev, midr_part, midr_var, midr_impl; - target_ulong elf_hwcap =3D get_elf_hwcap(); - target_ulong elf_hwcap2 =3D get_elf_hwcap2(); + target_ulong elf_hwcap =3D get_elf_hwcap(env_cpu(cpu_env)); + target_ulong elf_hwcap2 =3D get_elf_hwcap2(env_cpu(cpu_env)); const char *elf_name; int num_cpus, len_part, len_var; =20 diff --git a/linux-user/loader.h b/linux-user/loader.h index 457bb36daa..151a06f5db 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -101,16 +101,14 @@ extern unsigned long guest_stack_size; /* Note that Elf32 and Elf64 use uint32_t for e_flags. */ const char *get_elf_cpu_model(uint32_t eflags); =20 -#if defined(TARGET_I386) || defined(TARGET_X86_64) +#if defined(TARGET_I386) || defined(TARGET_X86_64) || defined(TARGET_ARM) abi_ulong get_elf_hwcap(CPUState *cs); +abi_ulong get_elf_hwcap2(CPUState *cs); #endif -#if defined(TARGET_S390X) || defined(TARGET_AARCH64) || defined(TARGET_ARM) +#if defined(TARGET_S390X) uint32_t get_elf_hwcap(void); +#endif const char *elf_hwcap_str(uint32_t bit); -#endif -#if defined(TARGET_AARCH64) || defined(TARGET_ARM) -uint64_t get_elf_hwcap2(void); const char *elf_hwcap2_str(uint32_t bit); -#endif =20 #endif /* LINUX_USER_LOADER_H */ diff --git a/linux-user/aarch64/elfload.c b/linux-user/aarch64/elfload.c index b92442dfeb..92c8ea62c6 100644 --- a/linux-user/aarch64/elfload.c +++ b/linux-user/aarch64/elfload.c @@ -3,9 +3,342 @@ #include "qemu/osdep.h" #include "qemu.h" #include "loader.h" +#include "target/arm/cpu-features.h" =20 =20 const char *get_elf_cpu_model(uint32_t eflags) { return "any"; } + +enum { + ARM_HWCAP_A64_FP =3D 1 << 0, + ARM_HWCAP_A64_ASIMD =3D 1 << 1, + ARM_HWCAP_A64_EVTSTRM =3D 1 << 2, + ARM_HWCAP_A64_AES =3D 1 << 3, + ARM_HWCAP_A64_PMULL =3D 1 << 4, + ARM_HWCAP_A64_SHA1 =3D 1 << 5, + ARM_HWCAP_A64_SHA2 =3D 1 << 6, + ARM_HWCAP_A64_CRC32 =3D 1 << 7, + ARM_HWCAP_A64_ATOMICS =3D 1 << 8, + ARM_HWCAP_A64_FPHP =3D 1 << 9, + ARM_HWCAP_A64_ASIMDHP =3D 1 << 10, + ARM_HWCAP_A64_CPUID =3D 1 << 11, + ARM_HWCAP_A64_ASIMDRDM =3D 1 << 12, + ARM_HWCAP_A64_JSCVT =3D 1 << 13, + ARM_HWCAP_A64_FCMA =3D 1 << 14, + ARM_HWCAP_A64_LRCPC =3D 1 << 15, + ARM_HWCAP_A64_DCPOP =3D 1 << 16, + ARM_HWCAP_A64_SHA3 =3D 1 << 17, + ARM_HWCAP_A64_SM3 =3D 1 << 18, + ARM_HWCAP_A64_SM4 =3D 1 << 19, + ARM_HWCAP_A64_ASIMDDP =3D 1 << 20, + ARM_HWCAP_A64_SHA512 =3D 1 << 21, + ARM_HWCAP_A64_SVE =3D 1 << 22, + ARM_HWCAP_A64_ASIMDFHM =3D 1 << 23, + ARM_HWCAP_A64_DIT =3D 1 << 24, + ARM_HWCAP_A64_USCAT =3D 1 << 25, + ARM_HWCAP_A64_ILRCPC =3D 1 << 26, + ARM_HWCAP_A64_FLAGM =3D 1 << 27, + ARM_HWCAP_A64_SSBS =3D 1 << 28, + ARM_HWCAP_A64_SB =3D 1 << 29, + ARM_HWCAP_A64_PACA =3D 1 << 30, + ARM_HWCAP_A64_PACG =3D 1ULL << 31, + ARM_HWCAP_A64_GCS =3D 1ULL << 32, + ARM_HWCAP_A64_CMPBR =3D 1ULL << 33, + ARM_HWCAP_A64_FPRCVT =3D 1ULL << 34, + ARM_HWCAP_A64_F8MM8 =3D 1ULL << 35, + ARM_HWCAP_A64_F8MM4 =3D 1ULL << 36, + ARM_HWCAP_A64_SVE_F16MM =3D 1ULL << 37, + ARM_HWCAP_A64_SVE_ELTPERM =3D 1ULL << 38, + ARM_HWCAP_A64_SVE_AES2 =3D 1ULL << 39, + ARM_HWCAP_A64_SVE_BFSCALE =3D 1ULL << 40, + ARM_HWCAP_A64_SVE2P2 =3D 1ULL << 41, + ARM_HWCAP_A64_SME2P2 =3D 1ULL << 42, + ARM_HWCAP_A64_SME_SBITPERM =3D 1ULL << 43, + ARM_HWCAP_A64_SME_AES =3D 1ULL << 44, + ARM_HWCAP_A64_SME_SFEXPA =3D 1ULL << 45, + ARM_HWCAP_A64_SME_STMOP =3D 1ULL << 46, + ARM_HWCAP_A64_SME_SMOP4 =3D 1ULL << 47, + + ARM_HWCAP2_A64_DCPODP =3D 1 << 0, + ARM_HWCAP2_A64_SVE2 =3D 1 << 1, + ARM_HWCAP2_A64_SVEAES =3D 1 << 2, + ARM_HWCAP2_A64_SVEPMULL =3D 1 << 3, + ARM_HWCAP2_A64_SVEBITPERM =3D 1 << 4, + ARM_HWCAP2_A64_SVESHA3 =3D 1 << 5, + ARM_HWCAP2_A64_SVESM4 =3D 1 << 6, + ARM_HWCAP2_A64_FLAGM2 =3D 1 << 7, + ARM_HWCAP2_A64_FRINT =3D 1 << 8, + ARM_HWCAP2_A64_SVEI8MM =3D 1 << 9, + ARM_HWCAP2_A64_SVEF32MM =3D 1 << 10, + ARM_HWCAP2_A64_SVEF64MM =3D 1 << 11, + ARM_HWCAP2_A64_SVEBF16 =3D 1 << 12, + ARM_HWCAP2_A64_I8MM =3D 1 << 13, + ARM_HWCAP2_A64_BF16 =3D 1 << 14, + ARM_HWCAP2_A64_DGH =3D 1 << 15, + ARM_HWCAP2_A64_RNG =3D 1 << 16, + ARM_HWCAP2_A64_BTI =3D 1 << 17, + ARM_HWCAP2_A64_MTE =3D 1 << 18, + ARM_HWCAP2_A64_ECV =3D 1 << 19, + ARM_HWCAP2_A64_AFP =3D 1 << 20, + ARM_HWCAP2_A64_RPRES =3D 1 << 21, + ARM_HWCAP2_A64_MTE3 =3D 1 << 22, + ARM_HWCAP2_A64_SME =3D 1 << 23, + ARM_HWCAP2_A64_SME_I16I64 =3D 1 << 24, + ARM_HWCAP2_A64_SME_F64F64 =3D 1 << 25, + ARM_HWCAP2_A64_SME_I8I32 =3D 1 << 26, + ARM_HWCAP2_A64_SME_F16F32 =3D 1 << 27, + ARM_HWCAP2_A64_SME_B16F32 =3D 1 << 28, + ARM_HWCAP2_A64_SME_F32F32 =3D 1 << 29, + ARM_HWCAP2_A64_SME_FA64 =3D 1 << 30, + ARM_HWCAP2_A64_WFXT =3D 1ULL << 31, + ARM_HWCAP2_A64_EBF16 =3D 1ULL << 32, + ARM_HWCAP2_A64_SVE_EBF16 =3D 1ULL << 33, + ARM_HWCAP2_A64_CSSC =3D 1ULL << 34, + ARM_HWCAP2_A64_RPRFM =3D 1ULL << 35, + ARM_HWCAP2_A64_SVE2P1 =3D 1ULL << 36, + ARM_HWCAP2_A64_SME2 =3D 1ULL << 37, + ARM_HWCAP2_A64_SME2P1 =3D 1ULL << 38, + ARM_HWCAP2_A64_SME_I16I32 =3D 1ULL << 39, + ARM_HWCAP2_A64_SME_BI32I32 =3D 1ULL << 40, + ARM_HWCAP2_A64_SME_B16B16 =3D 1ULL << 41, + ARM_HWCAP2_A64_SME_F16F16 =3D 1ULL << 42, + ARM_HWCAP2_A64_MOPS =3D 1ULL << 43, + ARM_HWCAP2_A64_HBC =3D 1ULL << 44, + ARM_HWCAP2_A64_SVE_B16B16 =3D 1ULL << 45, + ARM_HWCAP2_A64_LRCPC3 =3D 1ULL << 46, + ARM_HWCAP2_A64_LSE128 =3D 1ULL << 47, + ARM_HWCAP2_A64_FPMR =3D 1ULL << 48, + ARM_HWCAP2_A64_LUT =3D 1ULL << 49, + ARM_HWCAP2_A64_FAMINMAX =3D 1ULL << 50, + ARM_HWCAP2_A64_F8CVT =3D 1ULL << 51, + ARM_HWCAP2_A64_F8FMA =3D 1ULL << 52, + ARM_HWCAP2_A64_F8DP4 =3D 1ULL << 53, + ARM_HWCAP2_A64_F8DP2 =3D 1ULL << 54, + ARM_HWCAP2_A64_F8E4M3 =3D 1ULL << 55, + ARM_HWCAP2_A64_F8E5M2 =3D 1ULL << 56, + ARM_HWCAP2_A64_SME_LUTV2 =3D 1ULL << 57, + ARM_HWCAP2_A64_SME_F8F16 =3D 1ULL << 58, + ARM_HWCAP2_A64_SME_F8F32 =3D 1ULL << 59, + ARM_HWCAP2_A64_SME_SF8FMA =3D 1ULL << 60, + ARM_HWCAP2_A64_SME_SF8DP4 =3D 1ULL << 61, + ARM_HWCAP2_A64_SME_SF8DP2 =3D 1ULL << 62, + ARM_HWCAP2_A64_POE =3D 1ULL << 63, +}; + +#define GET_FEATURE_ID(feat, hwcap) \ + do { if (cpu_isar_feature(feat, cpu)) { hwcaps |=3D hwcap; } } while (= 0) + +abi_ulong get_elf_hwcap(CPUState *cs) +{ + ARMCPU *cpu =3D ARM_CPU(cs); + abi_ulong hwcaps =3D 0; + + hwcaps |=3D ARM_HWCAP_A64_FP; + hwcaps |=3D ARM_HWCAP_A64_ASIMD; + hwcaps |=3D ARM_HWCAP_A64_CPUID; + + /* probe for the extra features */ + + GET_FEATURE_ID(aa64_aes, ARM_HWCAP_A64_AES); + GET_FEATURE_ID(aa64_pmull, ARM_HWCAP_A64_PMULL); + GET_FEATURE_ID(aa64_sha1, ARM_HWCAP_A64_SHA1); + GET_FEATURE_ID(aa64_sha256, ARM_HWCAP_A64_SHA2); + GET_FEATURE_ID(aa64_sha512, ARM_HWCAP_A64_SHA512); + GET_FEATURE_ID(aa64_crc32, ARM_HWCAP_A64_CRC32); + GET_FEATURE_ID(aa64_sha3, ARM_HWCAP_A64_SHA3); + GET_FEATURE_ID(aa64_sm3, ARM_HWCAP_A64_SM3); + GET_FEATURE_ID(aa64_sm4, ARM_HWCAP_A64_SM4); + GET_FEATURE_ID(aa64_fp16, ARM_HWCAP_A64_FPHP | ARM_HWCAP_A64_ASIMDHP); + GET_FEATURE_ID(aa64_atomics, ARM_HWCAP_A64_ATOMICS); + GET_FEATURE_ID(aa64_lse2, ARM_HWCAP_A64_USCAT); + GET_FEATURE_ID(aa64_rdm, ARM_HWCAP_A64_ASIMDRDM); + GET_FEATURE_ID(aa64_dp, ARM_HWCAP_A64_ASIMDDP); + GET_FEATURE_ID(aa64_fcma, ARM_HWCAP_A64_FCMA); + GET_FEATURE_ID(aa64_sve, ARM_HWCAP_A64_SVE); + GET_FEATURE_ID(aa64_pauth, ARM_HWCAP_A64_PACA | ARM_HWCAP_A64_PACG); + GET_FEATURE_ID(aa64_fhm, ARM_HWCAP_A64_ASIMDFHM); + GET_FEATURE_ID(aa64_dit, ARM_HWCAP_A64_DIT); + GET_FEATURE_ID(aa64_jscvt, ARM_HWCAP_A64_JSCVT); + GET_FEATURE_ID(aa64_sb, ARM_HWCAP_A64_SB); + GET_FEATURE_ID(aa64_condm_4, ARM_HWCAP_A64_FLAGM); + GET_FEATURE_ID(aa64_dcpop, ARM_HWCAP_A64_DCPOP); + GET_FEATURE_ID(aa64_rcpc_8_3, ARM_HWCAP_A64_LRCPC); + GET_FEATURE_ID(aa64_rcpc_8_4, ARM_HWCAP_A64_ILRCPC); + + return hwcaps; +} + +abi_ulong get_elf_hwcap2(CPUState *cs) +{ + ARMCPU *cpu =3D ARM_CPU(cs); + abi_ulong hwcaps =3D 0; + + GET_FEATURE_ID(aa64_dcpodp, ARM_HWCAP2_A64_DCPODP); + GET_FEATURE_ID(aa64_sve2, ARM_HWCAP2_A64_SVE2); + GET_FEATURE_ID(aa64_sve2_aes, ARM_HWCAP2_A64_SVEAES); + GET_FEATURE_ID(aa64_sve2_pmull128, ARM_HWCAP2_A64_SVEPMULL); + GET_FEATURE_ID(aa64_sve2_bitperm, ARM_HWCAP2_A64_SVEBITPERM); + GET_FEATURE_ID(aa64_sve2_sha3, ARM_HWCAP2_A64_SVESHA3); + GET_FEATURE_ID(aa64_sve2_sm4, ARM_HWCAP2_A64_SVESM4); + GET_FEATURE_ID(aa64_condm_5, ARM_HWCAP2_A64_FLAGM2); + GET_FEATURE_ID(aa64_frint, ARM_HWCAP2_A64_FRINT); + GET_FEATURE_ID(aa64_sve_i8mm, ARM_HWCAP2_A64_SVEI8MM); + GET_FEATURE_ID(aa64_sve_f32mm, ARM_HWCAP2_A64_SVEF32MM); + GET_FEATURE_ID(aa64_sve_f64mm, ARM_HWCAP2_A64_SVEF64MM); + GET_FEATURE_ID(aa64_sve_bf16, ARM_HWCAP2_A64_SVEBF16); + GET_FEATURE_ID(aa64_i8mm, ARM_HWCAP2_A64_I8MM); + GET_FEATURE_ID(aa64_bf16, ARM_HWCAP2_A64_BF16); + GET_FEATURE_ID(aa64_rndr, ARM_HWCAP2_A64_RNG); + GET_FEATURE_ID(aa64_bti, ARM_HWCAP2_A64_BTI); + GET_FEATURE_ID(aa64_mte, ARM_HWCAP2_A64_MTE); + GET_FEATURE_ID(aa64_mte3, ARM_HWCAP2_A64_MTE3); + GET_FEATURE_ID(aa64_sme, (ARM_HWCAP2_A64_SME | + ARM_HWCAP2_A64_SME_F32F32 | + ARM_HWCAP2_A64_SME_B16F32 | + ARM_HWCAP2_A64_SME_F16F32 | + ARM_HWCAP2_A64_SME_I8I32)); + GET_FEATURE_ID(aa64_sme_f64f64, ARM_HWCAP2_A64_SME_F64F64); + GET_FEATURE_ID(aa64_sme_i16i64, ARM_HWCAP2_A64_SME_I16I64); + GET_FEATURE_ID(aa64_sme_fa64, ARM_HWCAP2_A64_SME_FA64); + GET_FEATURE_ID(aa64_hbc, ARM_HWCAP2_A64_HBC); + GET_FEATURE_ID(aa64_mops, ARM_HWCAP2_A64_MOPS); + GET_FEATURE_ID(aa64_sve2p1, ARM_HWCAP2_A64_SVE2P1); + GET_FEATURE_ID(aa64_sme2, (ARM_HWCAP2_A64_SME2 | + ARM_HWCAP2_A64_SME_I16I32 | + ARM_HWCAP2_A64_SME_BI32I32)); + GET_FEATURE_ID(aa64_sme2p1, ARM_HWCAP2_A64_SME2P1); + GET_FEATURE_ID(aa64_sme_b16b16, ARM_HWCAP2_A64_SME_B16B16); + GET_FEATURE_ID(aa64_sme_f16f16, ARM_HWCAP2_A64_SME_F16F16); + GET_FEATURE_ID(aa64_sve_b16b16, ARM_HWCAP2_A64_SVE_B16B16); + + return hwcaps; +} + +const char *elf_hwcap_str(uint32_t bit) +{ + static const char * const hwcap_str[] =3D { + [__builtin_ctz(ARM_HWCAP_A64_FP )] =3D "fp", + [__builtin_ctz(ARM_HWCAP_A64_ASIMD )] =3D "asimd", + [__builtin_ctz(ARM_HWCAP_A64_EVTSTRM )] =3D "evtstrm", + [__builtin_ctz(ARM_HWCAP_A64_AES )] =3D "aes", + [__builtin_ctz(ARM_HWCAP_A64_PMULL )] =3D "pmull", + [__builtin_ctz(ARM_HWCAP_A64_SHA1 )] =3D "sha1", + [__builtin_ctz(ARM_HWCAP_A64_SHA2 )] =3D "sha2", + [__builtin_ctz(ARM_HWCAP_A64_CRC32 )] =3D "crc32", + [__builtin_ctz(ARM_HWCAP_A64_ATOMICS )] =3D "atomics", + [__builtin_ctz(ARM_HWCAP_A64_FPHP )] =3D "fphp", + [__builtin_ctz(ARM_HWCAP_A64_ASIMDHP )] =3D "asimdhp", + [__builtin_ctz(ARM_HWCAP_A64_CPUID )] =3D "cpuid", + [__builtin_ctz(ARM_HWCAP_A64_ASIMDRDM)] =3D "asimdrdm", + [__builtin_ctz(ARM_HWCAP_A64_JSCVT )] =3D "jscvt", + [__builtin_ctz(ARM_HWCAP_A64_FCMA )] =3D "fcma", + [__builtin_ctz(ARM_HWCAP_A64_LRCPC )] =3D "lrcpc", + [__builtin_ctz(ARM_HWCAP_A64_DCPOP )] =3D "dcpop", + [__builtin_ctz(ARM_HWCAP_A64_SHA3 )] =3D "sha3", + [__builtin_ctz(ARM_HWCAP_A64_SM3 )] =3D "sm3", + [__builtin_ctz(ARM_HWCAP_A64_SM4 )] =3D "sm4", + [__builtin_ctz(ARM_HWCAP_A64_ASIMDDP )] =3D "asimddp", + [__builtin_ctz(ARM_HWCAP_A64_SHA512 )] =3D "sha512", + [__builtin_ctz(ARM_HWCAP_A64_SVE )] =3D "sve", + [__builtin_ctz(ARM_HWCAP_A64_ASIMDFHM)] =3D "asimdfhm", + [__builtin_ctz(ARM_HWCAP_A64_DIT )] =3D "dit", + [__builtin_ctz(ARM_HWCAP_A64_USCAT )] =3D "uscat", + [__builtin_ctz(ARM_HWCAP_A64_ILRCPC )] =3D "ilrcpc", + [__builtin_ctz(ARM_HWCAP_A64_FLAGM )] =3D "flagm", + [__builtin_ctz(ARM_HWCAP_A64_SSBS )] =3D "ssbs", + [__builtin_ctz(ARM_HWCAP_A64_SB )] =3D "sb", + [__builtin_ctz(ARM_HWCAP_A64_PACA )] =3D "paca", + [__builtin_ctz(ARM_HWCAP_A64_PACG )] =3D "pacg", + [__builtin_ctzll(ARM_HWCAP_A64_GCS )] =3D "gcs", + [__builtin_ctzll(ARM_HWCAP_A64_CMPBR )] =3D "cmpbr", + [__builtin_ctzll(ARM_HWCAP_A64_FPRCVT)] =3D "fprcvt", + [__builtin_ctzll(ARM_HWCAP_A64_F8MM8 )] =3D "f8mm8", + [__builtin_ctzll(ARM_HWCAP_A64_F8MM4 )] =3D "f8mm4", + [__builtin_ctzll(ARM_HWCAP_A64_SVE_F16MM)] =3D "svef16mm", + [__builtin_ctzll(ARM_HWCAP_A64_SVE_ELTPERM)] =3D "sveeltperm", + [__builtin_ctzll(ARM_HWCAP_A64_SVE_AES2)] =3D "sveaes2", + [__builtin_ctzll(ARM_HWCAP_A64_SVE_BFSCALE)] =3D "svebfscale", + [__builtin_ctzll(ARM_HWCAP_A64_SVE2P2)] =3D "sve2p2", + [__builtin_ctzll(ARM_HWCAP_A64_SME2P2)] =3D "sme2p2", + [__builtin_ctzll(ARM_HWCAP_A64_SME_SBITPERM)] =3D "smesbitperm", + [__builtin_ctzll(ARM_HWCAP_A64_SME_AES)] =3D "smeaes", + [__builtin_ctzll(ARM_HWCAP_A64_SME_SFEXPA)] =3D "smesfexpa", + [__builtin_ctzll(ARM_HWCAP_A64_SME_STMOP)] =3D "smestmop", + [__builtin_ctzll(ARM_HWCAP_A64_SME_SMOP4)] =3D "smesmop4", + }; + + return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; +} + +const char *elf_hwcap2_str(uint32_t bit) +{ + static const char * const hwcap_str[] =3D { + [__builtin_ctz(ARM_HWCAP2_A64_DCPODP )] =3D "dcpodp", + [__builtin_ctz(ARM_HWCAP2_A64_SVE2 )] =3D "sve2", + [__builtin_ctz(ARM_HWCAP2_A64_SVEAES )] =3D "sveaes", + [__builtin_ctz(ARM_HWCAP2_A64_SVEPMULL )] =3D "svepmull", + [__builtin_ctz(ARM_HWCAP2_A64_SVEBITPERM )] =3D "svebitperm", + [__builtin_ctz(ARM_HWCAP2_A64_SVESHA3 )] =3D "svesha3", + [__builtin_ctz(ARM_HWCAP2_A64_SVESM4 )] =3D "svesm4", + [__builtin_ctz(ARM_HWCAP2_A64_FLAGM2 )] =3D "flagm2", + [__builtin_ctz(ARM_HWCAP2_A64_FRINT )] =3D "frint", + [__builtin_ctz(ARM_HWCAP2_A64_SVEI8MM )] =3D "svei8mm", + [__builtin_ctz(ARM_HWCAP2_A64_SVEF32MM )] =3D "svef32mm", + [__builtin_ctz(ARM_HWCAP2_A64_SVEF64MM )] =3D "svef64mm", + [__builtin_ctz(ARM_HWCAP2_A64_SVEBF16 )] =3D "svebf16", + [__builtin_ctz(ARM_HWCAP2_A64_I8MM )] =3D "i8mm", + [__builtin_ctz(ARM_HWCAP2_A64_BF16 )] =3D "bf16", + [__builtin_ctz(ARM_HWCAP2_A64_DGH )] =3D "dgh", + [__builtin_ctz(ARM_HWCAP2_A64_RNG )] =3D "rng", + [__builtin_ctz(ARM_HWCAP2_A64_BTI )] =3D "bti", + [__builtin_ctz(ARM_HWCAP2_A64_MTE )] =3D "mte", + [__builtin_ctz(ARM_HWCAP2_A64_ECV )] =3D "ecv", + [__builtin_ctz(ARM_HWCAP2_A64_AFP )] =3D "afp", + [__builtin_ctz(ARM_HWCAP2_A64_RPRES )] =3D "rpres", + [__builtin_ctz(ARM_HWCAP2_A64_MTE3 )] =3D "mte3", + [__builtin_ctz(ARM_HWCAP2_A64_SME )] =3D "sme", + [__builtin_ctz(ARM_HWCAP2_A64_SME_I16I64 )] =3D "smei16i64", + [__builtin_ctz(ARM_HWCAP2_A64_SME_F64F64 )] =3D "smef64f64", + [__builtin_ctz(ARM_HWCAP2_A64_SME_I8I32 )] =3D "smei8i32", + [__builtin_ctz(ARM_HWCAP2_A64_SME_F16F32 )] =3D "smef16f32", + [__builtin_ctz(ARM_HWCAP2_A64_SME_B16F32 )] =3D "smeb16f32", + [__builtin_ctz(ARM_HWCAP2_A64_SME_F32F32 )] =3D "smef32f32", + [__builtin_ctz(ARM_HWCAP2_A64_SME_FA64 )] =3D "smefa64", + [__builtin_ctz(ARM_HWCAP2_A64_WFXT )] =3D "wfxt", + [__builtin_ctzll(ARM_HWCAP2_A64_EBF16 )] =3D "ebf16", + [__builtin_ctzll(ARM_HWCAP2_A64_SVE_EBF16 )] =3D "sveebf16", + [__builtin_ctzll(ARM_HWCAP2_A64_CSSC )] =3D "cssc", + [__builtin_ctzll(ARM_HWCAP2_A64_RPRFM )] =3D "rprfm", + [__builtin_ctzll(ARM_HWCAP2_A64_SVE2P1 )] =3D "sve2p1", + [__builtin_ctzll(ARM_HWCAP2_A64_SME2 )] =3D "sme2", + [__builtin_ctzll(ARM_HWCAP2_A64_SME2P1 )] =3D "sme2p1", + [__builtin_ctzll(ARM_HWCAP2_A64_SME_I16I32 )] =3D "smei16i32", + [__builtin_ctzll(ARM_HWCAP2_A64_SME_BI32I32)] =3D "smebi32i32", + [__builtin_ctzll(ARM_HWCAP2_A64_SME_B16B16 )] =3D "smeb16b16", + [__builtin_ctzll(ARM_HWCAP2_A64_SME_F16F16 )] =3D "smef16f16", + [__builtin_ctzll(ARM_HWCAP2_A64_MOPS )] =3D "mops", + [__builtin_ctzll(ARM_HWCAP2_A64_HBC )] =3D "hbc", + [__builtin_ctzll(ARM_HWCAP2_A64_SVE_B16B16 )] =3D "sveb16b16", + [__builtin_ctzll(ARM_HWCAP2_A64_LRCPC3 )] =3D "lrcpc3", + [__builtin_ctzll(ARM_HWCAP2_A64_LSE128 )] =3D "lse128", + [__builtin_ctzll(ARM_HWCAP2_A64_FPMR )] =3D "fpmr", + [__builtin_ctzll(ARM_HWCAP2_A64_LUT )] =3D "lut", + [__builtin_ctzll(ARM_HWCAP2_A64_FAMINMAX )] =3D "faminmax", + [__builtin_ctzll(ARM_HWCAP2_A64_F8CVT )] =3D "f8cvt", + [__builtin_ctzll(ARM_HWCAP2_A64_F8FMA )] =3D "f8fma", + [__builtin_ctzll(ARM_HWCAP2_A64_F8DP4 )] =3D "f8dp4", + [__builtin_ctzll(ARM_HWCAP2_A64_F8DP2 )] =3D "f8dp2", + [__builtin_ctzll(ARM_HWCAP2_A64_F8E4M3 )] =3D "f8e4m3", + [__builtin_ctzll(ARM_HWCAP2_A64_F8E5M2 )] =3D "f8e5m2", + [__builtin_ctzll(ARM_HWCAP2_A64_SME_LUTV2 )] =3D "smelutv2", + [__builtin_ctzll(ARM_HWCAP2_A64_SME_F8F16 )] =3D "smef8f16", + [__builtin_ctzll(ARM_HWCAP2_A64_SME_F8F32 )] =3D "smef8f32", + [__builtin_ctzll(ARM_HWCAP2_A64_SME_SF8DP4 )] =3D "smesf8dp4", + [__builtin_ctzll(ARM_HWCAP2_A64_SME_SF8DP2 )] =3D "smesf8dp2", + [__builtin_ctzll(ARM_HWCAP2_A64_POE )] =3D "poe", + }; + + return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; +} diff --git a/linux-user/arm/elfload.c b/linux-user/arm/elfload.c index b92442dfeb..c7561b005b 100644 --- a/linux-user/arm/elfload.c +++ b/linux-user/arm/elfload.c @@ -3,9 +3,170 @@ #include "qemu/osdep.h" #include "qemu.h" #include "loader.h" +#include "target/arm/cpu-features.h" =20 =20 const char *get_elf_cpu_model(uint32_t eflags) { return "any"; } + +enum +{ + ARM_HWCAP_ARM_SWP =3D 1 << 0, + ARM_HWCAP_ARM_HALF =3D 1 << 1, + ARM_HWCAP_ARM_THUMB =3D 1 << 2, + ARM_HWCAP_ARM_26BIT =3D 1 << 3, + ARM_HWCAP_ARM_FAST_MULT =3D 1 << 4, + ARM_HWCAP_ARM_FPA =3D 1 << 5, + ARM_HWCAP_ARM_VFP =3D 1 << 6, + ARM_HWCAP_ARM_EDSP =3D 1 << 7, + ARM_HWCAP_ARM_JAVA =3D 1 << 8, + ARM_HWCAP_ARM_IWMMXT =3D 1 << 9, + ARM_HWCAP_ARM_CRUNCH =3D 1 << 10, + ARM_HWCAP_ARM_THUMBEE =3D 1 << 11, + ARM_HWCAP_ARM_NEON =3D 1 << 12, + ARM_HWCAP_ARM_VFPv3 =3D 1 << 13, + ARM_HWCAP_ARM_VFPv3D16 =3D 1 << 14, + ARM_HWCAP_ARM_TLS =3D 1 << 15, + ARM_HWCAP_ARM_VFPv4 =3D 1 << 16, + ARM_HWCAP_ARM_IDIVA =3D 1 << 17, + ARM_HWCAP_ARM_IDIVT =3D 1 << 18, + ARM_HWCAP_ARM_VFPD32 =3D 1 << 19, + ARM_HWCAP_ARM_LPAE =3D 1 << 20, + ARM_HWCAP_ARM_EVTSTRM =3D 1 << 21, + ARM_HWCAP_ARM_FPHP =3D 1 << 22, + ARM_HWCAP_ARM_ASIMDHP =3D 1 << 23, + ARM_HWCAP_ARM_ASIMDDP =3D 1 << 24, + ARM_HWCAP_ARM_ASIMDFHM =3D 1 << 25, + ARM_HWCAP_ARM_ASIMDBF16 =3D 1 << 26, + ARM_HWCAP_ARM_I8MM =3D 1 << 27, +}; + +enum { + ARM_HWCAP2_ARM_AES =3D 1 << 0, + ARM_HWCAP2_ARM_PMULL =3D 1 << 1, + ARM_HWCAP2_ARM_SHA1 =3D 1 << 2, + ARM_HWCAP2_ARM_SHA2 =3D 1 << 3, + ARM_HWCAP2_ARM_CRC32 =3D 1 << 4, + ARM_HWCAP2_ARM_SB =3D 1 << 5, + ARM_HWCAP2_ARM_SSBS =3D 1 << 6, +}; + +abi_ulong get_elf_hwcap(CPUState *cs) +{ + ARMCPU *cpu =3D ARM_CPU(cs); + abi_ulong hwcaps =3D 0; + + hwcaps |=3D ARM_HWCAP_ARM_SWP; + hwcaps |=3D ARM_HWCAP_ARM_HALF; + hwcaps |=3D ARM_HWCAP_ARM_THUMB; + hwcaps |=3D ARM_HWCAP_ARM_FAST_MULT; + + /* probe for the extra features */ +#define GET_FEATURE(feat, hwcap) \ + do { if (arm_feature(&cpu->env, feat)) { hwcaps |=3D hwcap; } } while = (0) + +#define GET_FEATURE_ID(feat, hwcap) \ + do { if (cpu_isar_feature(feat, cpu)) { hwcaps |=3D hwcap; } } while (= 0) + + /* EDSP is in v5TE and above, but all our v5 CPUs are v5TE */ + GET_FEATURE(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP); + GET_FEATURE(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT); + GET_FEATURE(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE); + GET_FEATURE(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON); + GET_FEATURE(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS); + GET_FEATURE(ARM_FEATURE_LPAE, ARM_HWCAP_ARM_LPAE); + GET_FEATURE_ID(aa32_arm_div, ARM_HWCAP_ARM_IDIVA); + GET_FEATURE_ID(aa32_thumb_div, ARM_HWCAP_ARM_IDIVT); + GET_FEATURE_ID(aa32_vfp, ARM_HWCAP_ARM_VFP); + + if (cpu_isar_feature(aa32_fpsp_v3, cpu) || + cpu_isar_feature(aa32_fpdp_v3, cpu)) { + hwcaps |=3D ARM_HWCAP_ARM_VFPv3; + if (cpu_isar_feature(aa32_simd_r32, cpu)) { + hwcaps |=3D ARM_HWCAP_ARM_VFPD32; + } else { + hwcaps |=3D ARM_HWCAP_ARM_VFPv3D16; + } + } + GET_FEATURE_ID(aa32_simdfmac, ARM_HWCAP_ARM_VFPv4); + /* + * MVFR1.FPHP and .SIMDHP must be in sync, and QEMU uses the same + * isar_feature function for both. The kernel reports them as two hwca= ps. + */ + GET_FEATURE_ID(aa32_fp16_arith, ARM_HWCAP_ARM_FPHP); + GET_FEATURE_ID(aa32_fp16_arith, ARM_HWCAP_ARM_ASIMDHP); + GET_FEATURE_ID(aa32_dp, ARM_HWCAP_ARM_ASIMDDP); + GET_FEATURE_ID(aa32_fhm, ARM_HWCAP_ARM_ASIMDFHM); + GET_FEATURE_ID(aa32_bf16, ARM_HWCAP_ARM_ASIMDBF16); + GET_FEATURE_ID(aa32_i8mm, ARM_HWCAP_ARM_I8MM); + + return hwcaps; +} + +abi_ulong get_elf_hwcap2(CPUState *cs) +{ + ARMCPU *cpu =3D ARM_CPU(cs); + abi_ulong hwcaps =3D 0; + + GET_FEATURE_ID(aa32_aes, ARM_HWCAP2_ARM_AES); + GET_FEATURE_ID(aa32_pmull, ARM_HWCAP2_ARM_PMULL); + GET_FEATURE_ID(aa32_sha1, ARM_HWCAP2_ARM_SHA1); + GET_FEATURE_ID(aa32_sha2, ARM_HWCAP2_ARM_SHA2); + GET_FEATURE_ID(aa32_crc32, ARM_HWCAP2_ARM_CRC32); + GET_FEATURE_ID(aa32_sb, ARM_HWCAP2_ARM_SB); + GET_FEATURE_ID(aa32_ssbs, ARM_HWCAP2_ARM_SSBS); + return hwcaps; +} + +const char *elf_hwcap_str(uint32_t bit) +{ + static const char *hwcap_str[] =3D { + [__builtin_ctz(ARM_HWCAP_ARM_SWP )] =3D "swp", + [__builtin_ctz(ARM_HWCAP_ARM_HALF )] =3D "half", + [__builtin_ctz(ARM_HWCAP_ARM_THUMB )] =3D "thumb", + [__builtin_ctz(ARM_HWCAP_ARM_26BIT )] =3D "26bit", + [__builtin_ctz(ARM_HWCAP_ARM_FAST_MULT)] =3D "fast_mult", + [__builtin_ctz(ARM_HWCAP_ARM_FPA )] =3D "fpa", + [__builtin_ctz(ARM_HWCAP_ARM_VFP )] =3D "vfp", + [__builtin_ctz(ARM_HWCAP_ARM_EDSP )] =3D "edsp", + [__builtin_ctz(ARM_HWCAP_ARM_JAVA )] =3D "java", + [__builtin_ctz(ARM_HWCAP_ARM_IWMMXT )] =3D "iwmmxt", + [__builtin_ctz(ARM_HWCAP_ARM_CRUNCH )] =3D "crunch", + [__builtin_ctz(ARM_HWCAP_ARM_THUMBEE )] =3D "thumbee", + [__builtin_ctz(ARM_HWCAP_ARM_NEON )] =3D "neon", + [__builtin_ctz(ARM_HWCAP_ARM_VFPv3 )] =3D "vfpv3", + [__builtin_ctz(ARM_HWCAP_ARM_VFPv3D16 )] =3D "vfpv3d16", + [__builtin_ctz(ARM_HWCAP_ARM_TLS )] =3D "tls", + [__builtin_ctz(ARM_HWCAP_ARM_VFPv4 )] =3D "vfpv4", + [__builtin_ctz(ARM_HWCAP_ARM_IDIVA )] =3D "idiva", + [__builtin_ctz(ARM_HWCAP_ARM_IDIVT )] =3D "idivt", + [__builtin_ctz(ARM_HWCAP_ARM_VFPD32 )] =3D "vfpd32", + [__builtin_ctz(ARM_HWCAP_ARM_LPAE )] =3D "lpae", + [__builtin_ctz(ARM_HWCAP_ARM_EVTSTRM )] =3D "evtstrm", + [__builtin_ctz(ARM_HWCAP_ARM_FPHP )] =3D "fphp", + [__builtin_ctz(ARM_HWCAP_ARM_ASIMDHP )] =3D "asimdhp", + [__builtin_ctz(ARM_HWCAP_ARM_ASIMDDP )] =3D "asimddp", + [__builtin_ctz(ARM_HWCAP_ARM_ASIMDFHM )] =3D "asimdfhm", + [__builtin_ctz(ARM_HWCAP_ARM_ASIMDBF16)] =3D "asimdbf16", + [__builtin_ctz(ARM_HWCAP_ARM_I8MM )] =3D "i8mm", + }; + + return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; +} + +const char *elf_hwcap2_str(uint32_t bit) +{ + static const char *hwcap_str[] =3D { + [__builtin_ctz(ARM_HWCAP2_ARM_AES )] =3D "aes", + [__builtin_ctz(ARM_HWCAP2_ARM_PMULL)] =3D "pmull", + [__builtin_ctz(ARM_HWCAP2_ARM_SHA1 )] =3D "sha1", + [__builtin_ctz(ARM_HWCAP2_ARM_SHA2 )] =3D "sha2", + [__builtin_ctz(ARM_HWCAP2_ARM_CRC32)] =3D "crc32", + [__builtin_ctz(ARM_HWCAP2_ARM_SB )] =3D "sb", + [__builtin_ctz(ARM_HWCAP2_ARM_SSBS )] =3D "ssbs", + }; + + return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; +} diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 0c62c249e9..149d1313c0 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -401,48 +401,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, const CPUARMState *en #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 =20 -enum -{ - ARM_HWCAP_ARM_SWP =3D 1 << 0, - ARM_HWCAP_ARM_HALF =3D 1 << 1, - ARM_HWCAP_ARM_THUMB =3D 1 << 2, - ARM_HWCAP_ARM_26BIT =3D 1 << 3, - ARM_HWCAP_ARM_FAST_MULT =3D 1 << 4, - ARM_HWCAP_ARM_FPA =3D 1 << 5, - ARM_HWCAP_ARM_VFP =3D 1 << 6, - ARM_HWCAP_ARM_EDSP =3D 1 << 7, - ARM_HWCAP_ARM_JAVA =3D 1 << 8, - ARM_HWCAP_ARM_IWMMXT =3D 1 << 9, - ARM_HWCAP_ARM_CRUNCH =3D 1 << 10, - ARM_HWCAP_ARM_THUMBEE =3D 1 << 11, - ARM_HWCAP_ARM_NEON =3D 1 << 12, - ARM_HWCAP_ARM_VFPv3 =3D 1 << 13, - ARM_HWCAP_ARM_VFPv3D16 =3D 1 << 14, - ARM_HWCAP_ARM_TLS =3D 1 << 15, - ARM_HWCAP_ARM_VFPv4 =3D 1 << 16, - ARM_HWCAP_ARM_IDIVA =3D 1 << 17, - ARM_HWCAP_ARM_IDIVT =3D 1 << 18, - ARM_HWCAP_ARM_VFPD32 =3D 1 << 19, - ARM_HWCAP_ARM_LPAE =3D 1 << 20, - ARM_HWCAP_ARM_EVTSTRM =3D 1 << 21, - ARM_HWCAP_ARM_FPHP =3D 1 << 22, - ARM_HWCAP_ARM_ASIMDHP =3D 1 << 23, - ARM_HWCAP_ARM_ASIMDDP =3D 1 << 24, - ARM_HWCAP_ARM_ASIMDFHM =3D 1 << 25, - ARM_HWCAP_ARM_ASIMDBF16 =3D 1 << 26, - ARM_HWCAP_ARM_I8MM =3D 1 << 27, -}; - -enum { - ARM_HWCAP2_ARM_AES =3D 1 << 0, - ARM_HWCAP2_ARM_PMULL =3D 1 << 1, - ARM_HWCAP2_ARM_SHA1 =3D 1 << 2, - ARM_HWCAP2_ARM_SHA2 =3D 1 << 3, - ARM_HWCAP2_ARM_CRC32 =3D 1 << 4, - ARM_HWCAP2_ARM_SB =3D 1 << 5, - ARM_HWCAP2_ARM_SSBS =3D 1 << 6, -}; - /* The commpage only exists for 32 bit kernels */ =20 #define HI_COMMPAGE (intptr_t)0xffff0f00u @@ -491,129 +449,8 @@ static bool init_guest_commpage(void) return true; } =20 -#define ELF_HWCAP get_elf_hwcap() -#define ELF_HWCAP2 get_elf_hwcap2() - -uint32_t get_elf_hwcap(void) -{ - ARMCPU *cpu =3D ARM_CPU(thread_cpu); - uint32_t hwcaps =3D 0; - - hwcaps |=3D ARM_HWCAP_ARM_SWP; - hwcaps |=3D ARM_HWCAP_ARM_HALF; - hwcaps |=3D ARM_HWCAP_ARM_THUMB; - hwcaps |=3D ARM_HWCAP_ARM_FAST_MULT; - - /* probe for the extra features */ -#define GET_FEATURE(feat, hwcap) \ - do { if (arm_feature(&cpu->env, feat)) { hwcaps |=3D hwcap; } } while = (0) - -#define GET_FEATURE_ID(feat, hwcap) \ - do { if (cpu_isar_feature(feat, cpu)) { hwcaps |=3D hwcap; } } while (= 0) - - /* EDSP is in v5TE and above, but all our v5 CPUs are v5TE */ - GET_FEATURE(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP); - GET_FEATURE(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT); - GET_FEATURE(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE); - GET_FEATURE(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON); - GET_FEATURE(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS); - GET_FEATURE(ARM_FEATURE_LPAE, ARM_HWCAP_ARM_LPAE); - GET_FEATURE_ID(aa32_arm_div, ARM_HWCAP_ARM_IDIVA); - GET_FEATURE_ID(aa32_thumb_div, ARM_HWCAP_ARM_IDIVT); - GET_FEATURE_ID(aa32_vfp, ARM_HWCAP_ARM_VFP); - - if (cpu_isar_feature(aa32_fpsp_v3, cpu) || - cpu_isar_feature(aa32_fpdp_v3, cpu)) { - hwcaps |=3D ARM_HWCAP_ARM_VFPv3; - if (cpu_isar_feature(aa32_simd_r32, cpu)) { - hwcaps |=3D ARM_HWCAP_ARM_VFPD32; - } else { - hwcaps |=3D ARM_HWCAP_ARM_VFPv3D16; - } - } - GET_FEATURE_ID(aa32_simdfmac, ARM_HWCAP_ARM_VFPv4); - /* - * MVFR1.FPHP and .SIMDHP must be in sync, and QEMU uses the same - * isar_feature function for both. The kernel reports them as two hwca= ps. - */ - GET_FEATURE_ID(aa32_fp16_arith, ARM_HWCAP_ARM_FPHP); - GET_FEATURE_ID(aa32_fp16_arith, ARM_HWCAP_ARM_ASIMDHP); - GET_FEATURE_ID(aa32_dp, ARM_HWCAP_ARM_ASIMDDP); - GET_FEATURE_ID(aa32_fhm, ARM_HWCAP_ARM_ASIMDFHM); - GET_FEATURE_ID(aa32_bf16, ARM_HWCAP_ARM_ASIMDBF16); - GET_FEATURE_ID(aa32_i8mm, ARM_HWCAP_ARM_I8MM); - - return hwcaps; -} - -uint64_t get_elf_hwcap2(void) -{ - ARMCPU *cpu =3D ARM_CPU(thread_cpu); - uint64_t hwcaps =3D 0; - - GET_FEATURE_ID(aa32_aes, ARM_HWCAP2_ARM_AES); - GET_FEATURE_ID(aa32_pmull, ARM_HWCAP2_ARM_PMULL); - GET_FEATURE_ID(aa32_sha1, ARM_HWCAP2_ARM_SHA1); - GET_FEATURE_ID(aa32_sha2, ARM_HWCAP2_ARM_SHA2); - GET_FEATURE_ID(aa32_crc32, ARM_HWCAP2_ARM_CRC32); - GET_FEATURE_ID(aa32_sb, ARM_HWCAP2_ARM_SB); - GET_FEATURE_ID(aa32_ssbs, ARM_HWCAP2_ARM_SSBS); - return hwcaps; -} - -const char *elf_hwcap_str(uint32_t bit) -{ - static const char *hwcap_str[] =3D { - [__builtin_ctz(ARM_HWCAP_ARM_SWP )] =3D "swp", - [__builtin_ctz(ARM_HWCAP_ARM_HALF )] =3D "half", - [__builtin_ctz(ARM_HWCAP_ARM_THUMB )] =3D "thumb", - [__builtin_ctz(ARM_HWCAP_ARM_26BIT )] =3D "26bit", - [__builtin_ctz(ARM_HWCAP_ARM_FAST_MULT)] =3D "fast_mult", - [__builtin_ctz(ARM_HWCAP_ARM_FPA )] =3D "fpa", - [__builtin_ctz(ARM_HWCAP_ARM_VFP )] =3D "vfp", - [__builtin_ctz(ARM_HWCAP_ARM_EDSP )] =3D "edsp", - [__builtin_ctz(ARM_HWCAP_ARM_JAVA )] =3D "java", - [__builtin_ctz(ARM_HWCAP_ARM_IWMMXT )] =3D "iwmmxt", - [__builtin_ctz(ARM_HWCAP_ARM_CRUNCH )] =3D "crunch", - [__builtin_ctz(ARM_HWCAP_ARM_THUMBEE )] =3D "thumbee", - [__builtin_ctz(ARM_HWCAP_ARM_NEON )] =3D "neon", - [__builtin_ctz(ARM_HWCAP_ARM_VFPv3 )] =3D "vfpv3", - [__builtin_ctz(ARM_HWCAP_ARM_VFPv3D16 )] =3D "vfpv3d16", - [__builtin_ctz(ARM_HWCAP_ARM_TLS )] =3D "tls", - [__builtin_ctz(ARM_HWCAP_ARM_VFPv4 )] =3D "vfpv4", - [__builtin_ctz(ARM_HWCAP_ARM_IDIVA )] =3D "idiva", - [__builtin_ctz(ARM_HWCAP_ARM_IDIVT )] =3D "idivt", - [__builtin_ctz(ARM_HWCAP_ARM_VFPD32 )] =3D "vfpd32", - [__builtin_ctz(ARM_HWCAP_ARM_LPAE )] =3D "lpae", - [__builtin_ctz(ARM_HWCAP_ARM_EVTSTRM )] =3D "evtstrm", - [__builtin_ctz(ARM_HWCAP_ARM_FPHP )] =3D "fphp", - [__builtin_ctz(ARM_HWCAP_ARM_ASIMDHP )] =3D "asimdhp", - [__builtin_ctz(ARM_HWCAP_ARM_ASIMDDP )] =3D "asimddp", - [__builtin_ctz(ARM_HWCAP_ARM_ASIMDFHM )] =3D "asimdfhm", - [__builtin_ctz(ARM_HWCAP_ARM_ASIMDBF16)] =3D "asimdbf16", - [__builtin_ctz(ARM_HWCAP_ARM_I8MM )] =3D "i8mm", - }; - - return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; -} - -const char *elf_hwcap2_str(uint32_t bit) -{ - static const char *hwcap_str[] =3D { - [__builtin_ctz(ARM_HWCAP2_ARM_AES )] =3D "aes", - [__builtin_ctz(ARM_HWCAP2_ARM_PMULL)] =3D "pmull", - [__builtin_ctz(ARM_HWCAP2_ARM_SHA1 )] =3D "sha1", - [__builtin_ctz(ARM_HWCAP2_ARM_SHA2 )] =3D "sha2", - [__builtin_ctz(ARM_HWCAP2_ARM_CRC32)] =3D "crc32", - [__builtin_ctz(ARM_HWCAP2_ARM_SB )] =3D "sb", - [__builtin_ctz(ARM_HWCAP2_ARM_SSBS )] =3D "ssbs", - }; - - return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; -} - -#undef GET_FEATURE -#undef GET_FEATURE_ID +#define ELF_HWCAP get_elf_hwcap(thread_cpu) +#define ELF_HWCAP2 get_elf_hwcap2(thread_cpu) =20 #define ELF_PLATFORM get_elf_platform() =20 @@ -702,342 +539,8 @@ static void elf_core_copy_regs(target_elf_gregset_t *= regs, #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 =20 -enum { - ARM_HWCAP_A64_FP =3D 1 << 0, - ARM_HWCAP_A64_ASIMD =3D 1 << 1, - ARM_HWCAP_A64_EVTSTRM =3D 1 << 2, - ARM_HWCAP_A64_AES =3D 1 << 3, - ARM_HWCAP_A64_PMULL =3D 1 << 4, - ARM_HWCAP_A64_SHA1 =3D 1 << 5, - ARM_HWCAP_A64_SHA2 =3D 1 << 6, - ARM_HWCAP_A64_CRC32 =3D 1 << 7, - ARM_HWCAP_A64_ATOMICS =3D 1 << 8, - ARM_HWCAP_A64_FPHP =3D 1 << 9, - ARM_HWCAP_A64_ASIMDHP =3D 1 << 10, - ARM_HWCAP_A64_CPUID =3D 1 << 11, - ARM_HWCAP_A64_ASIMDRDM =3D 1 << 12, - ARM_HWCAP_A64_JSCVT =3D 1 << 13, - ARM_HWCAP_A64_FCMA =3D 1 << 14, - ARM_HWCAP_A64_LRCPC =3D 1 << 15, - ARM_HWCAP_A64_DCPOP =3D 1 << 16, - ARM_HWCAP_A64_SHA3 =3D 1 << 17, - ARM_HWCAP_A64_SM3 =3D 1 << 18, - ARM_HWCAP_A64_SM4 =3D 1 << 19, - ARM_HWCAP_A64_ASIMDDP =3D 1 << 20, - ARM_HWCAP_A64_SHA512 =3D 1 << 21, - ARM_HWCAP_A64_SVE =3D 1 << 22, - ARM_HWCAP_A64_ASIMDFHM =3D 1 << 23, - ARM_HWCAP_A64_DIT =3D 1 << 24, - ARM_HWCAP_A64_USCAT =3D 1 << 25, - ARM_HWCAP_A64_ILRCPC =3D 1 << 26, - ARM_HWCAP_A64_FLAGM =3D 1 << 27, - ARM_HWCAP_A64_SSBS =3D 1 << 28, - ARM_HWCAP_A64_SB =3D 1 << 29, - ARM_HWCAP_A64_PACA =3D 1 << 30, - ARM_HWCAP_A64_PACG =3D 1ULL << 31, - ARM_HWCAP_A64_GCS =3D 1ULL << 32, - ARM_HWCAP_A64_CMPBR =3D 1ULL << 33, - ARM_HWCAP_A64_FPRCVT =3D 1ULL << 34, - ARM_HWCAP_A64_F8MM8 =3D 1ULL << 35, - ARM_HWCAP_A64_F8MM4 =3D 1ULL << 36, - ARM_HWCAP_A64_SVE_F16MM =3D 1ULL << 37, - ARM_HWCAP_A64_SVE_ELTPERM =3D 1ULL << 38, - ARM_HWCAP_A64_SVE_AES2 =3D 1ULL << 39, - ARM_HWCAP_A64_SVE_BFSCALE =3D 1ULL << 40, - ARM_HWCAP_A64_SVE2P2 =3D 1ULL << 41, - ARM_HWCAP_A64_SME2P2 =3D 1ULL << 42, - ARM_HWCAP_A64_SME_SBITPERM =3D 1ULL << 43, - ARM_HWCAP_A64_SME_AES =3D 1ULL << 44, - ARM_HWCAP_A64_SME_SFEXPA =3D 1ULL << 45, - ARM_HWCAP_A64_SME_STMOP =3D 1ULL << 46, - ARM_HWCAP_A64_SME_SMOP4 =3D 1ULL << 47, - - ARM_HWCAP2_A64_DCPODP =3D 1 << 0, - ARM_HWCAP2_A64_SVE2 =3D 1 << 1, - ARM_HWCAP2_A64_SVEAES =3D 1 << 2, - ARM_HWCAP2_A64_SVEPMULL =3D 1 << 3, - ARM_HWCAP2_A64_SVEBITPERM =3D 1 << 4, - ARM_HWCAP2_A64_SVESHA3 =3D 1 << 5, - ARM_HWCAP2_A64_SVESM4 =3D 1 << 6, - ARM_HWCAP2_A64_FLAGM2 =3D 1 << 7, - ARM_HWCAP2_A64_FRINT =3D 1 << 8, - ARM_HWCAP2_A64_SVEI8MM =3D 1 << 9, - ARM_HWCAP2_A64_SVEF32MM =3D 1 << 10, - ARM_HWCAP2_A64_SVEF64MM =3D 1 << 11, - ARM_HWCAP2_A64_SVEBF16 =3D 1 << 12, - ARM_HWCAP2_A64_I8MM =3D 1 << 13, - ARM_HWCAP2_A64_BF16 =3D 1 << 14, - ARM_HWCAP2_A64_DGH =3D 1 << 15, - ARM_HWCAP2_A64_RNG =3D 1 << 16, - ARM_HWCAP2_A64_BTI =3D 1 << 17, - ARM_HWCAP2_A64_MTE =3D 1 << 18, - ARM_HWCAP2_A64_ECV =3D 1 << 19, - ARM_HWCAP2_A64_AFP =3D 1 << 20, - ARM_HWCAP2_A64_RPRES =3D 1 << 21, - ARM_HWCAP2_A64_MTE3 =3D 1 << 22, - ARM_HWCAP2_A64_SME =3D 1 << 23, - ARM_HWCAP2_A64_SME_I16I64 =3D 1 << 24, - ARM_HWCAP2_A64_SME_F64F64 =3D 1 << 25, - ARM_HWCAP2_A64_SME_I8I32 =3D 1 << 26, - ARM_HWCAP2_A64_SME_F16F32 =3D 1 << 27, - ARM_HWCAP2_A64_SME_B16F32 =3D 1 << 28, - ARM_HWCAP2_A64_SME_F32F32 =3D 1 << 29, - ARM_HWCAP2_A64_SME_FA64 =3D 1 << 30, - ARM_HWCAP2_A64_WFXT =3D 1ULL << 31, - ARM_HWCAP2_A64_EBF16 =3D 1ULL << 32, - ARM_HWCAP2_A64_SVE_EBF16 =3D 1ULL << 33, - ARM_HWCAP2_A64_CSSC =3D 1ULL << 34, - ARM_HWCAP2_A64_RPRFM =3D 1ULL << 35, - ARM_HWCAP2_A64_SVE2P1 =3D 1ULL << 36, - ARM_HWCAP2_A64_SME2 =3D 1ULL << 37, - ARM_HWCAP2_A64_SME2P1 =3D 1ULL << 38, - ARM_HWCAP2_A64_SME_I16I32 =3D 1ULL << 39, - ARM_HWCAP2_A64_SME_BI32I32 =3D 1ULL << 40, - ARM_HWCAP2_A64_SME_B16B16 =3D 1ULL << 41, - ARM_HWCAP2_A64_SME_F16F16 =3D 1ULL << 42, - ARM_HWCAP2_A64_MOPS =3D 1ULL << 43, - ARM_HWCAP2_A64_HBC =3D 1ULL << 44, - ARM_HWCAP2_A64_SVE_B16B16 =3D 1ULL << 45, - ARM_HWCAP2_A64_LRCPC3 =3D 1ULL << 46, - ARM_HWCAP2_A64_LSE128 =3D 1ULL << 47, - ARM_HWCAP2_A64_FPMR =3D 1ULL << 48, - ARM_HWCAP2_A64_LUT =3D 1ULL << 49, - ARM_HWCAP2_A64_FAMINMAX =3D 1ULL << 50, - ARM_HWCAP2_A64_F8CVT =3D 1ULL << 51, - ARM_HWCAP2_A64_F8FMA =3D 1ULL << 52, - ARM_HWCAP2_A64_F8DP4 =3D 1ULL << 53, - ARM_HWCAP2_A64_F8DP2 =3D 1ULL << 54, - ARM_HWCAP2_A64_F8E4M3 =3D 1ULL << 55, - ARM_HWCAP2_A64_F8E5M2 =3D 1ULL << 56, - ARM_HWCAP2_A64_SME_LUTV2 =3D 1ULL << 57, - ARM_HWCAP2_A64_SME_F8F16 =3D 1ULL << 58, - ARM_HWCAP2_A64_SME_F8F32 =3D 1ULL << 59, - ARM_HWCAP2_A64_SME_SF8FMA =3D 1ULL << 60, - ARM_HWCAP2_A64_SME_SF8DP4 =3D 1ULL << 61, - ARM_HWCAP2_A64_SME_SF8DP2 =3D 1ULL << 62, - ARM_HWCAP2_A64_POE =3D 1ULL << 63, -}; - -#define ELF_HWCAP get_elf_hwcap() -#define ELF_HWCAP2 get_elf_hwcap2() - -#define GET_FEATURE_ID(feat, hwcap) \ - do { if (cpu_isar_feature(feat, cpu)) { hwcaps |=3D hwcap; } } while (= 0) - -uint32_t get_elf_hwcap(void) -{ - ARMCPU *cpu =3D ARM_CPU(thread_cpu); - uint32_t hwcaps =3D 0; - - hwcaps |=3D ARM_HWCAP_A64_FP; - hwcaps |=3D ARM_HWCAP_A64_ASIMD; - hwcaps |=3D ARM_HWCAP_A64_CPUID; - - /* probe for the extra features */ - - GET_FEATURE_ID(aa64_aes, ARM_HWCAP_A64_AES); - GET_FEATURE_ID(aa64_pmull, ARM_HWCAP_A64_PMULL); - GET_FEATURE_ID(aa64_sha1, ARM_HWCAP_A64_SHA1); - GET_FEATURE_ID(aa64_sha256, ARM_HWCAP_A64_SHA2); - GET_FEATURE_ID(aa64_sha512, ARM_HWCAP_A64_SHA512); - GET_FEATURE_ID(aa64_crc32, ARM_HWCAP_A64_CRC32); - GET_FEATURE_ID(aa64_sha3, ARM_HWCAP_A64_SHA3); - GET_FEATURE_ID(aa64_sm3, ARM_HWCAP_A64_SM3); - GET_FEATURE_ID(aa64_sm4, ARM_HWCAP_A64_SM4); - GET_FEATURE_ID(aa64_fp16, ARM_HWCAP_A64_FPHP | ARM_HWCAP_A64_ASIMDHP); - GET_FEATURE_ID(aa64_atomics, ARM_HWCAP_A64_ATOMICS); - GET_FEATURE_ID(aa64_lse2, ARM_HWCAP_A64_USCAT); - GET_FEATURE_ID(aa64_rdm, ARM_HWCAP_A64_ASIMDRDM); - GET_FEATURE_ID(aa64_dp, ARM_HWCAP_A64_ASIMDDP); - GET_FEATURE_ID(aa64_fcma, ARM_HWCAP_A64_FCMA); - GET_FEATURE_ID(aa64_sve, ARM_HWCAP_A64_SVE); - GET_FEATURE_ID(aa64_pauth, ARM_HWCAP_A64_PACA | ARM_HWCAP_A64_PACG); - GET_FEATURE_ID(aa64_fhm, ARM_HWCAP_A64_ASIMDFHM); - GET_FEATURE_ID(aa64_dit, ARM_HWCAP_A64_DIT); - GET_FEATURE_ID(aa64_jscvt, ARM_HWCAP_A64_JSCVT); - GET_FEATURE_ID(aa64_sb, ARM_HWCAP_A64_SB); - GET_FEATURE_ID(aa64_condm_4, ARM_HWCAP_A64_FLAGM); - GET_FEATURE_ID(aa64_dcpop, ARM_HWCAP_A64_DCPOP); - GET_FEATURE_ID(aa64_rcpc_8_3, ARM_HWCAP_A64_LRCPC); - GET_FEATURE_ID(aa64_rcpc_8_4, ARM_HWCAP_A64_ILRCPC); - - return hwcaps; -} - -uint64_t get_elf_hwcap2(void) -{ - ARMCPU *cpu =3D ARM_CPU(thread_cpu); - uint64_t hwcaps =3D 0; - - GET_FEATURE_ID(aa64_dcpodp, ARM_HWCAP2_A64_DCPODP); - GET_FEATURE_ID(aa64_sve2, ARM_HWCAP2_A64_SVE2); - GET_FEATURE_ID(aa64_sve2_aes, ARM_HWCAP2_A64_SVEAES); - GET_FEATURE_ID(aa64_sve2_pmull128, ARM_HWCAP2_A64_SVEPMULL); - GET_FEATURE_ID(aa64_sve2_bitperm, ARM_HWCAP2_A64_SVEBITPERM); - GET_FEATURE_ID(aa64_sve2_sha3, ARM_HWCAP2_A64_SVESHA3); - GET_FEATURE_ID(aa64_sve2_sm4, ARM_HWCAP2_A64_SVESM4); - GET_FEATURE_ID(aa64_condm_5, ARM_HWCAP2_A64_FLAGM2); - GET_FEATURE_ID(aa64_frint, ARM_HWCAP2_A64_FRINT); - GET_FEATURE_ID(aa64_sve_i8mm, ARM_HWCAP2_A64_SVEI8MM); - GET_FEATURE_ID(aa64_sve_f32mm, ARM_HWCAP2_A64_SVEF32MM); - GET_FEATURE_ID(aa64_sve_f64mm, ARM_HWCAP2_A64_SVEF64MM); - GET_FEATURE_ID(aa64_sve_bf16, ARM_HWCAP2_A64_SVEBF16); - GET_FEATURE_ID(aa64_i8mm, ARM_HWCAP2_A64_I8MM); - GET_FEATURE_ID(aa64_bf16, ARM_HWCAP2_A64_BF16); - GET_FEATURE_ID(aa64_rndr, ARM_HWCAP2_A64_RNG); - GET_FEATURE_ID(aa64_bti, ARM_HWCAP2_A64_BTI); - GET_FEATURE_ID(aa64_mte, ARM_HWCAP2_A64_MTE); - GET_FEATURE_ID(aa64_mte3, ARM_HWCAP2_A64_MTE3); - GET_FEATURE_ID(aa64_sme, (ARM_HWCAP2_A64_SME | - ARM_HWCAP2_A64_SME_F32F32 | - ARM_HWCAP2_A64_SME_B16F32 | - ARM_HWCAP2_A64_SME_F16F32 | - ARM_HWCAP2_A64_SME_I8I32)); - GET_FEATURE_ID(aa64_sme_f64f64, ARM_HWCAP2_A64_SME_F64F64); - GET_FEATURE_ID(aa64_sme_i16i64, ARM_HWCAP2_A64_SME_I16I64); - GET_FEATURE_ID(aa64_sme_fa64, ARM_HWCAP2_A64_SME_FA64); - GET_FEATURE_ID(aa64_hbc, ARM_HWCAP2_A64_HBC); - GET_FEATURE_ID(aa64_mops, ARM_HWCAP2_A64_MOPS); - GET_FEATURE_ID(aa64_sve2p1, ARM_HWCAP2_A64_SVE2P1); - GET_FEATURE_ID(aa64_sme2, (ARM_HWCAP2_A64_SME2 | - ARM_HWCAP2_A64_SME_I16I32 | - ARM_HWCAP2_A64_SME_BI32I32)); - GET_FEATURE_ID(aa64_sme2p1, ARM_HWCAP2_A64_SME2P1); - GET_FEATURE_ID(aa64_sme_b16b16, ARM_HWCAP2_A64_SME_B16B16); - GET_FEATURE_ID(aa64_sme_f16f16, ARM_HWCAP2_A64_SME_F16F16); - GET_FEATURE_ID(aa64_sve_b16b16, ARM_HWCAP2_A64_SVE_B16B16); - - return hwcaps; -} - -const char *elf_hwcap_str(uint32_t bit) -{ - static const char * const hwcap_str[] =3D { - [__builtin_ctz(ARM_HWCAP_A64_FP )] =3D "fp", - [__builtin_ctz(ARM_HWCAP_A64_ASIMD )] =3D "asimd", - [__builtin_ctz(ARM_HWCAP_A64_EVTSTRM )] =3D "evtstrm", - [__builtin_ctz(ARM_HWCAP_A64_AES )] =3D "aes", - [__builtin_ctz(ARM_HWCAP_A64_PMULL )] =3D "pmull", - [__builtin_ctz(ARM_HWCAP_A64_SHA1 )] =3D "sha1", - [__builtin_ctz(ARM_HWCAP_A64_SHA2 )] =3D "sha2", - [__builtin_ctz(ARM_HWCAP_A64_CRC32 )] =3D "crc32", - [__builtin_ctz(ARM_HWCAP_A64_ATOMICS )] =3D "atomics", - [__builtin_ctz(ARM_HWCAP_A64_FPHP )] =3D "fphp", - [__builtin_ctz(ARM_HWCAP_A64_ASIMDHP )] =3D "asimdhp", - [__builtin_ctz(ARM_HWCAP_A64_CPUID )] =3D "cpuid", - [__builtin_ctz(ARM_HWCAP_A64_ASIMDRDM)] =3D "asimdrdm", - [__builtin_ctz(ARM_HWCAP_A64_JSCVT )] =3D "jscvt", - [__builtin_ctz(ARM_HWCAP_A64_FCMA )] =3D "fcma", - [__builtin_ctz(ARM_HWCAP_A64_LRCPC )] =3D "lrcpc", - [__builtin_ctz(ARM_HWCAP_A64_DCPOP )] =3D "dcpop", - [__builtin_ctz(ARM_HWCAP_A64_SHA3 )] =3D "sha3", - [__builtin_ctz(ARM_HWCAP_A64_SM3 )] =3D "sm3", - [__builtin_ctz(ARM_HWCAP_A64_SM4 )] =3D "sm4", - [__builtin_ctz(ARM_HWCAP_A64_ASIMDDP )] =3D "asimddp", - [__builtin_ctz(ARM_HWCAP_A64_SHA512 )] =3D "sha512", - [__builtin_ctz(ARM_HWCAP_A64_SVE )] =3D "sve", - [__builtin_ctz(ARM_HWCAP_A64_ASIMDFHM)] =3D "asimdfhm", - [__builtin_ctz(ARM_HWCAP_A64_DIT )] =3D "dit", - [__builtin_ctz(ARM_HWCAP_A64_USCAT )] =3D "uscat", - [__builtin_ctz(ARM_HWCAP_A64_ILRCPC )] =3D "ilrcpc", - [__builtin_ctz(ARM_HWCAP_A64_FLAGM )] =3D "flagm", - [__builtin_ctz(ARM_HWCAP_A64_SSBS )] =3D "ssbs", - [__builtin_ctz(ARM_HWCAP_A64_SB )] =3D "sb", - [__builtin_ctz(ARM_HWCAP_A64_PACA )] =3D "paca", - [__builtin_ctz(ARM_HWCAP_A64_PACG )] =3D "pacg", - [__builtin_ctzll(ARM_HWCAP_A64_GCS )] =3D "gcs", - [__builtin_ctzll(ARM_HWCAP_A64_CMPBR )] =3D "cmpbr", - [__builtin_ctzll(ARM_HWCAP_A64_FPRCVT)] =3D "fprcvt", - [__builtin_ctzll(ARM_HWCAP_A64_F8MM8 )] =3D "f8mm8", - [__builtin_ctzll(ARM_HWCAP_A64_F8MM4 )] =3D "f8mm4", - [__builtin_ctzll(ARM_HWCAP_A64_SVE_F16MM)] =3D "svef16mm", - [__builtin_ctzll(ARM_HWCAP_A64_SVE_ELTPERM)] =3D "sveeltperm", - [__builtin_ctzll(ARM_HWCAP_A64_SVE_AES2)] =3D "sveaes2", - [__builtin_ctzll(ARM_HWCAP_A64_SVE_BFSCALE)] =3D "svebfscale", - [__builtin_ctzll(ARM_HWCAP_A64_SVE2P2)] =3D "sve2p2", - [__builtin_ctzll(ARM_HWCAP_A64_SME2P2)] =3D "sme2p2", - [__builtin_ctzll(ARM_HWCAP_A64_SME_SBITPERM)] =3D "smesbitperm", - [__builtin_ctzll(ARM_HWCAP_A64_SME_AES)] =3D "smeaes", - [__builtin_ctzll(ARM_HWCAP_A64_SME_SFEXPA)] =3D "smesfexpa", - [__builtin_ctzll(ARM_HWCAP_A64_SME_STMOP)] =3D "smestmop", - [__builtin_ctzll(ARM_HWCAP_A64_SME_SMOP4)] =3D "smesmop4", - }; - - return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; -} - -const char *elf_hwcap2_str(uint32_t bit) -{ - static const char * const hwcap_str[] =3D { - [__builtin_ctz(ARM_HWCAP2_A64_DCPODP )] =3D "dcpodp", - [__builtin_ctz(ARM_HWCAP2_A64_SVE2 )] =3D "sve2", - [__builtin_ctz(ARM_HWCAP2_A64_SVEAES )] =3D "sveaes", - [__builtin_ctz(ARM_HWCAP2_A64_SVEPMULL )] =3D "svepmull", - [__builtin_ctz(ARM_HWCAP2_A64_SVEBITPERM )] =3D "svebitperm", - [__builtin_ctz(ARM_HWCAP2_A64_SVESHA3 )] =3D "svesha3", - [__builtin_ctz(ARM_HWCAP2_A64_SVESM4 )] =3D "svesm4", - [__builtin_ctz(ARM_HWCAP2_A64_FLAGM2 )] =3D "flagm2", - [__builtin_ctz(ARM_HWCAP2_A64_FRINT )] =3D "frint", - [__builtin_ctz(ARM_HWCAP2_A64_SVEI8MM )] =3D "svei8mm", - [__builtin_ctz(ARM_HWCAP2_A64_SVEF32MM )] =3D "svef32mm", - [__builtin_ctz(ARM_HWCAP2_A64_SVEF64MM )] =3D "svef64mm", - [__builtin_ctz(ARM_HWCAP2_A64_SVEBF16 )] =3D "svebf16", - [__builtin_ctz(ARM_HWCAP2_A64_I8MM )] =3D "i8mm", - [__builtin_ctz(ARM_HWCAP2_A64_BF16 )] =3D "bf16", - [__builtin_ctz(ARM_HWCAP2_A64_DGH )] =3D "dgh", - [__builtin_ctz(ARM_HWCAP2_A64_RNG )] =3D "rng", - [__builtin_ctz(ARM_HWCAP2_A64_BTI )] =3D "bti", - [__builtin_ctz(ARM_HWCAP2_A64_MTE )] =3D "mte", - [__builtin_ctz(ARM_HWCAP2_A64_ECV )] =3D "ecv", - [__builtin_ctz(ARM_HWCAP2_A64_AFP )] =3D "afp", - [__builtin_ctz(ARM_HWCAP2_A64_RPRES )] =3D "rpres", - [__builtin_ctz(ARM_HWCAP2_A64_MTE3 )] =3D "mte3", - [__builtin_ctz(ARM_HWCAP2_A64_SME )] =3D "sme", - [__builtin_ctz(ARM_HWCAP2_A64_SME_I16I64 )] =3D "smei16i64", - [__builtin_ctz(ARM_HWCAP2_A64_SME_F64F64 )] =3D "smef64f64", - [__builtin_ctz(ARM_HWCAP2_A64_SME_I8I32 )] =3D "smei8i32", - [__builtin_ctz(ARM_HWCAP2_A64_SME_F16F32 )] =3D "smef16f32", - [__builtin_ctz(ARM_HWCAP2_A64_SME_B16F32 )] =3D "smeb16f32", - [__builtin_ctz(ARM_HWCAP2_A64_SME_F32F32 )] =3D "smef32f32", - [__builtin_ctz(ARM_HWCAP2_A64_SME_FA64 )] =3D "smefa64", - [__builtin_ctz(ARM_HWCAP2_A64_WFXT )] =3D "wfxt", - [__builtin_ctzll(ARM_HWCAP2_A64_EBF16 )] =3D "ebf16", - [__builtin_ctzll(ARM_HWCAP2_A64_SVE_EBF16 )] =3D "sveebf16", - [__builtin_ctzll(ARM_HWCAP2_A64_CSSC )] =3D "cssc", - [__builtin_ctzll(ARM_HWCAP2_A64_RPRFM )] =3D "rprfm", - [__builtin_ctzll(ARM_HWCAP2_A64_SVE2P1 )] =3D "sve2p1", - [__builtin_ctzll(ARM_HWCAP2_A64_SME2 )] =3D "sme2", - [__builtin_ctzll(ARM_HWCAP2_A64_SME2P1 )] =3D "sme2p1", - [__builtin_ctzll(ARM_HWCAP2_A64_SME_I16I32 )] =3D "smei16i32", - [__builtin_ctzll(ARM_HWCAP2_A64_SME_BI32I32)] =3D "smebi32i32", - [__builtin_ctzll(ARM_HWCAP2_A64_SME_B16B16 )] =3D "smeb16b16", - [__builtin_ctzll(ARM_HWCAP2_A64_SME_F16F16 )] =3D "smef16f16", - [__builtin_ctzll(ARM_HWCAP2_A64_MOPS )] =3D "mops", - [__builtin_ctzll(ARM_HWCAP2_A64_HBC )] =3D "hbc", - [__builtin_ctzll(ARM_HWCAP2_A64_SVE_B16B16 )] =3D "sveb16b16", - [__builtin_ctzll(ARM_HWCAP2_A64_LRCPC3 )] =3D "lrcpc3", - [__builtin_ctzll(ARM_HWCAP2_A64_LSE128 )] =3D "lse128", - [__builtin_ctzll(ARM_HWCAP2_A64_FPMR )] =3D "fpmr", - [__builtin_ctzll(ARM_HWCAP2_A64_LUT )] =3D "lut", - [__builtin_ctzll(ARM_HWCAP2_A64_FAMINMAX )] =3D "faminmax", - [__builtin_ctzll(ARM_HWCAP2_A64_F8CVT )] =3D "f8cvt", - [__builtin_ctzll(ARM_HWCAP2_A64_F8FMA )] =3D "f8fma", - [__builtin_ctzll(ARM_HWCAP2_A64_F8DP4 )] =3D "f8dp4", - [__builtin_ctzll(ARM_HWCAP2_A64_F8DP2 )] =3D "f8dp2", - [__builtin_ctzll(ARM_HWCAP2_A64_F8E4M3 )] =3D "f8e4m3", - [__builtin_ctzll(ARM_HWCAP2_A64_F8E5M2 )] =3D "f8e5m2", - [__builtin_ctzll(ARM_HWCAP2_A64_SME_LUTV2 )] =3D "smelutv2", - [__builtin_ctzll(ARM_HWCAP2_A64_SME_F8F16 )] =3D "smef8f16", - [__builtin_ctzll(ARM_HWCAP2_A64_SME_F8F32 )] =3D "smef8f32", - [__builtin_ctzll(ARM_HWCAP2_A64_SME_SF8DP4 )] =3D "smesf8dp4", - [__builtin_ctzll(ARM_HWCAP2_A64_SME_SF8DP2 )] =3D "smesf8dp2", - [__builtin_ctzll(ARM_HWCAP2_A64_POE )] =3D "poe", - }; - - return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; -} - -#undef GET_FEATURE_ID +#define ELF_HWCAP get_elf_hwcap(thread_cpu) +#define ELF_HWCAP2 get_elf_hwcap2(thread_cpu) =20 #if TARGET_BIG_ENDIAN # define VDSO_HEADER "vdso-be.c.inc" --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336874; cv=none; d=zohomail.com; s=zohoarc; b=m1VTbHiMQqW0XLACPJEpFFJJ1bUz1DPO/1rSIpAx0Ct6dq6QpAYUBzFq4GOV99HcO/6gk+Rbf9slGVf/4ESnQ9ycygaXojOW1PNmZbG4dhcMAZOqiYmKbuxPNnOp+HYbBbpdoxLmbPnuTRljNJ78ySgZxuiniFlhuPf7ayD0sxY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336874; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=rkh6QSZcv8eWN+z+za46kqtwRfzEqAI+OgnnDkHvgxw=; b=JZoQNrZTzTiuVhcl5Sj+Xu07OSbpXEuDHK9PIFJoFzJfxf2CHO1/u1pNlXbVmuQIEA1gH4stz/UNpjWDudBn89oNFZes9axYk7pxNDk+WINLsx1O5GwqQjtqkt3iWpiQoMZfsAbXbK79BxtVqAS+cvpd0vXkpYz+hKvIS+03vrQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756336874210935.467711358814; Wed, 27 Aug 2025 16:21:14 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPRq-0001fZ-IS; Wed, 27 Aug 2025 19:20:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPRo-0001cZ-AV for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:20:56 -0400 Received: from mail-pf1-x429.google.com ([2607:f8b0:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPRm-00049P-AZ for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:20:56 -0400 Received: by mail-pf1-x429.google.com with SMTP id d2e1a72fcca58-771e4378263so349635b3a.0 for ; Wed, 27 Aug 2025 16:20:53 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.20.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:20:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336852; x=1756941652; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rkh6QSZcv8eWN+z+za46kqtwRfzEqAI+OgnnDkHvgxw=; b=ghxzpygJ613NXM4KcfJk+KdDa8FHoRF0c4VcCjc05Oul3ya1QVWT5UI1Ype/2eGtyL ufQ9Pb72ITu3peM765lmz0Puv6xO9XaIKRJXfJBhOLaVnHTVYa0HDymIwsCF//0fFVVw 0AEL87IP3TYGjDmO7wh5BgeU4b2V2VQ1kCghNZG68+TDvJLTioxu4aCJjwOLcw8nkrFV HIjkzxcJf8V/haml1+Qf7awsuj5UmOZ+OL/gJDvzWBK/I5MsMx4VoglYYzTrzQCPhliF EvrCogerL3/+lejYTPwg/OLJ9ja8oQiT5XvjTfT7Do66oaThY0VM/T+Fp2LrUrgyzrUe EdpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336852; x=1756941652; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rkh6QSZcv8eWN+z+za46kqtwRfzEqAI+OgnnDkHvgxw=; b=hqCctQyY/aIBY5mCUDp/iQspEoFRdEqMHDx7aJORiVIEKrmFbEbGNg7ArvC9eo+kKG 9q52BOd/QsO0G+Z/QuKhSYRP3pcSiV0VQp8FR0idkQ0AAEVq+FT0ABa5dktFv0mye0nI UjbcK+40t4XNUweE4DU9tuQ5NTi4sLDhUJ4UJYuwJiGRA7wRCuNdomShpedk/c8RfRbn Dz6tt5h8DBmb8V32PoR6Ztl/b/XZO8cB+nWhZqM2orVxuAVo2w531Ah3i1xPckWVsf0+ 5JPZFQ2X/xqdex/d5p3bd9KSSVo5KDlQzn1x0190EgR9s82xj8gR9eJj4Sr7nj/7OWRH GOYA== X-Gm-Message-State: AOJu0Yx0PluONGO11FDrgBfzhQXGBPNQbbj6aOpxcoIwhxXxFU0USqY8 qPaTTl9NR6SQrVgAx7rhdADq2BB4VNiWbo3+L68sdrxsfPtWO26k310y111Xt6jaoo4d+5Pt2ZG z4ddg/h8= X-Gm-Gg: ASbGncvXF37QkbGCpCkq77cX9UADKb4fuOdLfYs11fgT1ruGBOItfe3xT7ndgtD70Rq vQlt+Z5y/51OtaAcSZoaHvW9M0sO54ItyXFz78eoeQRu6fJHvBK6h4RWtiTQtObYpn0t+3bbBPt 6jwddkjN0tnNPvIVZLksO2GvX1tGWlolw16wAfBq1xZDEusbSlbh9FVYvEbbKFSHorHdMmbbZkM wvXnRrpB3L+wQTfM7GkBd8JCfenT0IGF9qqJnVuXaw9d2WvHy4jpfsCoSpmUTKRHkYWQ5DX76FW 84Si0I/2KE3j9MKLfbETsiY3K0NULWt4oA/WH/E0jmWBO09uPM2ce1ngwoA727w8bBTg1dcoP0n e51/Uwnx6p2lHYDe4q1Pen11olw== X-Google-Smtp-Source: AGHT+IEUGb0ngIoZTXvgkhTGoF2RDSsuldUtMIlOsRnQ5H4dzmrbkCGlTg5wNhuaLiwCOMlm3plyWA== X-Received: by 2002:a05:6a00:1ca0:b0:771:f763:4654 with SMTP id d2e1a72fcca58-771f7634976mr11132733b3a.18.1756336852007; Wed, 27 Aug 2025 16:20:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 08/46] linux-user: Move get_elf_hwcap to sparc/elfload.c Date: Thu, 28 Aug 2025 09:19:45 +1000 Message-ID: <20250827232023.50398-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756336875139116600 Content-Type: text/plain; charset="utf-8" Change the return type to abi_ulong, and pass in the cpu. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/loader.h | 3 ++- linux-user/sparc/target_elf.h | 2 ++ linux-user/elfload.c | 30 +----------------------------- linux-user/sparc/elfload.c | 27 +++++++++++++++++++++++++++ 4 files changed, 32 insertions(+), 30 deletions(-) diff --git a/linux-user/loader.h b/linux-user/loader.h index 151a06f5db..2c8414e0e5 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -101,7 +101,8 @@ extern unsigned long guest_stack_size; /* Note that Elf32 and Elf64 use uint32_t for e_flags. */ const char *get_elf_cpu_model(uint32_t eflags); =20 -#if defined(TARGET_I386) || defined(TARGET_X86_64) || defined(TARGET_ARM) +#if defined(TARGET_I386) || defined(TARGET_X86_64) || defined(TARGET_ARM) \ + || defined(TARGET_SPARC) abi_ulong get_elf_hwcap(CPUState *cs); abi_ulong get_elf_hwcap2(CPUState *cs); #endif diff --git a/linux-user/sparc/target_elf.h b/linux-user/sparc/target_elf.h index 7e46748d26..b7544db0a1 100644 --- a/linux-user/sparc/target_elf.h +++ b/linux-user/sparc/target_elf.h @@ -8,4 +8,6 @@ #ifndef SPARC_TARGET_ELF_H #define SPARC_TARGET_ELF_H =20 +#define HAVE_ELF_HWCAP 1 + #endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 149d1313c0..16709865f7 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -565,35 +565,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, # define ELF_ARCH EM_SPARCV9 #endif =20 -#include "elf.h" - -#define ELF_HWCAP get_elf_hwcap() - -static uint32_t get_elf_hwcap(void) -{ - /* There are not many sparc32 hwcap bits -- we have all of them. */ - uint32_t r =3D HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | - HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV; - -#ifdef TARGET_SPARC64 - CPUSPARCState *env =3D cpu_env(thread_cpu); - uint32_t features =3D env->def.features; - - r |=3D HWCAP_SPARC_V9 | HWCAP_SPARC_V8PLUS; - /* 32x32 multiply and divide are efficient. */ - r |=3D HWCAP_SPARC_MUL32 | HWCAP_SPARC_DIV32; - /* We don't have an internal feature bit for this. */ - r |=3D HWCAP_SPARC_POPC; - r |=3D features & CPU_FEATURE_FSMULD ? HWCAP_SPARC_FSMULD : 0; - r |=3D features & CPU_FEATURE_VIS1 ? HWCAP_SPARC_VIS : 0; - r |=3D features & CPU_FEATURE_VIS2 ? HWCAP_SPARC_VIS2 : 0; - r |=3D features & CPU_FEATURE_FMAF ? HWCAP_SPARC_FMAF : 0; - r |=3D features & CPU_FEATURE_VIS3 ? HWCAP_SPARC_VIS3 : 0; - r |=3D features & CPU_FEATURE_IMA ? HWCAP_SPARC_IMA : 0; -#endif - - return r; -} +#define ELF_HWCAP get_elf_hwcap(thread_cpu) =20 static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) diff --git a/linux-user/sparc/elfload.c b/linux-user/sparc/elfload.c index 243e6f9b66..32ca1b05b1 100644 --- a/linux-user/sparc/elfload.c +++ b/linux-user/sparc/elfload.c @@ -3,6 +3,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "loader.h" +#include "elf.h" =20 =20 const char *get_elf_cpu_model(uint32_t eflags) @@ -13,3 +14,29 @@ const char *get_elf_cpu_model(uint32_t eflags) return "Fujitsu MB86904"; #endif } + +abi_ulong get_elf_hwcap(CPUState *cs) +{ + /* There are not many sparc32 hwcap bits -- we have all of them. */ + uint32_t r =3D HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | + HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV; + +#ifdef TARGET_SPARC64 + CPUSPARCState *env =3D cpu_env(cs); + uint32_t features =3D env->def.features; + + r |=3D HWCAP_SPARC_V9 | HWCAP_SPARC_V8PLUS; + /* 32x32 multiply and divide are efficient. */ + r |=3D HWCAP_SPARC_MUL32 | HWCAP_SPARC_DIV32; + /* We don't have an internal feature bit for this. */ + r |=3D HWCAP_SPARC_POPC; + r |=3D features & CPU_FEATURE_FSMULD ? HWCAP_SPARC_FSMULD : 0; + r |=3D features & CPU_FEATURE_VIS1 ? HWCAP_SPARC_VIS : 0; + r |=3D features & CPU_FEATURE_VIS2 ? HWCAP_SPARC_VIS2 : 0; + r |=3D features & CPU_FEATURE_FMAF ? HWCAP_SPARC_FMAF : 0; + r |=3D features & CPU_FEATURE_VIS3 ? HWCAP_SPARC_VIS3 : 0; + r |=3D features & CPU_FEATURE_IMA ? HWCAP_SPARC_IMA : 0; +#endif + + return r; +} --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336989; cv=none; d=zohomail.com; s=zohoarc; b=cMYBM7w1SCxMEq1kmF8m1k+zBUc2zmEg2IBxs/jkyrfHNVJ6IfEZpLV+r2EMzfqJgaz4SrmSdjT5JmQ4NPdxerhQl0gnq6Fj7Fxr5re6xhS6VLmKCz6ddfeNn0szltgIctStoaepNscrSsnye+Sci/5wR0pE2mwplqj/ne7njAs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336989; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=v2SfyAZc4XoY8CMkOgazi0gSdP78GuSA69fV6HrxMHw=; b=c9fTFyDsfreGokQbmkBu9hxEQQEv0tbnMcFlsU5ZYJP67kLiCvm5w421aq7qTMBkIkTCk+PQ9YBE9W+YYIihs2QYxUlLRVUbBY3aNUTPNgVRyHCaKy3xUbGhd9xFaDddjkFAu3OObS4D/tLaP6t2NS4LClls07iOfxNQWnFi2Do= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756336989248200.25998382670946; Wed, 27 Aug 2025 16:23:09 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPRs-0001i9-Kk; Wed, 27 Aug 2025 19:21:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPRr-0001gn-EK for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:20:59 -0400 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPRo-00049o-Vx for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:20:59 -0400 Received: by mail-pf1-x430.google.com with SMTP id d2e1a72fcca58-76e1fc69f86so1211856b3a.0 for ; Wed, 27 Aug 2025 16:20:56 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.20.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:20:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336855; x=1756941655; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=v2SfyAZc4XoY8CMkOgazi0gSdP78GuSA69fV6HrxMHw=; b=j1p4UlJwU0ZX+DEPUeXA16W0Av9xPfTwYT1UqqpJfko9osWK/53o2t8/GeUBmdiiNr 5r5b0hiIbF4WKP1cd2RLku9ch1CHOUqCWblW+RBlFGBlqDWLGTO+mRAbH+TBYNCr4/Gs nuTk8ase+TZi4vdxBHsmuJMGl1ukC5gnLlriLF0vVLH8Tzo9VGnYZigA4x9kIglkRAWB yUEnApMcQiU/qgmni7wmync2X+YwD7wKJ3xkGHLRNNeRXiGc1LHFRZdOuFFs1TaoKUTz vVaLAbes6LaUuWM4tIoBmJfYQOJw0AYrfWo7QCyBQ+2Vbtud23w81NnmYbOd05PYmb16 ICrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336855; x=1756941655; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=v2SfyAZc4XoY8CMkOgazi0gSdP78GuSA69fV6HrxMHw=; b=Rcc9TGAS4j7eUCJO21Td7q4amQj7bE0mIP1NIEemasQcLFUhbjojIknIXdh8MBRgpT PwiXMjKxl7qs3SqceI1BlUUm6JcZzdfHuYlgIbxHbxoHlz+WdtU6MJYf6yQWlavih3EL EeZz+45GOPOQK/0S9IVCaNcxMbMcKmIXE8TLDPX1MFvPeF5zb8Nfsbr58rYx/3T4ur74 5bflU5JBl+cXCAU9QB+CwzdWvoGbpUwOoqXGTuwe1ws/Gv3jj+FURqNDifKLMGDyiU1Q 9jgBaMClYLWVGxj4fyiRULzQAkiLGRKP8Gxuo28X8DnEJHy6Wrcinn7iPyK+NDEyDC5m U5KQ== X-Gm-Message-State: AOJu0YzWXuoWs6w8JXHtR7kMOW8XSgez6zROyYsAtZsQeE8xGOltBtUd ViA2Yjeg59XJKwz9g1cWrk5bI2itqARZ29AUDmcdsF7V1O3+6sp/PeG8PFs9EeD0kfees/xMxrG yx3B3VW0= X-Gm-Gg: ASbGncsnvM+ZFRRNJhsSidJcAqIX6YhKQ4c09spCnNdqKkfbdG8i59Zp8unQ3yetcv4 VPPwyNej87NVObVRodejtLhGcWCNtKip1TEgcDVq5TVmXpPk7FJPEwKnGCEbEzoEnNq34SFZuVU i5ciQf+Pwh/g8p1ZBjM4jX2EkhsInLARtSoz1ZK6pgWHqJOCbmNVGXSQYQ4wpEufCsD3XWLw1nm SFX4etVfBay/3p5ywXtvj2BTGbdp1/nLWi2W3xpzzEgExmPoU7JP42IGG8WDy6Ib0SqR7+2rsuX tVLJi38vig5+tsZYjcEma76iylwjj1cJolzi8VlpMWWI5WCo1Z+o2ANiafL6T+0dWVD7K+JFOxC wSa8t3kO2ClTnHP8Uqkw9Mg+upw== X-Google-Smtp-Source: AGHT+IF51ODkI01nYC7F1UJEdR/ZzPcTIjz5TZ9r0jxcd4axT6kbOoqV5l3LWNEisgXm24l8fgwIhA== X-Received: by 2002:a05:6a20:bb08:b0:243:9587:a774 with SMTP id adf61e73a8af0-2439587aa2fmr6653604637.28.1756336855074; Wed, 27 Aug 2025 16:20:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 09/46] linux-user: Move hwcap functions to ppc/elfload.c Date: Thu, 28 Aug 2025 09:19:46 +1000 Message-ID: <20250827232023.50398-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756336991064124100 Content-Type: text/plain; charset="utf-8" Change the return type to abi_ulong, and pass in the cpu. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/loader.h | 2 +- linux-user/ppc/target_elf.h | 3 + linux-user/elfload.c | 116 +----------------------------------- linux-user/ppc/elfload.c | 116 ++++++++++++++++++++++++++++++++++++ 4 files changed, 122 insertions(+), 115 deletions(-) diff --git a/linux-user/loader.h b/linux-user/loader.h index 2c8414e0e5..818c5e6d7d 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -102,7 +102,7 @@ extern unsigned long guest_stack_size; const char *get_elf_cpu_model(uint32_t eflags); =20 #if defined(TARGET_I386) || defined(TARGET_X86_64) || defined(TARGET_ARM) \ - || defined(TARGET_SPARC) + || defined(TARGET_SPARC) || defined(TARGET_PPC) abi_ulong get_elf_hwcap(CPUState *cs); abi_ulong get_elf_hwcap2(CPUState *cs); #endif diff --git a/linux-user/ppc/target_elf.h b/linux-user/ppc/target_elf.h index 8c0a8ea431..4203a89d66 100644 --- a/linux-user/ppc/target_elf.h +++ b/linux-user/ppc/target_elf.h @@ -8,4 +8,7 @@ #ifndef PPC_TARGET_ELF_H #define PPC_TARGET_ELF_H =20 +#define HAVE_ELF_HWCAP 1 +#define HAVE_ELF_HWCAP2 1 + #endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 16709865f7..843b1f7b6c 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -598,120 +598,8 @@ static inline void init_thread(struct target_pt_regs = *regs, =20 #define ELF_ARCH EM_PPC =20 -/* Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP). - See arch/powerpc/include/asm/cputable.h. */ -enum { - QEMU_PPC_FEATURE_32 =3D 0x80000000, - QEMU_PPC_FEATURE_64 =3D 0x40000000, - QEMU_PPC_FEATURE_601_INSTR =3D 0x20000000, - QEMU_PPC_FEATURE_HAS_ALTIVEC =3D 0x10000000, - QEMU_PPC_FEATURE_HAS_FPU =3D 0x08000000, - QEMU_PPC_FEATURE_HAS_MMU =3D 0x04000000, - QEMU_PPC_FEATURE_HAS_4xxMAC =3D 0x02000000, - QEMU_PPC_FEATURE_UNIFIED_CACHE =3D 0x01000000, - QEMU_PPC_FEATURE_HAS_SPE =3D 0x00800000, - QEMU_PPC_FEATURE_HAS_EFP_SINGLE =3D 0x00400000, - QEMU_PPC_FEATURE_HAS_EFP_DOUBLE =3D 0x00200000, - QEMU_PPC_FEATURE_NO_TB =3D 0x00100000, - QEMU_PPC_FEATURE_POWER4 =3D 0x00080000, - QEMU_PPC_FEATURE_POWER5 =3D 0x00040000, - QEMU_PPC_FEATURE_POWER5_PLUS =3D 0x00020000, - QEMU_PPC_FEATURE_CELL =3D 0x00010000, - QEMU_PPC_FEATURE_BOOKE =3D 0x00008000, - QEMU_PPC_FEATURE_SMT =3D 0x00004000, - QEMU_PPC_FEATURE_ICACHE_SNOOP =3D 0x00002000, - QEMU_PPC_FEATURE_ARCH_2_05 =3D 0x00001000, - QEMU_PPC_FEATURE_PA6T =3D 0x00000800, - QEMU_PPC_FEATURE_HAS_DFP =3D 0x00000400, - QEMU_PPC_FEATURE_POWER6_EXT =3D 0x00000200, - QEMU_PPC_FEATURE_ARCH_2_06 =3D 0x00000100, - QEMU_PPC_FEATURE_HAS_VSX =3D 0x00000080, - QEMU_PPC_FEATURE_PSERIES_PERFMON_COMPAT =3D 0x00000040, - - QEMU_PPC_FEATURE_TRUE_LE =3D 0x00000002, - QEMU_PPC_FEATURE_PPC_LE =3D 0x00000001, - - /* Feature definitions in AT_HWCAP2. */ - QEMU_PPC_FEATURE2_ARCH_2_07 =3D 0x80000000, /* ISA 2.07 */ - QEMU_PPC_FEATURE2_HAS_HTM =3D 0x40000000, /* Hardware Transactional Me= mory */ - QEMU_PPC_FEATURE2_HAS_DSCR =3D 0x20000000, /* Data Stream Control Regi= ster */ - QEMU_PPC_FEATURE2_HAS_EBB =3D 0x10000000, /* Event Base Branching */ - QEMU_PPC_FEATURE2_HAS_ISEL =3D 0x08000000, /* Integer Select */ - QEMU_PPC_FEATURE2_HAS_TAR =3D 0x04000000, /* Target Address Register */ - QEMU_PPC_FEATURE2_VEC_CRYPTO =3D 0x02000000, - QEMU_PPC_FEATURE2_HTM_NOSC =3D 0x01000000, - QEMU_PPC_FEATURE2_ARCH_3_00 =3D 0x00800000, /* ISA 3.00 */ - QEMU_PPC_FEATURE2_HAS_IEEE128 =3D 0x00400000, /* VSX IEEE Bin Float 12= 8-bit */ - QEMU_PPC_FEATURE2_DARN =3D 0x00200000, /* darn random number insn */ - QEMU_PPC_FEATURE2_SCV =3D 0x00100000, /* scv syscall */ - QEMU_PPC_FEATURE2_HTM_NO_SUSPEND =3D 0x00080000, /* TM w/o suspended s= tate */ - QEMU_PPC_FEATURE2_ARCH_3_1 =3D 0x00040000, /* ISA 3.1 */ - QEMU_PPC_FEATURE2_MMA =3D 0x00020000, /* Matrix-Multiply Assist */ -}; - -#define ELF_HWCAP get_elf_hwcap() - -static uint32_t get_elf_hwcap(void) -{ - PowerPCCPU *cpu =3D POWERPC_CPU(thread_cpu); - uint32_t features =3D 0; - - /* We don't have to be terribly complete here; the high points are - Altivec/FP/SPE support. Anything else is just a bonus. */ -#define GET_FEATURE(flag, feature) \ - do { if (cpu->env.insns_flags & flag) { features |=3D feature; } } whi= le (0) -#define GET_FEATURE2(flags, feature) \ - do { \ - if ((cpu->env.insns_flags2 & flags) =3D=3D flags) { \ - features |=3D feature; \ - } \ - } while (0) - GET_FEATURE(PPC_64B, QEMU_PPC_FEATURE_64); - GET_FEATURE(PPC_FLOAT, QEMU_PPC_FEATURE_HAS_FPU); - GET_FEATURE(PPC_ALTIVEC, QEMU_PPC_FEATURE_HAS_ALTIVEC); - GET_FEATURE(PPC_SPE, QEMU_PPC_FEATURE_HAS_SPE); - GET_FEATURE(PPC_SPE_SINGLE, QEMU_PPC_FEATURE_HAS_EFP_SINGLE); - GET_FEATURE(PPC_SPE_DOUBLE, QEMU_PPC_FEATURE_HAS_EFP_DOUBLE); - GET_FEATURE(PPC_BOOKE, QEMU_PPC_FEATURE_BOOKE); - GET_FEATURE(PPC_405_MAC, QEMU_PPC_FEATURE_HAS_4xxMAC); - GET_FEATURE2(PPC2_DFP, QEMU_PPC_FEATURE_HAS_DFP); - GET_FEATURE2(PPC2_VSX, QEMU_PPC_FEATURE_HAS_VSX); - GET_FEATURE2((PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206= | - PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206), - QEMU_PPC_FEATURE_ARCH_2_06); -#undef GET_FEATURE -#undef GET_FEATURE2 - - return features; -} - -#define ELF_HWCAP2 get_elf_hwcap2() - -static uint32_t get_elf_hwcap2(void) -{ - PowerPCCPU *cpu =3D POWERPC_CPU(thread_cpu); - uint32_t features =3D 0; - -#define GET_FEATURE(flag, feature) \ - do { if (cpu->env.insns_flags & flag) { features |=3D feature; } } whi= le (0) -#define GET_FEATURE2(flag, feature) \ - do { if (cpu->env.insns_flags2 & flag) { features |=3D feature; } } wh= ile (0) - - GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL); - GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR); - GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | - PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07 | - QEMU_PPC_FEATURE2_VEC_CRYPTO); - GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00 | - QEMU_PPC_FEATURE2_DARN | QEMU_PPC_FEATURE2_HAS_IEEE128); - GET_FEATURE2(PPC2_ISA310, QEMU_PPC_FEATURE2_ARCH_3_1 | - QEMU_PPC_FEATURE2_MMA); - -#undef GET_FEATURE -#undef GET_FEATURE2 - - return features; -} +#define ELF_HWCAP get_elf_hwcap(thread_cpu) +#define ELF_HWCAP2 get_elf_hwcap2(thread_cpu) =20 /* * The requirements here are: diff --git a/linux-user/ppc/elfload.c b/linux-user/ppc/elfload.c index 7775dc06fa..a214675650 100644 --- a/linux-user/ppc/elfload.c +++ b/linux-user/ppc/elfload.c @@ -13,3 +13,119 @@ const char *get_elf_cpu_model(uint32_t eflags) return "750"; #endif } + +/* + * Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP). + * See arch/powerpc/include/asm/cputable.h. + */ +enum { + QEMU_PPC_FEATURE_32 =3D 0x80000000, + QEMU_PPC_FEATURE_64 =3D 0x40000000, + QEMU_PPC_FEATURE_601_INSTR =3D 0x20000000, + QEMU_PPC_FEATURE_HAS_ALTIVEC =3D 0x10000000, + QEMU_PPC_FEATURE_HAS_FPU =3D 0x08000000, + QEMU_PPC_FEATURE_HAS_MMU =3D 0x04000000, + QEMU_PPC_FEATURE_HAS_4xxMAC =3D 0x02000000, + QEMU_PPC_FEATURE_UNIFIED_CACHE =3D 0x01000000, + QEMU_PPC_FEATURE_HAS_SPE =3D 0x00800000, + QEMU_PPC_FEATURE_HAS_EFP_SINGLE =3D 0x00400000, + QEMU_PPC_FEATURE_HAS_EFP_DOUBLE =3D 0x00200000, + QEMU_PPC_FEATURE_NO_TB =3D 0x00100000, + QEMU_PPC_FEATURE_POWER4 =3D 0x00080000, + QEMU_PPC_FEATURE_POWER5 =3D 0x00040000, + QEMU_PPC_FEATURE_POWER5_PLUS =3D 0x00020000, + QEMU_PPC_FEATURE_CELL =3D 0x00010000, + QEMU_PPC_FEATURE_BOOKE =3D 0x00008000, + QEMU_PPC_FEATURE_SMT =3D 0x00004000, + QEMU_PPC_FEATURE_ICACHE_SNOOP =3D 0x00002000, + QEMU_PPC_FEATURE_ARCH_2_05 =3D 0x00001000, + QEMU_PPC_FEATURE_PA6T =3D 0x00000800, + QEMU_PPC_FEATURE_HAS_DFP =3D 0x00000400, + QEMU_PPC_FEATURE_POWER6_EXT =3D 0x00000200, + QEMU_PPC_FEATURE_ARCH_2_06 =3D 0x00000100, + QEMU_PPC_FEATURE_HAS_VSX =3D 0x00000080, + QEMU_PPC_FEATURE_PSERIES_PERFMON_COMPAT =3D 0x00000040, + + QEMU_PPC_FEATURE_TRUE_LE =3D 0x00000002, + QEMU_PPC_FEATURE_PPC_LE =3D 0x00000001, + + /* Feature definitions in AT_HWCAP2. */ + QEMU_PPC_FEATURE2_ARCH_2_07 =3D 0x80000000, /* ISA 2.07 */ + QEMU_PPC_FEATURE2_HAS_HTM =3D 0x40000000, /* Hardware Transactional Me= mory */ + QEMU_PPC_FEATURE2_HAS_DSCR =3D 0x20000000, /* Data Stream Control Regi= ster */ + QEMU_PPC_FEATURE2_HAS_EBB =3D 0x10000000, /* Event Base Branching */ + QEMU_PPC_FEATURE2_HAS_ISEL =3D 0x08000000, /* Integer Select */ + QEMU_PPC_FEATURE2_HAS_TAR =3D 0x04000000, /* Target Address Register */ + QEMU_PPC_FEATURE2_VEC_CRYPTO =3D 0x02000000, + QEMU_PPC_FEATURE2_HTM_NOSC =3D 0x01000000, + QEMU_PPC_FEATURE2_ARCH_3_00 =3D 0x00800000, /* ISA 3.00 */ + QEMU_PPC_FEATURE2_HAS_IEEE128 =3D 0x00400000, /* VSX IEEE Bin Float 12= 8-bit */ + QEMU_PPC_FEATURE2_DARN =3D 0x00200000, /* darn random number insn */ + QEMU_PPC_FEATURE2_SCV =3D 0x00100000, /* scv syscall */ + QEMU_PPC_FEATURE2_HTM_NO_SUSPEND =3D 0x00080000, /* TM w/o suspended s= tate */ + QEMU_PPC_FEATURE2_ARCH_3_1 =3D 0x00040000, /* ISA 3.1 */ + QEMU_PPC_FEATURE2_MMA =3D 0x00020000, /* Matrix-Multiply Assist */ +}; + +abi_ulong get_elf_hwcap(CPUState *cs) +{ + PowerPCCPU *cpu =3D POWERPC_CPU(cs); + uint32_t features =3D 0; + + /* + * We don't have to be terribly complete here; the high points are + * Altivec/FP/SPE support. Anything else is just a bonus. + */ +#define GET_FEATURE(flag, feature) \ + do { if (cpu->env.insns_flags & flag) { features |=3D feature; } } whi= le (0) +#define GET_FEATURE2(flags, feature) \ + do { \ + if ((cpu->env.insns_flags2 & flags) =3D=3D flags) { \ + features |=3D feature; \ + } \ + } while (0) + GET_FEATURE(PPC_64B, QEMU_PPC_FEATURE_64); + GET_FEATURE(PPC_FLOAT, QEMU_PPC_FEATURE_HAS_FPU); + GET_FEATURE(PPC_ALTIVEC, QEMU_PPC_FEATURE_HAS_ALTIVEC); + GET_FEATURE(PPC_SPE, QEMU_PPC_FEATURE_HAS_SPE); + GET_FEATURE(PPC_SPE_SINGLE, QEMU_PPC_FEATURE_HAS_EFP_SINGLE); + GET_FEATURE(PPC_SPE_DOUBLE, QEMU_PPC_FEATURE_HAS_EFP_DOUBLE); + GET_FEATURE(PPC_BOOKE, QEMU_PPC_FEATURE_BOOKE); + GET_FEATURE(PPC_405_MAC, QEMU_PPC_FEATURE_HAS_4xxMAC); + GET_FEATURE2(PPC2_DFP, QEMU_PPC_FEATURE_HAS_DFP); + GET_FEATURE2(PPC2_VSX, QEMU_PPC_FEATURE_HAS_VSX); + GET_FEATURE2((PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206= | + PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206), + QEMU_PPC_FEATURE_ARCH_2_06); + +#undef GET_FEATURE +#undef GET_FEATURE2 + + return features; +} + +abi_ulong get_elf_hwcap2(CPUState *cs) +{ + PowerPCCPU *cpu =3D POWERPC_CPU(cs); + uint32_t features =3D 0; + +#define GET_FEATURE(flag, feature) \ + do { if (cpu->env.insns_flags & flag) { features |=3D feature; } } whi= le (0) +#define GET_FEATURE2(flag, feature) \ + do { if (cpu->env.insns_flags2 & flag) { features |=3D feature; } } wh= ile (0) + + GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL); + GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR); + GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | + PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07 | + QEMU_PPC_FEATURE2_VEC_CRYPTO); + GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00 | + QEMU_PPC_FEATURE2_DARN | QEMU_PPC_FEATURE2_HAS_IEEE128); + GET_FEATURE2(PPC2_ISA310, QEMU_PPC_FEATURE2_ARCH_3_1 | + QEMU_PPC_FEATURE2_MMA); + +#undef GET_FEATURE +#undef GET_FEATURE2 + + return features; +} --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337079; cv=none; d=zohomail.com; s=zohoarc; b=TCAjLsjwFGsbpHK37scTKRm2UkgjjX2ArcJpIbsgwMgjeexTjC88lVPGJd8678800nIqSCMrzvrrHTltqt31vxNzHcW5+lQ8eJGJb8Aea1DoEJILhjP66ZwOzSUMe1Rom32QCnnd0Tps7miypA5/wlLb1oSrrq60nipgCDJrZuY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337079; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=OKIdW06ZTz1VXr6FwN7LN5KfnzHWclYz+QB+jPoNsFE=; b=J5Ria63kdQolMnzsP5QTKRPAulyxdbmqTSKm6vOxuObuZsyoKLfQK1/CoW6EXsxN5jcwyIJrUJlgzV2oivEw4AxPGuY2XlRDMk3etkCv8AC4OzcpMShw0pRPiIPwoSpoUsU22ljx2kn0+yT2HfcBKQfapg+18WuepFdLU+m1XX8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337079897573.5156145174276; Wed, 27 Aug 2025 16:24:39 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPRv-0001l2-HD; Wed, 27 Aug 2025 19:21:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPRt-0001k4-Vc for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:01 -0400 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPRr-0004A8-Pz for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:01 -0400 Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-76e2ea933b7so343429b3a.1 for ; Wed, 27 Aug 2025 16:20:59 -0700 (PDT) Received: from stoup.. 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Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/loader.h | 3 +- linux-user/loongarch64/target_elf.h | 2 ++ linux-user/elfload.c | 49 +---------------------------- linux-user/loongarch64/elfload.c | 47 +++++++++++++++++++++++++++ 4 files changed, 52 insertions(+), 49 deletions(-) diff --git a/linux-user/loader.h b/linux-user/loader.h index 818c5e6d7d..92b6d41145 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -102,7 +102,8 @@ extern unsigned long guest_stack_size; const char *get_elf_cpu_model(uint32_t eflags); =20 #if defined(TARGET_I386) || defined(TARGET_X86_64) || defined(TARGET_ARM) \ - || defined(TARGET_SPARC) || defined(TARGET_PPC) + || defined(TARGET_SPARC) || defined(TARGET_PPC) \ + || defined(TARGET_LOONGARCH64) abi_ulong get_elf_hwcap(CPUState *cs); abi_ulong get_elf_hwcap2(CPUState *cs); #endif diff --git a/linux-user/loongarch64/target_elf.h b/linux-user/loongarch64/t= arget_elf.h index 39a08d35d9..037740d36f 100644 --- a/linux-user/loongarch64/target_elf.h +++ b/linux-user/loongarch64/target_elf.h @@ -6,4 +6,6 @@ #ifndef LOONGARCH_TARGET_ELF_H #define LOONGARCH_TARGET_ELF_H =20 +#define HAVE_ELF_HWCAP 1 + #endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 843b1f7b6c..574b37a22c 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -725,54 +725,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 =20 -#define ELF_HWCAP get_elf_hwcap() - -/* See arch/loongarch/include/uapi/asm/hwcap.h */ -enum { - HWCAP_LOONGARCH_CPUCFG =3D (1 << 0), - HWCAP_LOONGARCH_LAM =3D (1 << 1), - HWCAP_LOONGARCH_UAL =3D (1 << 2), - HWCAP_LOONGARCH_FPU =3D (1 << 3), - HWCAP_LOONGARCH_LSX =3D (1 << 4), - HWCAP_LOONGARCH_LASX =3D (1 << 5), - HWCAP_LOONGARCH_CRC32 =3D (1 << 6), - HWCAP_LOONGARCH_COMPLEX =3D (1 << 7), - HWCAP_LOONGARCH_CRYPTO =3D (1 << 8), - HWCAP_LOONGARCH_LVZ =3D (1 << 9), - HWCAP_LOONGARCH_LBT_X86 =3D (1 << 10), - HWCAP_LOONGARCH_LBT_ARM =3D (1 << 11), - HWCAP_LOONGARCH_LBT_MIPS =3D (1 << 12), -}; - -static uint32_t get_elf_hwcap(void) -{ - LoongArchCPU *cpu =3D LOONGARCH_CPU(thread_cpu); - uint32_t hwcaps =3D 0; - - hwcaps |=3D HWCAP_LOONGARCH_CRC32; - - if (FIELD_EX32(cpu->env.cpucfg[1], CPUCFG1, UAL)) { - hwcaps |=3D HWCAP_LOONGARCH_UAL; - } - - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, FP)) { - hwcaps |=3D HWCAP_LOONGARCH_FPU; - } - - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LAM)) { - hwcaps |=3D HWCAP_LOONGARCH_LAM; - } - - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { - hwcaps |=3D HWCAP_LOONGARCH_LSX; - } - - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) { - hwcaps |=3D HWCAP_LOONGARCH_LASX; - } - - return hwcaps; -} +#define ELF_HWCAP get_elf_hwcap(thread_cpu) =20 #define ELF_PLATFORM "loongarch" =20 diff --git a/linux-user/loongarch64/elfload.c b/linux-user/loongarch64/elfl= oad.c index 874dc4c230..ee4a85b8d6 100644 --- a/linux-user/loongarch64/elfload.c +++ b/linux-user/loongarch64/elfload.c @@ -9,3 +9,50 @@ const char *get_elf_cpu_model(uint32_t eflags) { return "la464"; } + +/* See arch/loongarch/include/uapi/asm/hwcap.h */ +enum { + HWCAP_LOONGARCH_CPUCFG =3D (1 << 0), + HWCAP_LOONGARCH_LAM =3D (1 << 1), + HWCAP_LOONGARCH_UAL =3D (1 << 2), + HWCAP_LOONGARCH_FPU =3D (1 << 3), + HWCAP_LOONGARCH_LSX =3D (1 << 4), + HWCAP_LOONGARCH_LASX =3D (1 << 5), + HWCAP_LOONGARCH_CRC32 =3D (1 << 6), + HWCAP_LOONGARCH_COMPLEX =3D (1 << 7), + HWCAP_LOONGARCH_CRYPTO =3D (1 << 8), + HWCAP_LOONGARCH_LVZ =3D (1 << 9), + HWCAP_LOONGARCH_LBT_X86 =3D (1 << 10), + HWCAP_LOONGARCH_LBT_ARM =3D (1 << 11), + HWCAP_LOONGARCH_LBT_MIPS =3D (1 << 12), +}; + +abi_ulong get_elf_hwcap(CPUState *cs) +{ + LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); + abi_ulong hwcaps =3D 0; + + hwcaps |=3D HWCAP_LOONGARCH_CRC32; + + if (FIELD_EX32(cpu->env.cpucfg[1], CPUCFG1, UAL)) { + hwcaps |=3D HWCAP_LOONGARCH_UAL; + } + + if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, FP)) { + hwcaps |=3D HWCAP_LOONGARCH_FPU; + } + + if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LAM)) { + hwcaps |=3D HWCAP_LOONGARCH_LAM; + } + + if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { + hwcaps |=3D HWCAP_LOONGARCH_LSX; + } + + if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) { + hwcaps |=3D HWCAP_LOONGARCH_LASX; + } + + return hwcaps; +} --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337021; cv=none; d=zohomail.com; s=zohoarc; b=gogr52Bq5sn/DOFEtcdq7jUwdOHmhdGlxAS52Svwf/dTXLUMJkEXFe5x55Q+0eIXBJa8QcdBbdctb8rk1D6XpeJoejyKli5Cl/sa/L9yTXTushgf2YGH6ZbnxYfHM9PVdfWo+8toy0GUqRR+IHlP+CGEMv8MIi+pdaiTJ9VBFHo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337021; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/loader.h | 2 +- linux-user/mips/target_elf.h | 2 ++ linux-user/mips64/target_elf.h | 2 ++ linux-user/elfload.c | 52 +--------------------------------- linux-user/mips/elfload.c | 50 ++++++++++++++++++++++++++++++++ 5 files changed, 56 insertions(+), 52 deletions(-) diff --git a/linux-user/loader.h b/linux-user/loader.h index 92b6d41145..04457737dd 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -103,7 +103,7 @@ const char *get_elf_cpu_model(uint32_t eflags); =20 #if defined(TARGET_I386) || defined(TARGET_X86_64) || defined(TARGET_ARM) \ || defined(TARGET_SPARC) || defined(TARGET_PPC) \ - || defined(TARGET_LOONGARCH64) + || defined(TARGET_LOONGARCH64) || defined(TARGET_MIPS) abi_ulong get_elf_hwcap(CPUState *cs); abi_ulong get_elf_hwcap2(CPUState *cs); #endif diff --git a/linux-user/mips/target_elf.h b/linux-user/mips/target_elf.h index febf710c7a..877f8347d7 100644 --- a/linux-user/mips/target_elf.h +++ b/linux-user/mips/target_elf.h @@ -8,4 +8,6 @@ #ifndef MIPS_TARGET_ELF_H #define MIPS_TARGET_ELF_H =20 +#define HAVE_ELF_HWCAP 1 + #endif diff --git a/linux-user/mips64/target_elf.h b/linux-user/mips64/target_elf.h index 02e6d14840..c0347e5cb6 100644 --- a/linux-user/mips64/target_elf.h +++ b/linux-user/mips64/target_elf.h @@ -8,4 +8,6 @@ #ifndef MIPS64_TARGET_ELF_H #define MIPS64_TARGET_ELF_H =20 +#define HAVE_ELF_HWCAP 1 + #endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 574b37a22c..dc3f502277 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -834,57 +834,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, const CPUMIPSState *e #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 =20 -/* See arch/mips/include/uapi/asm/hwcap.h. */ -enum { - HWCAP_MIPS_R6 =3D (1 << 0), - HWCAP_MIPS_MSA =3D (1 << 1), - HWCAP_MIPS_CRC32 =3D (1 << 2), - HWCAP_MIPS_MIPS16 =3D (1 << 3), - HWCAP_MIPS_MDMX =3D (1 << 4), - HWCAP_MIPS_MIPS3D =3D (1 << 5), - HWCAP_MIPS_SMARTMIPS =3D (1 << 6), - HWCAP_MIPS_DSP =3D (1 << 7), - HWCAP_MIPS_DSP2 =3D (1 << 8), - HWCAP_MIPS_DSP3 =3D (1 << 9), - HWCAP_MIPS_MIPS16E2 =3D (1 << 10), - HWCAP_LOONGSON_MMI =3D (1 << 11), - HWCAP_LOONGSON_EXT =3D (1 << 12), - HWCAP_LOONGSON_EXT2 =3D (1 << 13), - HWCAP_LOONGSON_CPUCFG =3D (1 << 14), -}; - -#define ELF_HWCAP get_elf_hwcap() - -#define GET_FEATURE_INSN(_flag, _hwcap) \ - do { if (cpu->env.insn_flags & (_flag)) { hwcaps |=3D _hwcap; } } whil= e (0) - -#define GET_FEATURE_REG_SET(_reg, _mask, _hwcap) \ - do { if (cpu->env._reg & (_mask)) { hwcaps |=3D _hwcap; } } while (0) - -#define GET_FEATURE_REG_EQU(_reg, _start, _length, _val, _hwcap) \ - do { \ - if (extract32(cpu->env._reg, (_start), (_length)) =3D=3D (_val)) {= \ - hwcaps |=3D _hwcap; \ - } \ - } while (0) - -static uint32_t get_elf_hwcap(void) -{ - MIPSCPU *cpu =3D MIPS_CPU(thread_cpu); - uint32_t hwcaps =3D 0; - - GET_FEATURE_REG_EQU(CP0_Config0, CP0C0_AR, CP0C0_AR_LENGTH, - 2, HWCAP_MIPS_R6); - GET_FEATURE_REG_SET(CP0_Config3, 1 << CP0C3_MSAP, HWCAP_MIPS_MSA); - GET_FEATURE_INSN(ASE_LMMI, HWCAP_LOONGSON_MMI); - GET_FEATURE_INSN(ASE_LEXT, HWCAP_LOONGSON_EXT); - - return hwcaps; -} - -#undef GET_FEATURE_REG_EQU -#undef GET_FEATURE_REG_SET -#undef GET_FEATURE_INSN +#define ELF_HWCAP get_elf_hwcap(thread_cpu) =20 #endif /* TARGET_MIPS */ =20 diff --git a/linux-user/mips/elfload.c b/linux-user/mips/elfload.c index 04e3b76740..739f71c21b 100644 --- a/linux-user/mips/elfload.c +++ b/linux-user/mips/elfload.c @@ -42,3 +42,53 @@ const char *get_elf_cpu_model(uint32_t eflags) return "24Kf"; #endif } + +/* See arch/mips/include/uapi/asm/hwcap.h. */ +enum { + HWCAP_MIPS_R6 =3D (1 << 0), + HWCAP_MIPS_MSA =3D (1 << 1), + HWCAP_MIPS_CRC32 =3D (1 << 2), + HWCAP_MIPS_MIPS16 =3D (1 << 3), + HWCAP_MIPS_MDMX =3D (1 << 4), + HWCAP_MIPS_MIPS3D =3D (1 << 5), + HWCAP_MIPS_SMARTMIPS =3D (1 << 6), + HWCAP_MIPS_DSP =3D (1 << 7), + HWCAP_MIPS_DSP2 =3D (1 << 8), + HWCAP_MIPS_DSP3 =3D (1 << 9), + HWCAP_MIPS_MIPS16E2 =3D (1 << 10), + HWCAP_LOONGSON_MMI =3D (1 << 11), + HWCAP_LOONGSON_EXT =3D (1 << 12), + HWCAP_LOONGSON_EXT2 =3D (1 << 13), + HWCAP_LOONGSON_CPUCFG =3D (1 << 14), +}; + +#define GET_FEATURE_INSN(_flag, _hwcap) \ + do { if (cpu->env.insn_flags & (_flag)) { hwcaps |=3D _hwcap; } } whil= e (0) + +#define GET_FEATURE_REG_SET(_reg, _mask, _hwcap) \ + do { if (cpu->env._reg & (_mask)) { hwcaps |=3D _hwcap; } } while (0) + +#define GET_FEATURE_REG_EQU(_reg, _start, _length, _val, _hwcap) \ + do { \ + if (extract32(cpu->env._reg, (_start), (_length)) =3D=3D (_val)) {= \ + hwcaps |=3D _hwcap; \ + } \ + } while (0) + +abi_ulong get_elf_hwcap(CPUState *cs) +{ + MIPSCPU *cpu =3D MIPS_CPU(cs); + abi_ulong hwcaps =3D 0; + + GET_FEATURE_REG_EQU(CP0_Config0, CP0C0_AR, CP0C0_AR_LENGTH, + 2, HWCAP_MIPS_R6); + GET_FEATURE_REG_SET(CP0_Config3, 1 << CP0C3_MSAP, HWCAP_MIPS_MSA); + GET_FEATURE_INSN(ASE_LMMI, HWCAP_LOONGSON_MMI); + GET_FEATURE_INSN(ASE_LEXT, HWCAP_LOONGSON_EXT); + + return hwcaps; +} + +#undef GET_FEATURE_REG_EQU +#undef GET_FEATURE_REG_SET +#undef GET_FEATURE_INSN --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337072; cv=none; d=zohomail.com; s=zohoarc; b=Uy6PFibn6MFCG2riE6txxuFJek05fsLlU4/ltHqjwqtKd0OMtGfZnkvSTJ6RtlZssDyv5gpmxfUJKZG+ELjVbLxue3IGm3xTkaYNgm0OzgkcKc94cV3S+B4N9R5nMx0ugSDUkvpLNLjb66evtyUezR4Gkw7ERItDMFUmlSn+aF0= ARC-Message-Signature: i=1; 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Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/loader.h | 3 ++- linux-user/sh4/target_elf.h | 2 ++ linux-user/elfload.c | 29 +---------------------------- linux-user/sh4/elfload.c | 27 +++++++++++++++++++++++++++ 4 files changed, 32 insertions(+), 29 deletions(-) diff --git a/linux-user/loader.h b/linux-user/loader.h index 04457737dd..d8a9399807 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -103,7 +103,8 @@ const char *get_elf_cpu_model(uint32_t eflags); =20 #if defined(TARGET_I386) || defined(TARGET_X86_64) || defined(TARGET_ARM) \ || defined(TARGET_SPARC) || defined(TARGET_PPC) \ - || defined(TARGET_LOONGARCH64) || defined(TARGET_MIPS) + || defined(TARGET_LOONGARCH64) || defined(TARGET_MIPS) \ + || defined(TARGET_SH4) abi_ulong get_elf_hwcap(CPUState *cs); abi_ulong get_elf_hwcap2(CPUState *cs); #endif diff --git a/linux-user/sh4/target_elf.h b/linux-user/sh4/target_elf.h index d17011bd75..badd0f5371 100644 --- a/linux-user/sh4/target_elf.h +++ b/linux-user/sh4/target_elf.h @@ -8,4 +8,6 @@ #ifndef SH4_TARGET_ELF_H #define SH4_TARGET_ELF_H =20 +#define HAVE_ELF_HWCAP 1 + #endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index dc3f502277..7e1c11c39f 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -963,34 +963,7 @@ static inline void elf_core_copy_regs(target_elf_gregs= et_t *regs, #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 =20 -enum { - SH_CPU_HAS_FPU =3D 0x0001, /* Hardware FPU support */ - SH_CPU_HAS_P2_FLUSH_BUG =3D 0x0002, /* Need to flush the cache in P2= area */ - SH_CPU_HAS_MMU_PAGE_ASSOC =3D 0x0004, /* SH3: TLB way selection bit su= pport */ - SH_CPU_HAS_DSP =3D 0x0008, /* SH-DSP: DSP support */ - SH_CPU_HAS_PERF_COUNTER =3D 0x0010, /* Hardware performance counters= */ - SH_CPU_HAS_PTEA =3D 0x0020, /* PTEA register */ - SH_CPU_HAS_LLSC =3D 0x0040, /* movli.l/movco.l */ - SH_CPU_HAS_L2_CACHE =3D 0x0080, /* Secondary cache / URAM */ - SH_CPU_HAS_OP32 =3D 0x0100, /* 32-bit instruction support */ - SH_CPU_HAS_PTEAEX =3D 0x0200, /* PTE ASID Extension support */ -}; - -#define ELF_HWCAP get_elf_hwcap() - -static uint32_t get_elf_hwcap(void) -{ - SuperHCPU *cpu =3D SUPERH_CPU(thread_cpu); - uint32_t hwcap =3D 0; - - hwcap |=3D SH_CPU_HAS_FPU; - - if (cpu->env.features & SH_FEATURE_SH4A) { - hwcap |=3D SH_CPU_HAS_LLSC; - } - - return hwcap; -} +#define ELF_HWCAP get_elf_hwcap(thread_cpu) =20 #endif =20 diff --git a/linux-user/sh4/elfload.c b/linux-user/sh4/elfload.c index 546034ec07..99ad4f6334 100644 --- a/linux-user/sh4/elfload.c +++ b/linux-user/sh4/elfload.c @@ -9,3 +9,30 @@ const char *get_elf_cpu_model(uint32_t eflags) { return "sh7785"; } + +enum { + SH_CPU_HAS_FPU =3D 0x0001, /* Hardware FPU support */ + SH_CPU_HAS_P2_FLUSH_BUG =3D 0x0002, /* Need to flush the cache in P2= area */ + SH_CPU_HAS_MMU_PAGE_ASSOC =3D 0x0004, /* SH3: TLB way selection bit su= pport */ + SH_CPU_HAS_DSP =3D 0x0008, /* SH-DSP: DSP support */ + SH_CPU_HAS_PERF_COUNTER =3D 0x0010, /* Hardware performance counters= */ + SH_CPU_HAS_PTEA =3D 0x0020, /* PTEA register */ + SH_CPU_HAS_LLSC =3D 0x0040, /* movli.l/movco.l */ + SH_CPU_HAS_L2_CACHE =3D 0x0080, /* Secondary cache / URAM */ + SH_CPU_HAS_OP32 =3D 0x0100, /* 32-bit instruction support */ + SH_CPU_HAS_PTEAEX =3D 0x0200, /* PTE ASID Extension support */ +}; + +abi_ulong get_elf_hwcap(CPUState *cs) +{ + SuperHCPU *cpu =3D SUPERH_CPU(cs); + abi_ulong hwcap =3D 0; + + hwcap |=3D SH_CPU_HAS_FPU; + + if (cpu->env.features & SH_FEATURE_SH4A) { + hwcap |=3D SH_CPU_HAS_LLSC; + } + + return hwcap; +} --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336941; cv=none; d=zohomail.com; s=zohoarc; b=Ef1mx3Te0/m0Gmfp3aqApnvv3NWqnC8EjirTOYvWP3galQ3Bao9XsEOqlE4xrevu0kUJ48xTBHlw1u7mlLlohiS8TiHBD4uR92Vp+8cbUc0armUoh/OABdSH9ujNBhkAHO/CuvcbL/ExDImPzFWahm1O13kKHZS86nGn/+0q6lk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336941; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/loader.h | 5 +-- linux-user/s390x/target_elf.h | 2 ++ linux-user/s390x/target_proc.h | 2 +- linux-user/elfload.c | 60 +--------------------------------- linux-user/s390x/elfload.c | 57 ++++++++++++++++++++++++++++++++ 5 files changed, 62 insertions(+), 64 deletions(-) diff --git a/linux-user/loader.h b/linux-user/loader.h index d8a9399807..c14e69f551 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -104,13 +104,10 @@ const char *get_elf_cpu_model(uint32_t eflags); #if defined(TARGET_I386) || defined(TARGET_X86_64) || defined(TARGET_ARM) \ || defined(TARGET_SPARC) || defined(TARGET_PPC) \ || defined(TARGET_LOONGARCH64) || defined(TARGET_MIPS) \ - || defined(TARGET_SH4) + || defined(TARGET_SH4) || defined(TARGET_S390X) abi_ulong get_elf_hwcap(CPUState *cs); abi_ulong get_elf_hwcap2(CPUState *cs); #endif -#if defined(TARGET_S390X) -uint32_t get_elf_hwcap(void); -#endif const char *elf_hwcap_str(uint32_t bit); const char *elf_hwcap2_str(uint32_t bit); =20 diff --git a/linux-user/s390x/target_elf.h b/linux-user/s390x/target_elf.h index e51b053339..cebace949a 100644 --- a/linux-user/s390x/target_elf.h +++ b/linux-user/s390x/target_elf.h @@ -8,4 +8,6 @@ #ifndef S390X_TARGET_ELF_H #define S390X_TARGET_ELF_H =20 +#define HAVE_ELF_HWCAP 1 + #endif diff --git a/linux-user/s390x/target_proc.h b/linux-user/s390x/target_proc.h index a4a4821ea5..60cc22d3b4 100644 --- a/linux-user/s390x/target_proc.h +++ b/linux-user/s390x/target_proc.h @@ -48,7 +48,7 @@ static void show_cpu_summary(CPUArchState *cpu_env, int f= d) { S390CPUModel *model =3D env_archcpu(cpu_env)->model; int num_cpus =3D sysconf(_SC_NPROCESSORS_ONLN); - uint32_t elf_hwcap =3D get_elf_hwcap(); + uint32_t elf_hwcap =3D get_elf_hwcap(env_cpu(cpu_env)); const char *hwcap_str; int i; =20 diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 7e1c11c39f..ba8593368d 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1039,65 +1039,7 @@ static inline void init_thread(struct target_pt_regs= *regs, #define ELF_DATA ELFDATA2MSB #define ELF_ARCH EM_S390 =20 -#include "elf.h" - -#define ELF_HWCAP get_elf_hwcap() - -#define GET_FEATURE(_feat, _hwcap) \ - do { if (s390_has_feat(_feat)) { hwcap |=3D _hwcap; } } while (0) - -uint32_t get_elf_hwcap(void) -{ - /* - * Let's assume we always have esan3 and zarch. - * 31-bit processes can use 64-bit registers (high gprs). - */ - uint32_t hwcap =3D HWCAP_S390_ESAN3 | HWCAP_S390_ZARCH | HWCAP_S390_HI= GH_GPRS; - - GET_FEATURE(S390_FEAT_STFLE, HWCAP_S390_STFLE); - GET_FEATURE(S390_FEAT_MSA, HWCAP_S390_MSA); - GET_FEATURE(S390_FEAT_LONG_DISPLACEMENT, HWCAP_S390_LDISP); - GET_FEATURE(S390_FEAT_EXTENDED_IMMEDIATE, HWCAP_S390_EIMM); - if (s390_has_feat(S390_FEAT_EXTENDED_TRANSLATION_3) && - s390_has_feat(S390_FEAT_ETF3_ENH)) { - hwcap |=3D HWCAP_S390_ETF3EH; - } - GET_FEATURE(S390_FEAT_VECTOR, HWCAP_S390_VXRS); - GET_FEATURE(S390_FEAT_VECTOR_ENH, HWCAP_S390_VXRS_EXT); - GET_FEATURE(S390_FEAT_VECTOR_ENH2, HWCAP_S390_VXRS_EXT2); - - return hwcap; -} - -const char *elf_hwcap_str(uint32_t bit) -{ - static const char *hwcap_str[] =3D { - [HWCAP_S390_NR_ESAN3] =3D "esan3", - [HWCAP_S390_NR_ZARCH] =3D "zarch", - [HWCAP_S390_NR_STFLE] =3D "stfle", - [HWCAP_S390_NR_MSA] =3D "msa", - [HWCAP_S390_NR_LDISP] =3D "ldisp", - [HWCAP_S390_NR_EIMM] =3D "eimm", - [HWCAP_S390_NR_DFP] =3D "dfp", - [HWCAP_S390_NR_HPAGE] =3D "edat", - [HWCAP_S390_NR_ETF3EH] =3D "etf3eh", - [HWCAP_S390_NR_HIGH_GPRS] =3D "highgprs", - [HWCAP_S390_NR_TE] =3D "te", - [HWCAP_S390_NR_VXRS] =3D "vx", - [HWCAP_S390_NR_VXRS_BCD] =3D "vxd", - [HWCAP_S390_NR_VXRS_EXT] =3D "vxe", - [HWCAP_S390_NR_GS] =3D "gs", - [HWCAP_S390_NR_VXRS_EXT2] =3D "vxe2", - [HWCAP_S390_NR_VXRS_PDE] =3D "vxp", - [HWCAP_S390_NR_SORT] =3D "sort", - [HWCAP_S390_NR_DFLT] =3D "dflt", - [HWCAP_S390_NR_NNPA] =3D "nnpa", - [HWCAP_S390_NR_PCI_MIO] =3D "pcimio", - [HWCAP_S390_NR_SIE] =3D "sie", - }; - - return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; -} +#define ELF_HWCAP get_elf_hwcap(thread_cpu) =20 static inline void init_thread(struct target_pt_regs *regs, struct image_i= nfo *infop) { diff --git a/linux-user/s390x/elfload.c b/linux-user/s390x/elfload.c index 989953a247..79ceaba51d 100644 --- a/linux-user/s390x/elfload.c +++ b/linux-user/s390x/elfload.c @@ -3,9 +3,66 @@ #include "qemu/osdep.h" #include "qemu.h" #include "loader.h" +#include "elf.h" =20 =20 const char *get_elf_cpu_model(uint32_t eflags) { return "qemu"; } + +#define GET_FEATURE(_feat, _hwcap) \ + do { if (s390_has_feat(_feat)) { hwcap |=3D _hwcap; } } while (0) + +abi_ulong get_elf_hwcap(CPUState *cs) +{ + /* + * Let's assume we always have esan3 and zarch. + * 31-bit processes can use 64-bit registers (high gprs). + */ + uint32_t hwcap =3D HWCAP_S390_ESAN3 | HWCAP_S390_ZARCH | HWCAP_S390_HI= GH_GPRS; + + GET_FEATURE(S390_FEAT_STFLE, HWCAP_S390_STFLE); + GET_FEATURE(S390_FEAT_MSA, HWCAP_S390_MSA); + GET_FEATURE(S390_FEAT_LONG_DISPLACEMENT, HWCAP_S390_LDISP); + GET_FEATURE(S390_FEAT_EXTENDED_IMMEDIATE, HWCAP_S390_EIMM); + if (s390_has_feat(S390_FEAT_EXTENDED_TRANSLATION_3) && + s390_has_feat(S390_FEAT_ETF3_ENH)) { + hwcap |=3D HWCAP_S390_ETF3EH; + } + GET_FEATURE(S390_FEAT_VECTOR, HWCAP_S390_VXRS); + GET_FEATURE(S390_FEAT_VECTOR_ENH, HWCAP_S390_VXRS_EXT); + GET_FEATURE(S390_FEAT_VECTOR_ENH2, HWCAP_S390_VXRS_EXT2); + + return hwcap; +} + +const char *elf_hwcap_str(uint32_t bit) +{ + static const char *hwcap_str[] =3D { + [HWCAP_S390_NR_ESAN3] =3D "esan3", + [HWCAP_S390_NR_ZARCH] =3D "zarch", + [HWCAP_S390_NR_STFLE] =3D "stfle", + [HWCAP_S390_NR_MSA] =3D "msa", + [HWCAP_S390_NR_LDISP] =3D "ldisp", + [HWCAP_S390_NR_EIMM] =3D "eimm", + [HWCAP_S390_NR_DFP] =3D "dfp", + [HWCAP_S390_NR_HPAGE] =3D "edat", + [HWCAP_S390_NR_ETF3EH] =3D "etf3eh", + [HWCAP_S390_NR_HIGH_GPRS] =3D "highgprs", + [HWCAP_S390_NR_TE] =3D "te", + [HWCAP_S390_NR_VXRS] =3D "vx", + [HWCAP_S390_NR_VXRS_BCD] =3D "vxd", + [HWCAP_S390_NR_VXRS_EXT] =3D "vxe", + [HWCAP_S390_NR_GS] =3D "gs", + [HWCAP_S390_NR_VXRS_EXT2] =3D "vxe2", + [HWCAP_S390_NR_VXRS_PDE] =3D "vxp", + [HWCAP_S390_NR_SORT] =3D "sort", + [HWCAP_S390_NR_DFLT] =3D "dflt", + [HWCAP_S390_NR_NNPA] =3D "nnpa", + [HWCAP_S390_NR_PCI_MIO] =3D "pcimio", + [HWCAP_S390_NR_SIE] =3D "sie", + }; + + return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; +} --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336902; cv=none; d=zohomail.com; s=zohoarc; b=VJpU/Qux3EwKFJ2G8UygBnqZSLdO0fg94pONizYDYJmSl9LAxKjhomB7+yI9Okw5GYhLYhHXXOqhyepMxgIzS57WfOevOvfoka8QIza7tCj2DVNZL1EOd2twKXi4IXZ77fT4taVof4s+UrqckjeGbr/iPwuu4N6kZkJv2oF9q/M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336902; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=QHUbngbNrOIebBs0pvinM66UBm6mSJ9+oXdPY+2wgcQ=; b=QrHhQ/teyeAM842rcNJIrGuKFDGm95YqewcDJFnhctWjBGT7eHiAnmpiL/vaG7qBdjLH5Mmq3uaBJzC3gqudgs77EDlghiZBIXFnqa/oYEG3hH9gjUDFMtJYWc59qJmQMZDfKzX+pkYiTCvWUjTbi6vvwRmPSSVlBPoBxmANx/g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756336902754253.68556426958264; Wed, 27 Aug 2025 16:21:42 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPS9-000235-V8; Wed, 27 Aug 2025 19:21:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPS4-0001sG-Hi for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:12 -0400 Received: from mail-pf1-x42a.google.com ([2607:f8b0:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPS1-0004BM-Ky for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:11 -0400 Received: by mail-pf1-x42a.google.com with SMTP id d2e1a72fcca58-771e1e64fbbso476392b3a.3 for ; Wed, 27 Aug 2025 16:21:09 -0700 (PDT) Received: from stoup.. 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As this is the last instance of get_elf_hwcap to be converted, remove the ifdef around the declaration in loader.h. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/loader.h | 5 ----- linux-user/riscv/target_elf.h | 2 ++ linux-user/elfload.c | 14 +------------- linux-user/riscv/elfload.c | 12 ++++++++++++ 4 files changed, 15 insertions(+), 18 deletions(-) diff --git a/linux-user/loader.h b/linux-user/loader.h index c14e69f551..729723cc06 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -101,13 +101,8 @@ extern unsigned long guest_stack_size; /* Note that Elf32 and Elf64 use uint32_t for e_flags. */ const char *get_elf_cpu_model(uint32_t eflags); =20 -#if defined(TARGET_I386) || defined(TARGET_X86_64) || defined(TARGET_ARM) \ - || defined(TARGET_SPARC) || defined(TARGET_PPC) \ - || defined(TARGET_LOONGARCH64) || defined(TARGET_MIPS) \ - || defined(TARGET_SH4) || defined(TARGET_S390X) abi_ulong get_elf_hwcap(CPUState *cs); abi_ulong get_elf_hwcap2(CPUState *cs); -#endif const char *elf_hwcap_str(uint32_t bit); const char *elf_hwcap2_str(uint32_t bit); =20 diff --git a/linux-user/riscv/target_elf.h b/linux-user/riscv/target_elf.h index bfe86105d0..48d9af557b 100644 --- a/linux-user/riscv/target_elf.h +++ b/linux-user/riscv/target_elf.h @@ -8,4 +8,6 @@ #ifndef RISCV_TARGET_ELF_H #define RISCV_TARGET_ELF_H =20 +#define HAVE_ELF_HWCAP 1 + #endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index ba8593368d..ce4055b0e9 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1099,19 +1099,7 @@ static void elf_core_copy_regs(target_elf_gregset_t = *regs, #define VDSO_HEADER "vdso-64.c.inc" #endif =20 -#define ELF_HWCAP get_elf_hwcap() - -static uint32_t get_elf_hwcap(void) -{ -#define MISA_BIT(EXT) (1 << (EXT - 'A')) - RISCVCPU *cpu =3D RISCV_CPU(thread_cpu); - uint32_t mask =3D MISA_BIT('I') | MISA_BIT('M') | MISA_BIT('A') - | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C') - | MISA_BIT('V'); - - return cpu->env.misa_ext & mask; -#undef MISA_BIT -} +#define ELF_HWCAP get_elf_hwcap(thread_cpu) =20 static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) diff --git a/linux-user/riscv/elfload.c b/linux-user/riscv/elfload.c index f92adb7308..2e7d622232 100644 --- a/linux-user/riscv/elfload.c +++ b/linux-user/riscv/elfload.c @@ -9,3 +9,15 @@ const char *get_elf_cpu_model(uint32_t eflags) { return "max"; } + +abi_ulong get_elf_hwcap(CPUState *cs) +{ +#define MISA_BIT(EXT) (1 << (EXT - 'A')) + RISCVCPU *cpu =3D RISCV_CPU(cs); + uint32_t mask =3D MISA_BIT('I') | MISA_BIT('M') | MISA_BIT('A') + | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C') + | MISA_BIT('V'); + + return cpu->env.misa_ext & mask; +#undef MISA_BIT +} --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.21.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:21:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336870; x=1756941670; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=h7yOBImSiodxYnzN8XvMdq74qSZ6gWrRgjjgFNxAniQ=; b=YSdauFGPg10pAg8T8OBCYmPKpmC6t88VrbCBgTHq/1ekvhlkXP/3FbroGg1JM871yr 1wmNGY7ZYExNbsri8hAUY67tJUasMBOhSZ+HSyRHxk9k64fzTyy8K2knu/tGdL5MqnBG WIEiQEXQ9+biIHUTJp1iWMH+6K9XC01r4BaA8soxYPnnpaRszv8Oy6TKOExseA6GTDLd 2qMi7Dx+PB4XugA1SkqAUGWI/ODIzXboBq/Pt8WmVK47EdNnT+7P15O01GQDLPe1mN9w aS0UXaZ69dP+l8fxM5bSkG+u6fIw7nGqSO+hCyNFeDtCnDtO3Owu00ImQROEsuLXU9l5 6+WA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336870; x=1756941670; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=h7yOBImSiodxYnzN8XvMdq74qSZ6gWrRgjjgFNxAniQ=; b=ZcOoUhVC3+Db3SyYxeOUWtlw2WXYO0isEl6AoncTeqUH3evkSqmtO+YmOUBWBvKZlM ryH47nFsjQVFEUdB3ZNvIsO57HDul4Bs0znnSQMSDhRXHB81n5oq8uYwGB+pGps3C8By Ff55//CkOhZ9uJrleYM7vdOy8tarXybjN7HkHO9DLKeqXOJ35eb9svzOpqICfs9Hyh2N s87NzVPCdBcf02OUxTFsKh6QEkd9K3gxGMdO1LaETqim6gsp5P4Rkmo4JHQhuLoEB9md CeIFbntmWykjMlqT8klrmChhM6mIwll4RdWwZ4YbAlTBllawzlJejVnkxRl6Vhd4NetH URAg== X-Gm-Message-State: AOJu0YxoKdiQCF/+6oD8f42M8OX1xX5uJVhq5PyXehQWGrKknnErA4uT Bcxc0cuVjArX4M82cmQe5iuWudwB9k7LRl0dswglYWitw2pH/6CKf605164beCv+WDFIW31oLjp asOzdUWY= X-Gm-Gg: ASbGncsm4gafNbHE/a00hyCg8I5iLtcBOfpZpUQ3SI3ICxyu2DvTFPigqKNJojbNPmS 3TpbYrPaeWoWUYxfv3SgZzeafvbHt0RZ74dhFrQ3VbjWfMiwk35jPX481MMCBcBKacTVb9bsLJI 2AY9YPVaTZ3XltalgInDrLVPTLfHBwURFP3wqThXJZpVpORNdNCbtyojIhWSSzCQMis09jB/0VZ 26fKzA8rbhDqS0yR+0ews6E7JtMillHwJOa6rGEiYm8EgRVUvdlrTiW/+QVS6wQR7T87H6GtwwQ 2k7uhYebFSmp9QO4L5VQOUDskq7UXQnobyHkkdBBf/9KuiNTr1IKnkL7YknjOMCzSFhzvuMkU09 +AKiDFObSAwbMkvdicssBHpAA++LzjEOK6hrR X-Google-Smtp-Source: AGHT+IHMwXCaIU/8tIeP5QLKjr29COKfn+hP1yJ/QUFOVkFyFy/NzfgtfzL7xHGnH/t+Lh0JrKYRug== X-Received: by 2002:a05:6a00:3c8d:b0:770:579a:bb84 with SMTP id d2e1a72fcca58-770579abd2amr14936502b3a.5.1756336870274; Wed, 27 Aug 2025 16:21:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 15/46] linux-user: Remove ELF_HWCAP Date: Thu, 28 Aug 2025 09:19:52 +1000 Message-ID: <20250827232023.50398-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756336900064124100 Content-Type: text/plain; charset="utf-8" All real definitions of ELF_HWCAP are now identical, and the stub definitions are 0. Provide zero stub as a fallback definition. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 35 ++++++++++++----------------------- 1 file changed, 12 insertions(+), 23 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index ce4055b0e9..88d439f348 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -28,6 +28,7 @@ #include "qemu/lockable.h" #include "qapi/error.h" #include "qemu/error-report.h" +#include "target_elf.h" #include "target_signal.h" #include "tcg/debuginfo.h" =20 @@ -148,8 +149,6 @@ typedef abi_int target_pid_t; =20 #ifdef TARGET_I386 =20 -#define ELF_HWCAP get_elf_hwcap(thread_cpu) - #ifdef TARGET_X86_64 #define ELF_CLASS ELFCLASS64 #define ELF_ARCH EM_X86_64 @@ -449,7 +448,6 @@ static bool init_guest_commpage(void) return true; } =20 -#define ELF_HWCAP get_elf_hwcap(thread_cpu) #define ELF_HWCAP2 get_elf_hwcap2(thread_cpu) =20 #define ELF_PLATFORM get_elf_platform() @@ -539,7 +537,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 =20 -#define ELF_HWCAP get_elf_hwcap(thread_cpu) #define ELF_HWCAP2 get_elf_hwcap2(thread_cpu) =20 #if TARGET_BIG_ENDIAN @@ -565,8 +562,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, # define ELF_ARCH EM_SPARCV9 #endif =20 -#define ELF_HWCAP get_elf_hwcap(thread_cpu) - static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) { @@ -598,7 +593,6 @@ static inline void init_thread(struct target_pt_regs *r= egs, =20 #define ELF_ARCH EM_PPC =20 -#define ELF_HWCAP get_elf_hwcap(thread_cpu) #define ELF_HWCAP2 get_elf_hwcap2(thread_cpu) =20 /* @@ -725,8 +719,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 =20 -#define ELF_HWCAP get_elf_hwcap(thread_cpu) - #define ELF_PLATFORM "loongarch" =20 #endif /* TARGET_LOONGARCH64 */ @@ -834,8 +826,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, const CPUMIPSState *e #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 =20 -#define ELF_HWCAP get_elf_hwcap(thread_cpu) - #endif /* TARGET_MIPS */ =20 #ifdef TARGET_MICROBLAZE @@ -909,7 +899,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, (*regs)[32] =3D tswapreg(env->pc); (*regs)[33] =3D tswapreg(cpu_get_sr(env)); } -#define ELF_HWCAP 0 + #define ELF_PLATFORM NULL =20 #endif /* TARGET_OPENRISC */ @@ -963,8 +953,6 @@ static inline void elf_core_copy_regs(target_elf_gregse= t_t *regs, #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 =20 -#define ELF_HWCAP get_elf_hwcap(thread_cpu) - #endif =20 #ifdef TARGET_M68K @@ -1039,8 +1027,6 @@ static inline void init_thread(struct target_pt_regs = *regs, #define ELF_DATA ELFDATA2MSB #define ELF_ARCH EM_S390 =20 -#define ELF_HWCAP get_elf_hwcap(thread_cpu) - static inline void init_thread(struct target_pt_regs *regs, struct image_i= nfo *infop) { regs->psw.addr =3D infop->entry; @@ -1099,8 +1085,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *= regs, #define VDSO_HEADER "vdso-64.c.inc" #endif =20 -#define ELF_HWCAP get_elf_hwcap(thread_cpu) - static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) { @@ -1268,10 +1252,6 @@ static inline void init_thread(struct target_pt_regs= *regs, #define elf_check_abi(x) (1) #endif =20 -#ifndef ELF_HWCAP -#define ELF_HWCAP 0 -#endif - #ifndef STACK_GROWS_DOWN #define STACK_GROWS_DOWN 1 #endif @@ -1291,6 +1271,15 @@ static inline void init_thread(struct target_pt_regs= *regs, #define EXSTACK_DEFAULT false #endif =20 +/* + * Provide fallback definitions that the target may omit. + * One way or another, we'll get a link error if the setting of + * HAVE_* doesn't match the implementation. + */ +#ifndef HAVE_ELF_HWCAP +abi_ulong get_elf_hwcap(CPUState *cs) { return 0; } +#endif + #include "elf.h" =20 /* We must delay the following stanzas until after "elf.h". */ @@ -1868,7 +1857,7 @@ static abi_ulong create_elf_tables(abi_ulong p, int a= rgc, int envc, NEW_AUX_ENT(AT_EUID, (abi_ulong) geteuid()); NEW_AUX_ENT(AT_GID, (abi_ulong) getgid()); NEW_AUX_ENT(AT_EGID, (abi_ulong) getegid()); - NEW_AUX_ENT(AT_HWCAP, (abi_ulong) ELF_HWCAP); + NEW_AUX_ENT(AT_HWCAP, get_elf_hwcap(thread_cpu)); NEW_AUX_ENT(AT_CLKTCK, (abi_ulong) sysconf(_SC_CLK_TCK)); NEW_AUX_ENT(AT_RANDOM, (abi_ulong) u_rand_bytes); NEW_AUX_ENT(AT_SECURE, (abi_ulong) qemu_getauxval(AT_SECURE)); --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336926; cv=none; d=zohomail.com; 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([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.21.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:21:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336873; x=1756941673; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lA8rQOeAatjbT4Ro5o0lSzOtjaI0GEX6SAlAltEIUzI=; b=e7Vs/sPIa3bgAp9W4B/6ER7LGJmuL7aENiQabGKmWU9dQVeAWYefovbqpno8l2yU9d WKc83l7We7YbeQV9TY7jEtelZuKEojKCr7fyAiVgPhBIeEp/Pc2i/i8pUAFvgeLQZH3k vLSxp/UqXJdN56yacuMv8LFUBVOwotp8mZFeziy6M4cfZ8O0veypX/syanqAT7Ukyq4F FwafaHVwgGve1u+ijVOJGrXoCxr+Z8j9Qv3MR0jWqDm/6On1g1rErBVHLtaGCvoGBXh4 2LjvXdGc6gg4pZKfKGks8ma+O0cfv0Ehw3XRPNnUteXizJpeW1merk411Y7XRDlcYMM6 QjDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336873; x=1756941673; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lA8rQOeAatjbT4Ro5o0lSzOtjaI0GEX6SAlAltEIUzI=; b=aiHecoJOZaS8a5qcCM1EptML3ThOcdpiVGnDFGfUqkb66pzP7G2jPxArjV5Sq6T+3L gshdOv4LPJbVL5QKfvV6jkYS1TqvFIuE881ucYVl/OIoB5fBLbA6xbjqmcS7lskLKChS IpSqyKMCRBI9bT0HAWjz7EtXVjhrZLC9kJSw0PHady4RB9CEKKfWWkuEs3oBZjYZrwO4 iVG+nkq4fvCCSh7FsNPpPv/pbqQGMvC+dVSeHHMlWgpWhAk9RewX/WKJOOuXhdiaz/G/ Rq/JNpMuIb7owtzzPXNx2ax4aKQLoeMQOPS0E6Bm5lM/a6XQLb37chdLQ07lMQqxTHbX 4I6w== X-Gm-Message-State: AOJu0YwJSAdMicsBZD1+nr5CGVUBX7cFLsj2uBn3qLsoTPUj2mJW8u9v Ql9wETRLGmTkCvObFKaoOWgNei3WclvmjIia01WUhiM0x+YgZhlAuQOceVJMuRXtIurRT87fHmW Aij3c1as= X-Gm-Gg: ASbGncvT9U9gYTIkOUdyOBNQ+EYog1RrhgL0XopGLayH+nos6v2gB5bxRPXtU6XSOct wW0ILvIyBf/PHsLAtat4x7HQwSOBrbH2jfB1067LgtKMnsgZSW8aZejYYMNs+ECiD4JUYSupozS CDvMfKNRHOvMHpKK7F4rcakaTYyAi8m9mm6lPmbx903QDSLdEmMUSFO5OIIMmLkzaqFaBAuveqr BaHpv4CJlxhURi+KuI7cAFbEGCVOyhOKVnZFLu8kW2J7RiJeflAj51pTVS3Ox02ROcY72ugZyAO wXBO4z819DTUTmtTXl8MV0NlATPQWMCf9IUkzBMib3F9Kpc0WQAgTaguwV2UhHkCtUOVfgqUsar GItys6Zl0ZXptfZ3n8LJ4PjzdE4X8UJKHFUBW X-Google-Smtp-Source: AGHT+IG+328bMyUCQvSVL+CzAtJ55zyYLMMbQGTwn7sEske2Nknuhh2QF1WDU/quWF0o2ZUSTfxiCg== X-Received: by 2002:a05:6a00:23c4:b0:770:4ff5:1d2a with SMTP id d2e1a72fcca58-771fc293145mr9540581b3a.2.1756336872991; Wed, 27 Aug 2025 16:21:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 16/46] linux-user: Remove ELF_HWCAP2 Date: Thu, 28 Aug 2025 09:19:53 +1000 Message-ID: <20250827232023.50398-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756336928321124101 Content-Type: text/plain; charset="utf-8" All definitions of ELF_HWCAP2 are now identical. Provide a not-reached stub as a fallback definition of get_elf_hwcap2. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 88d439f348..7a41917b49 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -448,8 +448,6 @@ static bool init_guest_commpage(void) return true; } =20 -#define ELF_HWCAP2 get_elf_hwcap2(thread_cpu) - #define ELF_PLATFORM get_elf_platform() =20 static const char *get_elf_platform(void) @@ -537,8 +535,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 =20 -#define ELF_HWCAP2 get_elf_hwcap2(thread_cpu) - #if TARGET_BIG_ENDIAN # define VDSO_HEADER "vdso-be.c.inc" #else @@ -593,8 +589,6 @@ static inline void init_thread(struct target_pt_regs *r= egs, =20 #define ELF_ARCH EM_PPC =20 -#define ELF_HWCAP2 get_elf_hwcap2(thread_cpu) - /* * The requirements here are: * - keep the final alignment of sp (sp & 0xf) @@ -1279,6 +1273,10 @@ static inline void init_thread(struct target_pt_regs= *regs, #ifndef HAVE_ELF_HWCAP abi_ulong get_elf_hwcap(CPUState *cs) { return 0; } #endif +#ifndef HAVE_ELF_HWCAP2 +abi_ulong get_elf_hwcap2(CPUState *cs) { g_assert_not_reached(); } +#define HAVE_ELF_HWCAP2 0 +#endif =20 #include "elf.h" =20 @@ -1801,9 +1799,9 @@ static abi_ulong create_elf_tables(abi_ulong p, int a= rgc, int envc, #ifdef DLINFO_ARCH_ITEMS size +=3D DLINFO_ARCH_ITEMS * 2; #endif -#ifdef ELF_HWCAP2 - size +=3D 2; -#endif + if (HAVE_ELF_HWCAP2) { + size +=3D 2; + } info->auxv_len =3D size * n; =20 size +=3D envc + argc + 2; @@ -1863,10 +1861,9 @@ static abi_ulong create_elf_tables(abi_ulong p, int = argc, int envc, NEW_AUX_ENT(AT_SECURE, (abi_ulong) qemu_getauxval(AT_SECURE)); NEW_AUX_ENT(AT_EXECFN, info->file_string); =20 -#ifdef ELF_HWCAP2 - NEW_AUX_ENT(AT_HWCAP2, (abi_ulong) ELF_HWCAP2); -#endif - + if (HAVE_ELF_HWCAP2) { + NEW_AUX_ENT(AT_HWCAP2, get_elf_hwcap(thread_cpu)); + } if (u_base_platform) { NEW_AUX_ENT(AT_BASE_PLATFORM, u_base_platform); } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337112211505.7983395634884; Wed, 27 Aug 2025 16:25:12 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPSQ-0002KL-KC; Wed, 27 Aug 2025 19:21:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSC-00025N-GB for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:22 -0400 Received: from mail-pf1-x42c.google.com ([2607:f8b0:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPS9-0004DV-VB for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:19 -0400 Received: by mail-pf1-x42c.google.com with SMTP id d2e1a72fcca58-7720c7cc05fso310226b3a.3 for ; Wed, 27 Aug 2025 16:21:16 -0700 (PDT) Received: from stoup.. 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Create a simple get_elf_platform for x86_64. Introduce HAVE_ELF_PLATFORM. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/i386/target_elf.h | 1 + linux-user/loader.h | 3 +++ linux-user/x86_64/target_elf.h | 1 + linux-user/elfload.c | 18 ++---------------- linux-user/i386/elfload.c | 13 +++++++++++++ linux-user/x86_64/elfload.c | 5 +++++ 6 files changed, 25 insertions(+), 16 deletions(-) diff --git a/linux-user/i386/target_elf.h b/linux-user/i386/target_elf.h index 802395af3a..44dde1ac4a 100644 --- a/linux-user/i386/target_elf.h +++ b/linux-user/i386/target_elf.h @@ -9,5 +9,6 @@ #define I386_TARGET_ELF_H =20 #define HAVE_ELF_HWCAP 1 +#define HAVE_ELF_PLATFORM 1 =20 #endif diff --git a/linux-user/loader.h b/linux-user/loader.h index 729723cc06..44bb4cbfd3 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -105,5 +105,8 @@ abi_ulong get_elf_hwcap(CPUState *cs); abi_ulong get_elf_hwcap2(CPUState *cs); const char *elf_hwcap_str(uint32_t bit); const char *elf_hwcap2_str(uint32_t bit); +#if defined(TARGET_I386) +const char *get_elf_platform(CPUState *cs); +#endif =20 #endif /* LINUX_USER_LOADER_H */ diff --git a/linux-user/x86_64/target_elf.h b/linux-user/x86_64/target_elf.h index 03483bad57..498c3f7e4e 100644 --- a/linux-user/x86_64/target_elf.h +++ b/linux-user/x86_64/target_elf.h @@ -9,5 +9,6 @@ #define X86_64_TARGET_ELF_H =20 #define HAVE_ELF_HWCAP 1 +#define HAVE_ELF_PLATFORM 1 =20 #endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 7a41917b49..e6e509c0a6 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -149,12 +149,12 @@ typedef abi_int target_pid_t; =20 #ifdef TARGET_I386 =20 +#define ELF_PLATFORM get_elf_platform(thread_cpu) + #ifdef TARGET_X86_64 #define ELF_CLASS ELFCLASS64 #define ELF_ARCH EM_X86_64 =20 -#define ELF_PLATFORM "x86_64" - static inline void init_thread(struct target_pt_regs *regs, struct image_i= nfo *infop) { regs->rax =3D 0; @@ -237,22 +237,8 @@ static bool init_guest_commpage(void) #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_386 =20 -#define ELF_PLATFORM get_elf_platform() #define EXSTACK_DEFAULT true =20 -static const char *get_elf_platform(void) -{ - static char elf_platform[] =3D "i386"; - int family =3D object_property_get_int(OBJECT(thread_cpu), "family", N= ULL); - if (family > 6) { - family =3D 6; - } - if (family >=3D 3) { - elf_platform[1] =3D '0' + family; - } - return elf_platform; -} - static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) { diff --git a/linux-user/i386/elfload.c b/linux-user/i386/elfload.c index f99336e73c..1b759098ca 100644 --- a/linux-user/i386/elfload.c +++ b/linux-user/i386/elfload.c @@ -14,3 +14,16 @@ abi_ulong get_elf_hwcap(CPUState *cs) { return cpu_env(cs)->features[FEAT_1_EDX]; } + +const char *get_elf_platform(CPUState *cs) +{ + static char elf_platform[] =3D "i386"; + int family =3D object_property_get_int(OBJECT(cs), "family", NULL); + if (family > 6) { + family =3D 6; + } + if (family >=3D 3) { + elf_platform[1] =3D '0' + family; + } + return elf_platform; +} diff --git a/linux-user/x86_64/elfload.c b/linux-user/x86_64/elfload.c index f99336e73c..88541ea45e 100644 --- a/linux-user/x86_64/elfload.c +++ b/linux-user/x86_64/elfload.c @@ -14,3 +14,8 @@ abi_ulong get_elf_hwcap(CPUState *cs) { return cpu_env(cs)->features[FEAT_1_EDX]; } + +const char *get_elf_platform(CPUState *cs) +{ + return "x86_64"; +} --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337139; cv=none; d=zohomail.com; s=zohoarc; b=X8QLumK/RyJitzCKhnlVitKbC0izaxbKjQwcoQq3fF7h7gw9RmWZ/OaN8UoSO5frRVMukSErxkl+4EU2sFavAxidRN0FtcQQJHcoQtwMNabkdLQebXg+9ucI0osSeIITXkpDKB8W+5805lgjw3TBYTsvT9ISJ6gp2nHAML2q+5Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337139; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=tBti5m0dF6b3Sc0I6qGteHg5X6Zr9g2kU2k58zFoTUk=; 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Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/i386/elfload.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/linux-user/i386/elfload.c b/linux-user/i386/elfload.c index 1b759098ca..ef3a6c35d2 100644 --- a/linux-user/i386/elfload.c +++ b/linux-user/i386/elfload.c @@ -17,13 +17,9 @@ abi_ulong get_elf_hwcap(CPUState *cs) =20 const char *get_elf_platform(CPUState *cs) { - static char elf_platform[] =3D "i386"; + static const char elf_platform[4][5] =3D { "i386", "i486", "i586", "i6= 86" }; int family =3D object_property_get_int(OBJECT(cs), "family", NULL); - if (family > 6) { - family =3D 6; - } - if (family >=3D 3) { - elf_platform[1] =3D '0' + family; - } - return elf_platform; + + family =3D MAX(MIN(family, 6), 3); + return elf_platform[family - 3]; } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336913; cv=none; d=zohomail.com; s=zohoarc; b=BrXpA0J00JLgNU/IYfFi3EzgqAmyAyqmd0gxsEueXBtw9gZFeKtM9ud8z1Ukgr9e7ckFoh2zltKdKX2KFz+3gVShOL5BfefwGD30plvZnw1POfeLUcUegDuitf99ZWWWC+dgHvh7VvVZGGEOPYKDqe9yJRUuiqtkhxI6k0kuHl8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336913; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=xfuwnnEEyqUMF25GcyoStR/Yo1BlGQIDbA+75LEtDk0=; b=kqY6+oRVYd8JjSegAxlNFQgiZBZF6x+g5227BSq1Z3LVagyjU/1FBSspkBTT7KlMKjHuZC0Zub2cI1evxTsZTPC8fUYIIpMUBplDWyq6B7f3w7M/2UjeHzBHdZNBvCZBanhuO9jBmjkeBeARTgbKCMrqzAp508MzWQi8SmlzdxM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756336913918974.1593100279439; Wed, 27 Aug 2025 16:21:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPSS-0002WV-NS; Wed, 27 Aug 2025 19:21:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSN-0002Hs-SR for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:32 -0400 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSK-0004Fb-J7 for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:31 -0400 Received: by mail-pj1-x102a.google.com with SMTP id 98e67ed59e1d1-3253f2a7679so409802a91.2 for ; Wed, 27 Aug 2025 16:21:28 -0700 (PDT) Received: from stoup.. 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Create a simple version in aarch64/elfload.c, which we must do at the same time because of the ifdef dependency between TARGET_AARCH64 and TARGET_ARM. Since all versions of get_elf_platform now have the same signature, remove the ifdef from the declaration in loader.h. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/aarch64/target_elf.h | 1 + linux-user/arm/target_elf.h | 1 + linux-user/loader.h | 2 -- linux-user/aarch64/elfload.c | 5 +++++ linux-user/arm/elfload.c | 29 +++++++++++++++++++++++++ linux-user/elfload.c | 38 ++------------------------------- 6 files changed, 38 insertions(+), 38 deletions(-) diff --git a/linux-user/aarch64/target_elf.h b/linux-user/aarch64/target_el= f.h index 77108f3cb0..dee79ce0c6 100644 --- a/linux-user/aarch64/target_elf.h +++ b/linux-user/aarch64/target_elf.h @@ -10,5 +10,6 @@ =20 #define HAVE_ELF_HWCAP 1 #define HAVE_ELF_HWCAP2 1 +#define HAVE_ELF_PLATFORM 1 =20 #endif diff --git a/linux-user/arm/target_elf.h b/linux-user/arm/target_elf.h index 90470bd87b..856ca41b16 100644 --- a/linux-user/arm/target_elf.h +++ b/linux-user/arm/target_elf.h @@ -10,5 +10,6 @@ =20 #define HAVE_ELF_HWCAP 1 #define HAVE_ELF_HWCAP2 1 +#define HAVE_ELF_PLATFORM 1 =20 #endif diff --git a/linux-user/loader.h b/linux-user/loader.h index 44bb4cbfd3..440871466c 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -105,8 +105,6 @@ abi_ulong get_elf_hwcap(CPUState *cs); abi_ulong get_elf_hwcap2(CPUState *cs); const char *elf_hwcap_str(uint32_t bit); const char *elf_hwcap2_str(uint32_t bit); -#if defined(TARGET_I386) const char *get_elf_platform(CPUState *cs); -#endif =20 #endif /* LINUX_USER_LOADER_H */ diff --git a/linux-user/aarch64/elfload.c b/linux-user/aarch64/elfload.c index 92c8ea62c6..1030cb8094 100644 --- a/linux-user/aarch64/elfload.c +++ b/linux-user/aarch64/elfload.c @@ -342,3 +342,8 @@ const char *elf_hwcap2_str(uint32_t bit) =20 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; } + +const char *get_elf_platform(CPUState *cs) +{ + return TARGET_BIG_ENDIAN ? "aarch64_be" : "aarch64"; +} diff --git a/linux-user/arm/elfload.c b/linux-user/arm/elfload.c index c7561b005b..7de1f13f4b 100644 --- a/linux-user/arm/elfload.c +++ b/linux-user/arm/elfload.c @@ -170,3 +170,32 @@ const char *elf_hwcap2_str(uint32_t bit) =20 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; } + +const char *get_elf_platform(CPUState *cs) +{ + CPUARMState *env =3D cpu_env(cs); + +#if TARGET_BIG_ENDIAN +# define END "b" +#else +# define END "l" +#endif + + if (arm_feature(env, ARM_FEATURE_V8)) { + return "v8" END; + } else if (arm_feature(env, ARM_FEATURE_V7)) { + if (arm_feature(env, ARM_FEATURE_M)) { + return "v7m" END; + } else { + return "v7" END; + } + } else if (arm_feature(env, ARM_FEATURE_V6)) { + return "v6" END; + } else if (arm_feature(env, ARM_FEATURE_V5)) { + return "v5" END; + } else { + return "v4" END; + } + +#undef END +} diff --git a/linux-user/elfload.c b/linux-user/elfload.c index e6e509c0a6..0e41737cf1 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -309,6 +309,8 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, const CPUX86State *en =20 #ifdef TARGET_ARM =20 +#define ELF_PLATFORM get_elf_platform(thread_cpu) + #ifndef TARGET_AARCH64 /* 32 bit ARM definitions */ =20 @@ -434,37 +436,6 @@ static bool init_guest_commpage(void) return true; } =20 -#define ELF_PLATFORM get_elf_platform() - -static const char *get_elf_platform(void) -{ - CPUARMState *env =3D cpu_env(thread_cpu); - -#if TARGET_BIG_ENDIAN -# define END "b" -#else -# define END "l" -#endif - - if (arm_feature(env, ARM_FEATURE_V8)) { - return "v8" END; - } else if (arm_feature(env, ARM_FEATURE_V7)) { - if (arm_feature(env, ARM_FEATURE_M)) { - return "v7m" END; - } else { - return "v7" END; - } - } else if (arm_feature(env, ARM_FEATURE_V6)) { - return "v6" END; - } else if (arm_feature(env, ARM_FEATURE_V5)) { - return "v5" END; - } else { - return "v4" END; - } - -#undef END -} - #if TARGET_BIG_ENDIAN #include "elf.h" #include "vdso-be8.c.inc" @@ -487,11 +458,6 @@ static const VdsoImageInfo *vdso_image_info(uint32_t e= lf_flags) =20 #define ELF_ARCH EM_AARCH64 #define ELF_CLASS ELFCLASS64 -#if TARGET_BIG_ENDIAN -# define ELF_PLATFORM "aarch64_be" -#else -# define ELF_PLATFORM "aarch64" -#endif =20 static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336997; cv=none; d=zohomail.com; s=zohoarc; b=YSqjFi9ZBLxskWxTYRv909fJp2fXocnIrf4jZKfWlwe4YdNWZwhT3K1OP7KuHFuaKEb9l0F0Hj9EaSzOo/0j8ZMWbQ9OEMqhPwBgmc/z35lxs0AYpZqqooVoIHn7hxYCIEWAJh4Dpwt2ofguA7nCb6Q+PDrUZBKCFOixeLyvBOI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336997; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=B+wQD8KFSriNM7oAz01Pl3bRnoCQlDdja1PgR8xrKH4=; b=SAFUSU2DFvStrh7M1hE1QuJg013bfN9oX8WSyXugzTjJ+5hjGqmW9Rnv2vo6oO4vOtRZ4lRax+Hdqk/JQpvY0f8ywtAR9E0CApP9ZKEGXk9LD4JRjCvIMG+9GcZ4Y7cLaJ+ft1us2ve5+Y4NjoeBfXLngMKRcuGg+gm9jH/A1Co= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756336997784923.5370181283648; Wed, 27 Aug 2025 16:23:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPSY-0002ti-F4; Wed, 27 Aug 2025 19:21:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSU-0002gc-JH for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:38 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSQ-0004GG-Ui for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:38 -0400 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-b4bafe2e538so398247a12.3 for ; Wed, 27 Aug 2025 16:21:34 -0700 (PDT) Received: from stoup.. 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Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/loongarch64/target_elf.h | 1 + linux-user/elfload.c | 2 +- linux-user/loongarch64/elfload.c | 5 +++++ 3 files changed, 7 insertions(+), 1 deletion(-) diff --git a/linux-user/loongarch64/target_elf.h b/linux-user/loongarch64/t= arget_elf.h index 037740d36f..eb17927325 100644 --- a/linux-user/loongarch64/target_elf.h +++ b/linux-user/loongarch64/target_elf.h @@ -7,5 +7,6 @@ #define LOONGARCH_TARGET_ELF_H =20 #define HAVE_ELF_HWCAP 1 +#define HAVE_ELF_PLATFORM 1 =20 #endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 0e41737cf1..9d61feae30 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -665,7 +665,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 =20 -#define ELF_PLATFORM "loongarch" +#define ELF_PLATFORM get_elf_platform(thread_cpu) =20 #endif /* TARGET_LOONGARCH64 */ =20 diff --git a/linux-user/loongarch64/elfload.c b/linux-user/loongarch64/elfl= oad.c index ee4a85b8d6..911352840f 100644 --- a/linux-user/loongarch64/elfload.c +++ b/linux-user/loongarch64/elfload.c @@ -56,3 +56,8 @@ abi_ulong get_elf_hwcap(CPUState *cs) =20 return hwcaps; } + +const char *get_elf_platform(CPUState *cs) +{ + return "loongarch"; +} --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336997; cv=none; d=zohomail.com; s=zohoarc; b=Vr4gcf597hdxbBaqDkO7kVkB2Op6hDlJE0QzrhrQHWh747VPT0Yv62YmFy0Wzl+p6aysncXb2IgBzNqQ8NAZzFWbgLaLqyucMifRgEOsbvxXg9wO9YkbqDCf5OQ9E8jrbXbQmvw+24xwL2HltpBbs+rNIyymmyDE9mGAFahEyyg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336997; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=DYICAl1SaNHyJ2ii9x5dLF1fa3KYu1mSCnjRob2c0pw=; b=fz4nOaGiSTloHdIpwmqKCA56LgTmTKA1rH3ZMMlyxwz4NFOlBRekg/sybuaHRpCDFLxEBR5k8WbxzUmh+7tlM40SBw3kIbtV3dnTnDXs+NMzXobsAmyZgVRbmvosTcUnz7xNDdkCcHLnXKt2MukZ6mtC7cQVOYargoNm6tVTv4k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756336997726643.8805377654347; Wed, 27 Aug 2025 16:23:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPSc-0003OF-Ae; Wed, 27 Aug 2025 19:21:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSa-0003E3-9U for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:44 -0400 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPST-0004GX-BY for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:44 -0400 Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-7704f3c4708so473846b3a.1 for ; Wed, 27 Aug 2025 16:21:36 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.21.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:21:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336895; x=1756941695; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DYICAl1SaNHyJ2ii9x5dLF1fa3KYu1mSCnjRob2c0pw=; b=Ghr3a1cOZTBsPTgQw1GaM+WryRstFC//SdmYYyXFBESCge/o60LzdrRRd/9349pjD0 epIeShi6qDk62AJIBPzUQgCcQXe+/5iFFPEH/nOhOVwcEVoDhdmgz/RM5brIqDfGBz2e mAr26GJDpULcaVuwuPv7i8p+AaYkwjx5ccgG8xUanAQAtU7qZ4v67LToPZD8XQP/n9E3 EqTzZj6+zzDZgw71vGT5jqtn0VsyrMGHMjcFTpsMz6CATI5NOvrKQU3EpggzknP2Xzhf PkiyBCS1SfdxNqpUJJecal3savpUrVLFAFoqi+BL+hEn81sQe9cPFIVz/UpnOJwWvJZz f9Sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336895; x=1756941695; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DYICAl1SaNHyJ2ii9x5dLF1fa3KYu1mSCnjRob2c0pw=; b=CS+Wh+29O2MpGUR147KsDzjP2VuRU0dS+sqElQbqKGgqFZ30xa/EVeczkY1Gle+nAn P2oQfG6crRco1gBtTi35Cdw5LGuy7dihDDHsHBIgO6exyeDn/smMpBbXsFO3VZUnAU8i 6dqkyJcTjYOilVecZgZmKU1RIvQ7O19OP9JcVSWTarUPClTCC6I/2iyjy2GEwkhrBQf+ YY87RApjWhImscyOiEwAv7u5oy62REsgjjLbhwfLd55OfLRfyAMmqC1soqBri1M3hWRy mkMGVqRg3/lmVRsDxDlb/R0wA5CMC5PfWQiv6gzDc4EBxbSAMzUMbjzo56sCEHPgURjU KUxw== X-Gm-Message-State: AOJu0Yzy5F5aQSX82TL3XpHiw6JWprybaWGRf+1+g1to1gMaa7VjH8Yj MEifeS/YfvU7xhRlSe8VNf181n9HNnjCbdSlhLa40aiXBExjwsFsJEU4Q+Zeg7oF+2769AgZaKf lbAlXCbM= X-Gm-Gg: ASbGnctLHuaW7i3fTYCxC8IIBTPnNfox6WVsz7uO27zlC1AnZzIrEtT1LONOO5We59W 0gBRErRKsARjsIn4Ef17JkdEBiK4J5XQN2fNWwF5q52C/irSuEl/siKezKNCv2/afZu1Q1HlTyl P9zCKz9fHItHqvMQmKN8yrVuLQWtcoTmvvEwJuSI4Vmn6vDMmsnaPechbT6/2G6qz90ZXt+5q4M ukCLdEmqZGrC0a5Y5r3u7C21oxT8G+Xlp8z04PenamdX9Q/F6610M5tZx2Rjlmcx5mgJsBDj1vX lJ9B0awaRoHgXrmHyxBc/orHnfhL1d1P8VUQ4a2H+sRq7BsxCR616Oy2LJEhlzRF2g7c+xSw8Ka 9BuQ0Fi4qOKwLEI5PShkk06ITJw== X-Google-Smtp-Source: AGHT+IF9ftOub349GivDt4lz+VE49M96Fyc/g71fkodV0xW/HlV2BwTlvzAp2rjRl7kVwJ3SYVK+Bg== X-Received: by 2002:a05:6a00:3988:b0:76b:f8ee:4eaa with SMTP id d2e1a72fcca58-7702f9f150amr26372007b3a.9.1756336895422; Wed, 27 Aug 2025 16:21:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 21/46] linux-user/hppa: Create get_elf_platform Date: Thu, 28 Aug 2025 09:19:58 +1000 Message-ID: <20250827232023.50398-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756336999117124100 Content-Type: text/plain; charset="utf-8" Move the string literal to a new function. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/hppa/target_elf.h | 2 ++ linux-user/elfload.c | 2 +- linux-user/hppa/elfload.c | 5 +++++ 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/linux-user/hppa/target_elf.h b/linux-user/hppa/target_elf.h index 5826ca2cd2..85be00584d 100644 --- a/linux-user/hppa/target_elf.h +++ b/linux-user/hppa/target_elf.h @@ -8,4 +8,6 @@ #ifndef HPPA_TARGET_ELF_H #define HPPA_TARGET_ELF_H =20 +#define HAVE_ELF_PLATFORM 1 + #endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 9d61feae30..83cb6731ec 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1046,7 +1046,7 @@ static inline void init_thread(struct target_pt_regs = *regs, =20 #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_PARISC -#define ELF_PLATFORM "PARISC" +#define ELF_PLATFORM get_elf_platform(thread_cpu) #define STACK_GROWS_DOWN 0 #define STACK_ALIGNMENT 64 =20 diff --git a/linux-user/hppa/elfload.c b/linux-user/hppa/elfload.c index 2274fcbde4..9dd3fe092a 100644 --- a/linux-user/hppa/elfload.c +++ b/linux-user/hppa/elfload.c @@ -9,3 +9,8 @@ const char *get_elf_cpu_model(uint32_t eflags) { return "hppa"; } + +const char *get_elf_platform(CPUState *cs) +{ + return "PARISC"; +} --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337007; cv=none; d=zohomail.com; s=zohoarc; b=SnRWEj0AJUbfVz+bWuzBY8C7OL6usehY6BO/IdFV3AzWN7GrdBj3o2+v7lVHcnYg83Qjvn65dmNgVFFMg2rRN/oGsMjEaj7i3BPNkBB4+zhFq1kZQPA81p5Shzgme1RdPOu1PdxiEcDR58hizFpCy+SzIbrt3gxgd6ZfmnJsU4w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337007; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=4cj6OR7jxnjd+ksnwoLgD5O63MHYjLxFz3WB/EhhsQU=; b=nHpy5tFxPzNI35aUTiASwd8HEDdkcNJk+xQaU6NkTDmZ7Wt8ScAUqXQ5q+wHYP/9TteO5efGPowI3gp8AddCm6AheJ6iprW4ddaIIEL3AQPRwydgvzPGA2s4xQrFF+dvV3Xzvjgbl4ApkbslMkJIJIIJJi0c/Yw4+qujYKFykHY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337007098227.4186832460333; Wed, 27 Aug 2025 16:23:27 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPSg-0003cu-TG; Wed, 27 Aug 2025 19:21:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSb-0003Ma-Ny for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:46 -0400 Received: from mail-pf1-x42d.google.com ([2607:f8b0:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSV-0004Gk-3P for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:45 -0400 Received: by mail-pf1-x42d.google.com with SMTP id d2e1a72fcca58-771e4378263so349893b3a.0 for ; Wed, 27 Aug 2025 16:21:38 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.21.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:21:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336897; x=1756941697; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4cj6OR7jxnjd+ksnwoLgD5O63MHYjLxFz3WB/EhhsQU=; b=H5nhsHWBSh4QeBVqRzNgoz60cQZ7QAEn9ppRA46PDbaH8Hcme0kkQgrTQET7MlRuXW 27A1OnItUdJxMXQ8RNfVtAPCQTvlzWOtrOJfrGvUqm6ksw0AZ8Gb/RSN/kOjQyL27iCy mDtRCn2T1FCnXVVgpB8JE/8ywtqTsLRNqv6vkWBL1j/S1UX6d/TseohUuv0LfZTYAreA KFB7Ki7YdZ8XcCIQwOOBzrrG7xCIhrvkdj9l3pj5h/shDIPRd7dSpPa/X39qvTXBZLx9 4VZ7hxjKvbeAlxAQLxp/l7g8lnyE2mEIe8bJqf8lIIo2BYc9yUet8rZa0Y9a26Mdj4At phGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336897; x=1756941697; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4cj6OR7jxnjd+ksnwoLgD5O63MHYjLxFz3WB/EhhsQU=; b=hhbxzqqzNI84JvFku61HxD+mVVUZ81oJEihzJTrqMcHtkMpKMs6SZIKX4t/UjgBF4Q Oehn0jMuTUgfIymy8Bf5E9Gu9PMIkk0zhR9K0goHSKdYE40eDwnn6ahyQLxUy8hP0tXa d7A7+/CFGtKv5IxLsFuhdMHrct2aFd9j0Gicldk6Qwt7QsM2URzN4PBKTTDAOAfn8620 4p3rvBHCFbSB1XbIYiNKCvjN6c+GS6FrjF5NHIKJG6V3BfttI6zPVpMjor+wpZSLUr6A Z8YX+hURBfJ+63PKkLRF3d/Fmuk2cDy1oyB6bdNwL1BcD33p2H0fOmcm8qB1A75WcHUA r2/Q== X-Gm-Message-State: AOJu0YyXuHmQplcRinBLkzl1o24sTmxOGMlCTlgn1nUL6n0+hiWhWHZp pN6I+z5dh+pw968IQecmeueOxHHg87gI7GSPcxXNKBJeLFzpklyZmETFwlcuKJiXKuSl5jpZL0I 7WAypw98= X-Gm-Gg: ASbGncsREkolKl+wbtE1dXOt+7mbZ6FwSqqepg4+T9RIi8YTRT68Ls8kLbkJ4VhOanN aH4d4O9TYiTbCEmeMlMF+u5/bX1DoeBx4vBs7hmUa8gChAdGFr4hZetDXspr6ruUYY8E6XgUSKr 5wI3zNqPrkVUxwCFiHZBKT8MCrJAGPwk0t0JrcyV6f+Pbsbxy3S31YXfO3JmDUjeo5XPXfKbWvD q04yYjyH79g/jO8dObNjWb9OxVH/442WxcPA9SUhh5ugylQYZRIsZbtpBQ1Elwa/07GmWzhoFRV 06jQ4DX/q31ung2GZKUjJeIUbXddRe8w1Yeoj1RKIeikK9LjosFQDg/Mq5eYUHWW+eqZTd6sTVJ URQrwRg1BotOyLaX/0A0+nJloUXOWnlrol267 X-Google-Smtp-Source: AGHT+IFqWb+a3TrmDpxl+6Hp2g/GSZYg9yrlB5gVn0+aI/2IwRyNMyP3X77XHKpRq0/abZN1PtZpxg== X-Received: by 2002:a05:6a00:13a8:b0:770:59c2:e9e9 with SMTP id d2e1a72fcca58-77059c2ebe0mr14736125b3a.11.1756336897374; Wed, 27 Aug 2025 16:21:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 22/46] linux-user: Remove ELF_PLATFORM Date: Thu, 28 Aug 2025 09:19:59 +1000 Message-ID: <20250827232023.50398-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337008334116600 Content-Type: text/plain; charset="utf-8" All real definitions of ELF_PLATFORM are now identical, and the stub definitions are NULL. Use HAVE_ELF_PLATFORM and provide a stub as a fallback definition of get_elf_platform. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 83cb6731ec..d2d73b06fc 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -149,8 +149,6 @@ typedef abi_int target_pid_t; =20 #ifdef TARGET_I386 =20 -#define ELF_PLATFORM get_elf_platform(thread_cpu) - #ifdef TARGET_X86_64 #define ELF_CLASS ELFCLASS64 #define ELF_ARCH EM_X86_64 @@ -309,8 +307,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, const CPUX86State *en =20 #ifdef TARGET_ARM =20 -#define ELF_PLATFORM get_elf_platform(thread_cpu) - #ifndef TARGET_AARCH64 /* 32 bit ARM definitions */ =20 @@ -665,8 +661,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 =20 -#define ELF_PLATFORM get_elf_platform(thread_cpu) - #endif /* TARGET_LOONGARCH64 */ =20 #ifdef TARGET_MIPS @@ -846,8 +840,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, (*regs)[33] =3D tswapreg(cpu_get_sr(env)); } =20 -#define ELF_PLATFORM NULL - #endif /* TARGET_OPENRISC */ =20 #ifdef TARGET_SH4 @@ -1046,7 +1038,6 @@ static inline void init_thread(struct target_pt_regs = *regs, =20 #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_PARISC -#define ELF_PLATFORM get_elf_platform(thread_cpu) #define STACK_GROWS_DOWN 0 #define STACK_ALIGNMENT 64 =20 @@ -1182,10 +1173,6 @@ static inline void init_thread(struct target_pt_regs= *regs, #define ELF_BASE_PLATFORM (NULL) #endif =20 -#ifndef ELF_PLATFORM -#define ELF_PLATFORM (NULL) -#endif - #ifndef ELF_MACHINE #define ELF_MACHINE ELF_ARCH #endif @@ -1229,6 +1216,9 @@ abi_ulong get_elf_hwcap(CPUState *cs) { return 0; } abi_ulong get_elf_hwcap2(CPUState *cs) { g_assert_not_reached(); } #define HAVE_ELF_HWCAP2 0 #endif +#ifndef HAVE_ELF_PLATFORM +const char *get_elf_platform(CPUState *cs) { return NULL; } +#endif =20 #include "elf.h" =20 @@ -1699,7 +1689,7 @@ static abi_ulong create_elf_tables(abi_ulong p, int a= rgc, int envc, } =20 u_platform =3D 0; - k_platform =3D ELF_PLATFORM; + k_platform =3D get_elf_platform(thread_cpu); if (k_platform) { size_t len =3D strlen(k_platform) + 1; if (STACK_GROWS_DOWN) { --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336945; cv=none; d=zohomail.com; s=zohoarc; b=YAYUmYML05io6QRSkm9zO9Kwyf+YTMDeZfJOkfvm6EjTPw0/pp+GFLqKALwnpSpJrlgOtuXtAN6x+8JvmN59JdhjsWoLZOKqL2HBhb3b6odj4XgA+tbm8kqvWewynvtCYI4YU6Dja5P6uDaZMr0qZXyQgl1bup0+Yv0JEI6h6qY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336945; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=WnH7EpbfqSiddTyYEjwsuEsAObJWFo46bJT3sgyKWcQ=; b=PdPoYZDuuU6Qj7NabF5nMpK7s/Z0vQi/HTg1RE4f3H2IHOVr3lIZcNgobtFUPAbhTbvm3OzweBcex8bdv+WUcbNSGXCVZZoqWsXQeAg8TAZdOAunbwS8dcXoGZaOuf8C72gGdPxDY7QaseaiZFQghP1ziUpIGZhdYZvCn8ShTrQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756336945145607.714467100504; Wed, 27 Aug 2025 16:22:25 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPSw-0004PV-QT; Wed, 27 Aug 2025 19:22:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSk-0003zw-Do for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:54 -0400 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSb-0004H6-3l for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:54 -0400 Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-771ff6f117aso385670b3a.2 for ; Wed, 27 Aug 2025 16:21:42 -0700 (PDT) Received: from stoup.. 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Since this was the only instance of ELF_BASE_PLATFORM, go ahead and provide the stub definition for other platforms. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/loader.h | 1 + linux-user/mips/target_elf.h | 1 + linux-user/mips64/target_elf.h | 1 + linux-user/elfload.c | 40 ++++------------------------------ linux-user/mips/elfload.c | 30 +++++++++++++++++++++++++ 5 files changed, 37 insertions(+), 36 deletions(-) diff --git a/linux-user/loader.h b/linux-user/loader.h index 440871466c..42cba90dea 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -106,5 +106,6 @@ abi_ulong get_elf_hwcap2(CPUState *cs); const char *elf_hwcap_str(uint32_t bit); const char *elf_hwcap2_str(uint32_t bit); const char *get_elf_platform(CPUState *cs); +const char *get_elf_base_platform(CPUState *cs); =20 #endif /* LINUX_USER_LOADER_H */ diff --git a/linux-user/mips/target_elf.h b/linux-user/mips/target_elf.h index 877f8347d7..08e699c085 100644 --- a/linux-user/mips/target_elf.h +++ b/linux-user/mips/target_elf.h @@ -9,5 +9,6 @@ #define MIPS_TARGET_ELF_H =20 #define HAVE_ELF_HWCAP 1 +#define HAVE_ELF_BASE_PLATFORM 1 =20 #endif diff --git a/linux-user/mips64/target_elf.h b/linux-user/mips64/target_elf.h index c0347e5cb6..24bb7fcd3f 100644 --- a/linux-user/mips64/target_elf.h +++ b/linux-user/mips64/target_elf.h @@ -9,5 +9,6 @@ #define MIPS64_TARGET_ELF_H =20 #define HAVE_ELF_HWCAP 1 +#define HAVE_ELF_BASE_PLATFORM 1 =20 #endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index d2d73b06fc..4facaa7e27 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -679,37 +679,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, #define elf_check_abi(x) (!((x) & EF_MIPS_ABI2)) #endif =20 -#define ELF_BASE_PLATFORM get_elf_base_platform() - -#define MATCH_PLATFORM_INSN(_flags, _base_platform) \ - do { if ((cpu->env.insn_flags & (_flags)) =3D=3D _flags) \ - { return _base_platform; } } while (0) - -static const char *get_elf_base_platform(void) -{ - MIPSCPU *cpu =3D MIPS_CPU(thread_cpu); - - /* 64 bit ISAs goes first */ - MATCH_PLATFORM_INSN(CPU_MIPS64R6, "mips64r6"); - MATCH_PLATFORM_INSN(CPU_MIPS64R5, "mips64r5"); - MATCH_PLATFORM_INSN(CPU_MIPS64R2, "mips64r2"); - MATCH_PLATFORM_INSN(CPU_MIPS64R1, "mips64"); - MATCH_PLATFORM_INSN(CPU_MIPS5, "mips5"); - MATCH_PLATFORM_INSN(CPU_MIPS4, "mips4"); - MATCH_PLATFORM_INSN(CPU_MIPS3, "mips3"); - - /* 32 bit ISAs */ - MATCH_PLATFORM_INSN(CPU_MIPS32R6, "mips32r6"); - MATCH_PLATFORM_INSN(CPU_MIPS32R5, "mips32r5"); - MATCH_PLATFORM_INSN(CPU_MIPS32R2, "mips32r2"); - MATCH_PLATFORM_INSN(CPU_MIPS32R1, "mips32"); - MATCH_PLATFORM_INSN(CPU_MIPS2, "mips2"); - - /* Fallback */ - return "mips"; -} -#undef MATCH_PLATFORM_INSN - static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) { @@ -1169,10 +1138,6 @@ static inline void init_thread(struct target_pt_regs= *regs, =20 #endif /* TARGET_HEXAGON */ =20 -#ifndef ELF_BASE_PLATFORM -#define ELF_BASE_PLATFORM (NULL) -#endif - #ifndef ELF_MACHINE #define ELF_MACHINE ELF_ARCH #endif @@ -1219,6 +1184,9 @@ abi_ulong get_elf_hwcap2(CPUState *cs) { g_assert_not= _reached(); } #ifndef HAVE_ELF_PLATFORM const char *get_elf_platform(CPUState *cs) { return NULL; } #endif +#ifndef HAVE_ELF_BASE_PLATFORM +const char *get_elf_base_platform(CPUState *cs) { return NULL; } +#endif =20 #include "elf.h" =20 @@ -1673,7 +1641,7 @@ static abi_ulong create_elf_tables(abi_ulong p, int a= rgc, int envc, } =20 u_base_platform =3D 0; - k_base_platform =3D ELF_BASE_PLATFORM; + k_base_platform =3D get_elf_base_platform(thread_cpu); if (k_base_platform) { size_t len =3D strlen(k_base_platform) + 1; if (STACK_GROWS_DOWN) { diff --git a/linux-user/mips/elfload.c b/linux-user/mips/elfload.c index 739f71c21b..c353ccc1ad 100644 --- a/linux-user/mips/elfload.c +++ b/linux-user/mips/elfload.c @@ -92,3 +92,33 @@ abi_ulong get_elf_hwcap(CPUState *cs) #undef GET_FEATURE_REG_EQU #undef GET_FEATURE_REG_SET #undef GET_FEATURE_INSN + +#define MATCH_PLATFORM_INSN(_flags, _base_platform) \ + do { if ((cpu->env.insn_flags & (_flags)) =3D=3D _flags) \ + { return _base_platform; } } while (0) + +const char *get_elf_base_platform(CPUState *cs) +{ + MIPSCPU *cpu =3D MIPS_CPU(cs); + + /* 64 bit ISAs goes first */ + MATCH_PLATFORM_INSN(CPU_MIPS64R6, "mips64r6"); + MATCH_PLATFORM_INSN(CPU_MIPS64R5, "mips64r5"); + MATCH_PLATFORM_INSN(CPU_MIPS64R2, "mips64r2"); + MATCH_PLATFORM_INSN(CPU_MIPS64R1, "mips64"); + MATCH_PLATFORM_INSN(CPU_MIPS5, "mips5"); + MATCH_PLATFORM_INSN(CPU_MIPS4, "mips4"); + MATCH_PLATFORM_INSN(CPU_MIPS3, "mips3"); + + /* 32 bit ISAs */ + MATCH_PLATFORM_INSN(CPU_MIPS32R6, "mips32r6"); + MATCH_PLATFORM_INSN(CPU_MIPS32R5, "mips32r5"); + MATCH_PLATFORM_INSN(CPU_MIPS32R2, "mips32r2"); + MATCH_PLATFORM_INSN(CPU_MIPS32R1, "mips32"); + MATCH_PLATFORM_INSN(CPU_MIPS2, "mips2"); + + /* Fallback */ + return "mips"; +} + +#undef MATCH_PLATFORM_INSN --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.21.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:21:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336901; x=1756941701; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HyBW6oXpw96252KnNIM84sqTDSbPQVUWR0A1KOUJqIw=; b=PvUSDkD7lpXbMMsd1qokRLhdhhplaDdvQ+rxc9RdsETMoWMrg2+tZzwxEuTRycSwCJ 3NEVJYF5Ce6ZVRHLHpw7Xfgu7VG52XT5LXFBxnX/DpnBJP9wVBRA+NJtPqVUoEIFWL8W iFF90jLGoZF8F8veG+3zfR34pRRr6SWoOh0IZsXVrEWA+ctP6HyjkUCaekt5Djfu5L4/ QYAMsb7VxvIAQ6qgy53C6sWaelfoEOtlfUgMtsQ0I/lCOFdPlYdlltskvHhxGn7agXxb 0QB598+GBtKUVfmQ23IKGsc2KJ2dnb/MZJT9brwA8V5lBQHE59jGlOpa1huqovjjujHz anLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336901; x=1756941701; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HyBW6oXpw96252KnNIM84sqTDSbPQVUWR0A1KOUJqIw=; b=saMkOaZqd6m1eIzbOgCT8xaul0uJdXwd/Q4eLTE7bh7VBgaFooSmu/P38xN1HiRmUB N1LT7t4p7YBebqSm//vnq3Ee3UiNJRfSiuORUOhX7O4rZEZthgCxnwPetWszZoI1oqvN jLKsc+L3BSITHyBq9KkiYWi41aB4ojyKpSCEsE9gJhPapjB9EtQE6jjxzCsomEU2CB8m A7zpsjpyPiEBzzygyAeNUFbym2wxXrL0XfBiPb4UwAs4Rw4na4Vg9/jQO/kMnNilQA+R a8eb6+EOHraDRrpjWKrtq2MVpaLqBORWNzUzMBRFkc4g6vf90sbznd4pd0muRkSsdAlt T3sA== X-Gm-Message-State: AOJu0YzYwM2JPVbcGchshNCrPpT9UZn9J5U+SWRpl8+kjzxCZxZX2oxB wszaCwzqVuiqmRrFRKU1g/T5/wJ4tvX95duDoN2pJk7bDaZOWoiengEv+8JZrdrl07Ofdwb8js6 m4vaE72g= X-Gm-Gg: ASbGncuEsZYuTrjZsffbZrOVjMkuXkV7xNizzvHs2gWWdCJrkKcv7aj2FbSG5gdUHr6 1mXbBg3kjQgbHLBPWQMHarmMs1GlpGzQqaWS1GqK+goy/3IU34w54eDfLQCqBg/AG+AlmpDQfK6 TNNgg8PaJGmk5bAKlhzXhK02vcBlr6I7x34YO8tBNXdww3Bk38kNiKOqJZIK6FGL4/EW1XJWCLu D3J/aEOmMPJHBLd7B99r6Vdt5j6qmIE0/r/F/3VtblSFcXVdAABBFhQMxX8kIk/JetAg0f4JzFU BuPoV7Cl/AIPS2vFKdmQhPB4ldt5sX1Nn+bmGoSBgdgLiQUAPp+1YzHKxl4pSQMHM4RtFYvxGsR E4RJpTELP36EaW21X/2miHLlLzg== X-Google-Smtp-Source: AGHT+IHoAOxHfqDWnJhBdNUX30IoYubCAQKCve3Zak8Hnsw+95Ko8TP2YPGKV1eusF9V9hys8Yzkzw== X-Received: by 2002:a05:6a00:9a4:b0:772:a60:6c04 with SMTP id d2e1a72fcca58-7720a606d90mr4844730b3a.2.1756336901438; Wed, 27 Aug 2025 16:21:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 24/46] linux-user: Move target_cpu_copy_regs decl to qemu.h Date: Thu, 28 Aug 2025 09:20:01 +1000 Message-ID: <20250827232023.50398-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756336970824124100 Content-Type: text/plain; charset="utf-8" The function is not used by bsd-user, so placement within include/user/cpu_loop.h is not ideal. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- include/user/cpu_loop.h | 4 ---- linux-user/qemu.h | 3 +++ 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/include/user/cpu_loop.h b/include/user/cpu_loop.h index ad8a1d711f..346e37ede8 100644 --- a/include/user/cpu_loop.h +++ b/include/user/cpu_loop.h @@ -81,8 +81,4 @@ void target_exception_dump(CPUArchState *env, const char = *fmt, int code); #define EXCP_DUMP(env, fmt, code) \ target_exception_dump(env, fmt, code) =20 -typedef struct target_pt_regs target_pt_regs; - -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs); - #endif diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 4d6fad28c6..0c3cfe93a1 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -359,4 +359,7 @@ void *lock_user_string(abi_ulong guest_addr); /* Clone cpu state */ CPUArchState *cpu_copy(CPUArchState *env); =20 +typedef struct target_pt_regs target_pt_regs; +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs); + #endif /* QEMU_H */ --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337305; cv=none; d=zohomail.com; s=zohoarc; b=YxzHJ8lUaY7lnKam+VCuJsWGz0t3D5pM7V1l/ih2klPbYey3jld26w1FZ1B7tDimXFIuMCS4QcDa5N8dSRueMCxKf0SndW7B1o5/VsGspPF1PQy17+LV94PFCYHpGmNSvH2wJy97mtklrXWg6RvQSZvG/yJYc1o4OcDCJq4wVc4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337305; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=DswSe38yYoTArY++0If/RvNUZ/t2C2uJUE3zFUBMwiU=; b=nNwGewOIrI39DK9+mWKM0oH9LTi4sp1R7a0Ol2n7OuK3WcAof06nWrXYSiK84mXt4WInkKtbyRLXo6mnfUg+EYJCaUFZOWumblpHS/JL4olgcWD6pV6sJsIrwrviXm36r/llJpSxuk+yDEZRbwuV2Z0zuXJ5m3SB6u7bYiyVzbs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17563373056611001.3006966081626; Wed, 27 Aug 2025 16:28:25 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPT6-0004bg-DL; Wed, 27 Aug 2025 19:22:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSo-0004CW-DK for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:00 -0400 Received: from mail-pf1-x42c.google.com ([2607:f8b0:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSf-0004HV-II for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:58 -0400 Received: by mail-pf1-x42c.google.com with SMTP id d2e1a72fcca58-7718408baf7so402085b3a.3 for ; Wed, 27 Aug 2025 16:21:48 -0700 (PDT) Received: from stoup.. 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Keep target_pt_regs isolated to this function. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/loader.h | 5 ++--- linux-user/elfload.c | 7 +++++-- linux-user/linuxload.c | 6 ++---- linux-user/main.c | 10 +++------- 4 files changed, 12 insertions(+), 16 deletions(-) diff --git a/linux-user/loader.h b/linux-user/loader.h index 42cba90dea..e0291cc3b0 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -82,12 +82,11 @@ struct linux_binprm { int (*core_dump)(int, const CPUArchState *); /* coredump routine */ }; =20 -void do_init_thread(struct target_pt_regs *regs, struct image_info *infop); +void do_init_main_thread(CPUState *cs, struct image_info *infop); abi_ulong loader_build_argptr(int envc, int argc, abi_ulong sp, abi_ulong stringp, int push_ptr); int loader_exec(int fdexec, const char *filename, char **argv, char **envp, - struct target_pt_regs *regs, struct image_info *infop, - struct linux_binprm *); + struct image_info *infop, struct linux_binprm *); =20 uint32_t get_elf_eflags(int fd); int load_elf_binary(struct linux_binprm *bprm, struct image_info *info); diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 4facaa7e27..6fce74f45a 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -3619,7 +3619,10 @@ static int elf_core_dump(int signr, const CPUArchSta= te *env) } #endif /* USE_ELF_CORE_DUMP */ =20 -void do_init_thread(struct target_pt_regs *regs, struct image_info *infop) +void do_init_main_thread(CPUState *cs, struct image_info *infop) { - init_thread(regs, infop); + target_pt_regs regs =3D { }; + + init_thread(®s, infop); + target_cpu_copy_regs(cpu_env(cs), ®s); } diff --git a/linux-user/linuxload.c b/linux-user/linuxload.c index 37f132be4a..85d700953e 100644 --- a/linux-user/linuxload.c +++ b/linux-user/linuxload.c @@ -139,8 +139,7 @@ abi_ulong loader_build_argptr(int envc, int argc, abi_u= long sp, } =20 int loader_exec(int fdexec, const char *filename, char **argv, char **envp, - struct target_pt_regs *regs, struct image_info *infop, - struct linux_binprm *bprm) + struct image_info *infop, struct linux_binprm *bprm) { int retval; =20 @@ -175,8 +174,7 @@ int loader_exec(int fdexec, const char *filename, char = **argv, char **envp, return retval; } =20 - /* Success. Initialize important registers. */ - do_init_thread(regs, infop); + /* Success. */ return 0; } =20 diff --git a/linux-user/main.c b/linux-user/main.c index ad1a29d198..e21842bde9 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -696,7 +696,6 @@ static int parse_args(int argc, char **argv) =20 int main(int argc, char **argv, char **envp) { - struct target_pt_regs regs1, *regs =3D ®s1; struct image_info info1, *info =3D &info1; struct linux_binprm bprm; TaskState *ts; @@ -762,9 +761,6 @@ int main(int argc, char **argv, char **envp) trace_init_file(); qemu_plugin_load_list(&plugins, &error_fatal); =20 - /* Zero out regs */ - memset(regs, 0, sizeof(struct target_pt_regs)); - /* Zero out image_info */ memset(info, 0, sizeof(struct image_info)); =20 @@ -988,8 +984,8 @@ int main(int argc, char **argv, char **envp) =20 fd_trans_init(); =20 - ret =3D loader_exec(execfd, exec_path, target_argv, target_environ, re= gs, - info, &bprm); + ret =3D loader_exec(execfd, exec_path, target_argv, target_environ, + info, &bprm); if (ret !=3D 0) { printf("Error while loading %s: %s\n", exec_path, strerror(-ret)); _exit(EXIT_FAILURE); @@ -1041,7 +1037,7 @@ int main(int argc, char **argv, char **envp) the real value of GUEST_BASE into account. */ tcg_prologue_init(); =20 - target_cpu_copy_regs(env, regs); + do_init_main_thread(cpu, info); =20 if (gdbstub) { gdbserver_start(gdbstub, &error_fatal); --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337111; cv=none; d=zohomail.com; s=zohoarc; b=LOgulti0q1K86r4JowCReT9GPevOteU50UcnXhMoIadLp5qfSHny6gwa5IZ6tGhCYRvqlITm3rmxGlL05i3Tq6y0iqdBr/VHulBReQc/PRPuxqLp1mZTX+vI1h3NJNqapd8r6lq4o7Ts++hjijTOwyT91mEyKT4TTynEmmGOQEM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337111; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=zolOYltkv8RezxxcgBErduiyzlKHX3ba4myoc0G9Zok=; b=JmuMZkAdsPEFqrzJ86ByiWQL2CeZsIecJg/hjNQoPetag3FkQI1zMVuD89k20XVxZ4lpde18zUuT66ZqEq6E9Kz9RvxNdbkyqtdFHFPzUSoNzaSthiyfX3IQmhcuEX0E/yuqEDxjlmLnsk/hpACPzeryZtejHS9JafizVlygjM8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337111864773.7512913956746; Wed, 27 Aug 2025 16:25:11 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPTH-0005lp-S2; Wed, 27 Aug 2025 19:22:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSp-0004Ff-Eu for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:00 -0400 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSg-0004Hp-Mx for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:59 -0400 Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-7720f231151so531773b3a.1 for ; Wed, 27 Aug 2025 16:21:48 -0700 (PDT) Received: from stoup.. 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There's no point going through a target_pt_regs intermediate. Temporarily introduce HAVE_INIT_MAIN_THREAD during conversion. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/qemu.h | 1 + linux-user/elfload.c | 29 +++++------------------ linux-user/i386/cpu_loop.c | 48 +++++++++++++++++--------------------- 3 files changed, 29 insertions(+), 49 deletions(-) diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 0c3cfe93a1..8a9500d4f4 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -361,5 +361,6 @@ CPUArchState *cpu_copy(CPUArchState *env); =20 typedef struct target_pt_regs target_pt_regs; void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs); +void init_main_thread(CPUState *cs, struct image_info *info); =20 #endif /* QEMU_H */ diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 6fce74f45a..89f3972253 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -149,17 +149,12 @@ typedef abi_int target_pid_t; =20 #ifdef TARGET_I386 =20 +#define HAVE_INIT_MAIN_THREAD + #ifdef TARGET_X86_64 #define ELF_CLASS ELFCLASS64 #define ELF_ARCH EM_X86_64 =20 -static inline void init_thread(struct target_pt_regs *regs, struct image_i= nfo *infop) -{ - regs->rax =3D 0; - regs->rsp =3D infop->start_stack; - regs->rip =3D infop->entry; -} - #define ELF_NREG 27 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; =20 @@ -237,22 +232,6 @@ static bool init_guest_commpage(void) =20 #define EXSTACK_DEFAULT true =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - regs->esp =3D infop->start_stack; - regs->eip =3D infop->entry; - - /* SVR4/i386 ABI (pages 3-31, 3-32) says that when the program - starts %edx contains a pointer to a function which might be - registered using `atexit'. This provides a mean for the - dynamic linker to call DT_FINI functions for shared libraries - that have been loaded before the code runs. - - A value of 0 tells we have no such handler. */ - regs->edx =3D 0; -} - #define ELF_NREG 17 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; =20 @@ -3621,8 +3600,12 @@ static int elf_core_dump(int signr, const CPUArchSta= te *env) =20 void do_init_main_thread(CPUState *cs, struct image_info *infop) { +#ifdef HAVE_INIT_MAIN_THREAD + init_main_thread(cs, infop); +#else target_pt_regs regs =3D { }; =20 init_thread(®s, infop); target_cpu_copy_regs(cpu_env(cs), ®s); +#endif } diff --git a/linux-user/i386/cpu_loop.c b/linux-user/i386/cpu_loop.c index d96d5553fa..7b2d8b03d8 100644 --- a/linux-user/i386/cpu_loop.c +++ b/linux-user/i386/cpu_loop.c @@ -331,11 +331,10 @@ static void target_cpu_free(void *obj) g_free(obj); } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cpu, struct image_info *info) { - CPUState *cpu =3D env_cpu(env); + CPUArchState *env =3D cpu_env(cpu); bool is64 =3D (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) !=3D= 0; - int i; =20 OBJECT(cpu)->free =3D target_cpu_free; env->cr[0] =3D CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; @@ -361,28 +360,25 @@ void target_cpu_copy_regs(CPUArchState *env, target_p= t_regs *regs) /* flags setup : we activate the IRQs by default as in user mode */ env->eflags |=3D IF_MASK; =20 - /* linux register setup */ -#ifndef TARGET_ABI32 - env->regs[R_EAX] =3D regs->rax; - env->regs[R_EBX] =3D regs->rbx; - env->regs[R_ECX] =3D regs->rcx; - env->regs[R_EDX] =3D regs->rdx; - env->regs[R_ESI] =3D regs->rsi; - env->regs[R_EDI] =3D regs->rdi; - env->regs[R_EBP] =3D regs->rbp; - env->regs[R_ESP] =3D regs->rsp; - env->eip =3D regs->rip; -#else - env->regs[R_EAX] =3D regs->eax; - env->regs[R_EBX] =3D regs->ebx; - env->regs[R_ECX] =3D regs->ecx; - env->regs[R_EDX] =3D regs->edx; - env->regs[R_ESI] =3D regs->esi; - env->regs[R_EDI] =3D regs->edi; - env->regs[R_EBP] =3D regs->ebp; - env->regs[R_ESP] =3D regs->esp; - env->eip =3D regs->eip; -#endif + /* + * Linux register setup. + * + * SVR4/i386 ABI (pages 3-31, 3-32) says that when the program + * starts %edx contains a pointer to a function which might be + * registered using `atexit'. This provides a mean for the + * dynamic linker to call DT_FINI functions for shared libraries + * that have been loaded before the code runs. + * A value of 0 tells we have no such handler. + * + * This applies to x86_64 as well as i386. + * + * That said, the kernel's ELF_PLAT_INIT simply zeros all of the gener= al + * registers. Note that x86_cpu_reset_hold will set %edx to cpuid_ver= sion; + * clear all general registers defensively. + */ + memset(env->regs, 0, sizeof(env->regs)); + env->regs[R_ESP] =3D info->start_stack; + env->eip =3D info->entry; =20 /* linux interrupt setup */ #ifndef TARGET_ABI32 @@ -394,7 +390,7 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) PROT_READ|PROT_WRITE, MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); idt_table =3D g2h_untagged(env->idt.base); - for (i =3D 0; i < 20; i++) { + for (int i =3D 0; i < 20; i++) { set_idt(i, 0, is64); } set_idt(3, 3, is64); --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337190; cv=none; d=zohomail.com; s=zohoarc; b=igaVvlTg8vqFI07bBDZwzTQDFlMmMlWMMFLCasTKEf++bV39jvGuGmLnfMv1hrThoMZYUXthVqawpUXRvZSg0fYgVf9PS7whfeUNqMuCzxGcIaLIWD2P0XkKymdSioAn+ZJg5lv8Sz9Nt/9cxnLIXDgVYiabRZFvLBszI05N9RE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337190; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=sLWZcll6BBWWPhJe3hiHwSDE6R9zCUM8RT/HK5CodU8=; b=SLVJln6RgxUy3j0Tqx1+D65NROplSQXxXO/ofMrx25PZvTYdik0sD5+7xDz0V45VtSVPt9kP7Nmixvt5suT6UtClzjFwjsvsIckC2PLI/h5qf/Z/hOb8nl9dJV3ow0nmsl5Go3W6dXp88cxpB+S/95jDMDZaCe7i5ZGuIEus4eA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337190446569.4280910635013; Wed, 27 Aug 2025 16:26:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPTD-0005N0-Km; Wed, 27 Aug 2025 19:22:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSn-0004Bv-Ew for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:59 -0400 Received: from mail-pf1-x432.google.com ([2607:f8b0:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSh-0004IF-Hj for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:57 -0400 Received: by mail-pf1-x432.google.com with SMTP id d2e1a72fcca58-7704f3c46ceso329544b3a.2 for ; Wed, 27 Aug 2025 16:21:50 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.21.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:21:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336908; x=1756941708; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sLWZcll6BBWWPhJe3hiHwSDE6R9zCUM8RT/HK5CodU8=; b=a6i4lfOYt7JwTnn0gYmcNQGzsLALe/iJK82J1kw67JNf+zIojoFvodXWO8sN+QfaMh oUkt+JcWUV/0bgqdorToDjWJpQVakjsHb4P3mnnVFlvUVKhNG4zq0lngCNGjqVUXfFR0 Ui6s8P8/gm+1KrwcCYOvnrOoI00w9WkBiWAtXoHYJbbyoCrdFMDVAe9svymjkq98xIFT ua04wqgt+C3pI6iW7VTvQ7M/dojgcDa3RZ4Pn8F+qFYuchDrsUkiyBj3lH4tkkTxU3Mk U+TBAb+aB/HmKpwjOHHwkDrkinvF9rq91LxRvvp5rgAncLNpU3chJKMoMQPN3Ybbx4tW PweQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336908; x=1756941708; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sLWZcll6BBWWPhJe3hiHwSDE6R9zCUM8RT/HK5CodU8=; b=pNvLjiR8Yg1HjBmWLXjKAz/aTMsHbcfdkVte2SDIcL25z3G1osi4BSKgh/WRjeZQuZ BPLrbvr7pXryHzeZ7mOItR7Jw4QQWtFskWy3l9dwnrmrMtV4ej+C/UYNgploN36yt2rF M0qjfEVKsk5Ghbrt3QnaNR1xJbYr9idoDx7ArX67BMUMcUVLRLU8NdFXTcoK2sglDVOZ Ivtfs4wOuA3VX7HgeQ/SJ89vISz2MllFa0IMBvNC+wBNNEpKGInyMKbfl6kEx8/riWv0 lTF57Bg3SLwI/96Iw00sFEBRphC/sf2n9uUAWdFrzGM8SNKbxsKap8pq+6F9U39Ksk1c V/mQ== X-Gm-Message-State: AOJu0Yyqa/8DYeT+XlyICJFw1sNfVOzmhy8dE49S2Cr+VCQCZB8FSazZ 8Yz/9Thb+/mI5YVbzozO6k6yNzRSSqdX53itSalAg+2h+xV31mFEpCYL9QtNzqKskLcnGtvh5R4 uKOtrM8U= X-Gm-Gg: ASbGncuFaT6/0ua8aBfwnOxJT1+gavLaOhJiFcuIFBwgq+m/v+fHiZLW4zyTt0uVk8F SekSjsT9CtDyto0qVHRTxSHZqbmoFv3saJDZ4l5BzKj8raCUOzsQIXbSFetg2bM9MbhOXaIWNnM AUQcmWavCujws/wg4xPE9CgR2ZsbljnoAmU14QaackxPG5mnAVam2icYj99f+dZMpk3gZQy0PQk tWZgrbWXy1Al2I2HD3AyBXITDfUvxr0bDWK/V2fVjqBVUjPq2Slw9K2iXs93Ci5iCKuAVcSCxhS JEhSU3PyuTg5zITg5KlUKQP0deRL0Ol/bVWA9qNRTX7Jn08x3FToEJfgs3wP1UcPCE8KKDh7EP+ tUBJUHcT69wJCcqi7p5N6WToNnw== X-Google-Smtp-Source: AGHT+IGi8Wa5Hs4WOIwWVfUR+AIk5dk8CHtrcsUyoKxmn2236ldg6Mx5XwiIteAuvXRZyfsh4T6AEA== X-Received: by 2002:a05:6a00:2989:b0:772:775:88c9 with SMTP id d2e1a72fcca58-77207758ab4mr4917533b3a.19.1756336907974; Wed, 27 Aug 2025 16:21:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 27/46] linux-user/arm: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:04 +1000 Message-ID: <20250827232023.50398-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337192890116600 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/arm/cpu_loop.c | 51 ++++++++++++++++++++++++++++++++------- linux-user/elfload.c | 41 +------------------------------ 2 files changed, 43 insertions(+), 49 deletions(-) diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index 9d54422736..739e1607e3 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -480,17 +480,50 @@ void cpu_loop(CPUARMState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - CPUState *cpu =3D env_cpu(env); - TaskState *ts =3D get_task_state(cpu); - struct image_info *info =3D ts->info; - int i; + CPUARMState *env =3D cpu_env(cs); + abi_ptr stack =3D info->start_stack; + abi_ptr entry =3D info->entry; =20 - cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC, - CPSRWriteByInstr); - for(i =3D 0; i < 16; i++) { - env->regs[i] =3D regs->uregs[i]; + cpsr_write(env, ARM_CPU_MODE_USR | (entry & 1 ? CPSR_T : 0), + CPSR_USER | CPSR_EXEC, CPSRWriteByInstr); + + env->regs[15] =3D entry & 0xfffffffe; + env->regs[13] =3D stack; + + /* FIXME - what to for failure of get_user()? */ + get_user_ual(env->regs[2], stack + 8); /* envp */ + get_user_ual(env->regs[1], stack + 4); /* envp */ + + /* + * Per the SVR4 ABI, r0 contains a pointer to a function to be + * registered with atexit. A value of 0 means we have no such handler. + */ + env->regs[0] =3D 0; + + /* For uClinux PIC binaries. */ + /* XXX: Linux does this only on ARM with no MMU (do we care?) */ + env->regs[10] =3D info->start_data; + + /* Support ARM FDPIC. */ + if (info_is_fdpic(info)) { + /* + * As described in the ABI document, r7 points to the loadmap info + * prepared by the kernel. If an interpreter is needed, r8 points + * to the interpreter loadmap and r9 points to the interpreter + * PT_DYNAMIC info. If no interpreter is needed, r8 is zero, and + * r9 points to the main program PT_DYNAMIC info. + */ + env->regs[7] =3D info->loadmap_addr; + if (info->interpreter_loadmap_addr) { + /* Executable is dynamically loaded. */ + env->regs[8] =3D info->interpreter_loadmap_addr; + env->regs[9] =3D info->interpreter_pt_dynamic_addr; + } else { + env->regs[8] =3D 0; + env->regs[9] =3D info->pt_dynamic_addr; + } } =20 if (TARGET_BIG_ENDIAN) { diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 89f3972253..9586873954 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -293,46 +293,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, const CPUX86State *en #define ELF_CLASS ELFCLASS32 #define EXSTACK_DEFAULT true =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - abi_long stack =3D infop->start_stack; - memset(regs, 0, sizeof(*regs)); - - regs->uregs[16] =3D ARM_CPU_MODE_USR; - if (infop->entry & 1) { - regs->uregs[16] |=3D CPSR_T; - } - regs->uregs[15] =3D infop->entry & 0xfffffffe; - regs->uregs[13] =3D infop->start_stack; - /* FIXME - what to for failure of get_user()? */ - get_user_ual(regs->uregs[2], stack + 8); /* envp */ - get_user_ual(regs->uregs[1], stack + 4); /* envp */ - /* XXX: it seems that r0 is zeroed after ! */ - regs->uregs[0] =3D 0; - /* For uClinux PIC binaries. */ - /* XXX: Linux does this only on ARM with no MMU (do we care ?) */ - regs->uregs[10] =3D infop->start_data; - - /* Support ARM FDPIC. */ - if (info_is_fdpic(infop)) { - /* As described in the ABI document, r7 points to the loadmap info - * prepared by the kernel. If an interpreter is needed, r8 points - * to the interpreter loadmap and r9 points to the interpreter - * PT_DYNAMIC info. If no interpreter is needed, r8 is zero, and - * r9 points to the main program PT_DYNAMIC info. - */ - regs->uregs[7] =3D infop->loadmap_addr; - if (infop->interpreter_loadmap_addr) { - /* Executable is dynamically loaded. */ - regs->uregs[8] =3D infop->interpreter_loadmap_addr; - regs->uregs[9] =3D infop->interpreter_pt_dynamic_addr; - } else { - regs->uregs[8] =3D 0; - regs->uregs[9] =3D infop->pt_dynamic_addr; - } - } -} +#define HAVE_INIT_MAIN_THREAD =20 #define ELF_NREG 18 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337297; cv=none; d=zohomail.com; s=zohoarc; b=NNvGEnzyqINutZL/afvJMx2Kfwn0GN86qCNxFU+FKflRQ2ysTvTgZCa5XUI/u+vegMjBn0VMGMgUbE42W8E1gh4Lu7gvi9Qdq6iN9NqTvwjWAGNTkMBjLNJY2/YlbpGZpWPtdEIpJXGTRHnIMUJJGgc8loR/jFZfgDcr4mZ2WUI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337297; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=WSVqd0uuUJulTp/+1527diZnoWMaHN/H9TVCfEJDaRI=; b=a6PYZDJCRKnEVyaDNIJiYpmLeSg11ygHdqycrDLGENcuxg5+gTqc0AvOQjn3V0JXRR1bKHpOA3MKP3hAFRlqjvVHxa/BwEsD7KUU9QKTrJVnFXBGczVtzIvXK8DMOkSAyrWA/pcZ6Z4QX+U211wS4mBYU5sYCEsilayewPAHJtU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 175633729731688.12883064537982; Wed, 27 Aug 2025 16:28:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPT7-0004pA-RE; Wed, 27 Aug 2025 19:22:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSp-0004Cu-5S for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:00 -0400 Received: from mail-pf1-x435.google.com ([2607:f8b0:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSj-0004Ij-7W for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:21:58 -0400 Received: by mail-pf1-x435.google.com with SMTP id d2e1a72fcca58-771e15ce64eso333222b3a.0 for ; Wed, 27 Aug 2025 16:21:52 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.21.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:21:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336910; x=1756941710; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WSVqd0uuUJulTp/+1527diZnoWMaHN/H9TVCfEJDaRI=; b=xr5B8yZ4U9OJb1E1vmQBXlFDGUkW4rPEJcH5spjQGqxWOkZZ20h4Y+EKehmSu/5quz 1DkamLimHKbBNyZNgkwkkOOEpYvu8wj6AUNW1nMgZBbDCyuT9HqYzE/inSyOQX0zN+oq W+Aq+2KRek5pdicUMK/WGloJ3oo0sI6R+gOTQ69M24d8HIFesTo5K4mjSGHdHhVrcysv m0k7I3JxizX5D9eIbGgo9x6AG7nnQlY2qJa4QsPxZ0D4GW9YbLrprOLtNWCuOOyWaSeI Ale+wK0YUch+R1gJ6Sm7t2CiAYPa0ODNYZ99IXJcefPxYvzhGxgvk0lN+6gjyHW/5EZ4 QmPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336910; x=1756941710; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WSVqd0uuUJulTp/+1527diZnoWMaHN/H9TVCfEJDaRI=; b=dNoNRkuhx/tgpbRszcexXepBljY0gndoJCPfkR2JTOZSEqBVmC/yeS/43uxN8vgV1y xtvolnHAm/niyQK5myXnFvUKxgxP7qQEyu9eRXHzsOEL4xE9ze08EwJY1lXF2wOhVrri q0qSBE/G8jDDoe4WJ+nMan08XCHYExWXTg452Z6dmwk9sHf9w9TLyrdjugRXXljhiXZ9 1lN7mO9pCy5BXq8DTcQw0ndH/S9j5CepJRTJijhxsAFnKyqvCWNFVKagwqe/XOqcSJ7H bjrZcxkIrdNU036E0wzWZksbpq3kayz319ZAixc3O45/zSeHkBeew3FEzaBtZAOuW3c/ D6bA== X-Gm-Message-State: AOJu0YwYznvigz5O4MGhVjqBEVqwZVBCWwuu5L0FiZsSQz/5C9Uf/mXH b8S5utRVDK8x6Fw4WNzgr2Wyxv+YAzxasD+xGwvbs8pOSMEfGiZgq6CD82ITG2uNI6/xYoZyTII vKCoTFMg= X-Gm-Gg: ASbGnctHnG1A0HUuwbAedqt+2iXEi00jpaBqjJixwErk261z6FKd7EveZ+gRicCouAU EoeQ3FSA9656HMEqwSXuBOZvsiRWAT/5yxGl/E62H0p8heJYB0vMsZzp5nYNZH2bYNJZSyZ/571 sTx5M8udhDxdIAkxC067COaTSA6cyJC1ILVW6PQYoLXS93OGzhmzHz1N6cobxodM7LazFXYbOK+ xKBb0oENPige7A+CitLHQbpTHQwwPkriv+ttKomjMoQOsnWUfKhNwH6ku4ZhCh980uFVjhxb8wu hJ0xGlrQEfLrm1U7Ir1xiL/cIsxpJ4L/jZpYw+hYhuMYmzTkWDw4LC278tmGgQ2hpwD388QkqJM rZOSesF0wUrN5F5qn3SQ9UgM6Ig== X-Google-Smtp-Source: AGHT+IGsu9g81Wemy2pp1RCMtXzXe3vD3RsvfOUZ9X/bGAFp8yd9AFgPzpdl9p9B2whqmq+fGDwX+g== X-Received: by 2002:a05:6a00:2e21:b0:771:e935:9a0 with SMTP id d2e1a72fcca58-771e9351f1bmr17706151b3a.13.1756336910392; Wed, 27 Aug 2025 16:21:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 28/46] linux-user/arm: Remove a.out startup remenents Date: Thu, 28 Aug 2025 09:20:05 +1000 Message-ID: <20250827232023.50398-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337297736116600 Content-Type: text/plain; charset="utf-8" The setting of r1/r2 was removed in kernel commit acfdd4b1f7590d0 ("ARM: 7791/1: a.out: remove partial a.out support"), and the kernel commit message explains the history. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/arm/cpu_loop.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index 739e1607e3..9aeb9b0087 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -492,10 +492,6 @@ void init_main_thread(CPUState *cs, struct image_info = *info) env->regs[15] =3D entry & 0xfffffffe; env->regs[13] =3D stack; =20 - /* FIXME - what to for failure of get_user()? */ - get_user_ual(env->regs[2], stack + 8); /* envp */ - get_user_ual(env->regs[1], stack + 4); /* envp */ - /* * Per the SVR4 ABI, r0 contains a pointer to a function to be * registered with atexit. A value of 0 means we have no such handler. --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336960; cv=none; d=zohomail.com; s=zohoarc; b=J8ElFPc7QFUvhKDGXWr25k9R7ThtmTrMXO2v12y/eVVAXW9Ro/FLRHj9TepFdamPF/oh8Bi8dbi0sU7lKyG7xL4B8S/+M5yanT8PGWk/pA9wclJ/+/Kvm8/lig5r4c2uxlVJsxoda0OnYd4GXxYJhgpx5vC6UAe1U10w/SSQuSQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336960; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=RixljIz+HOjrys5KmnaZU9bK0ysdxVWlZPGtRGwn11E=; b=IGyrxcFJljk3UZ41+WyPPcMB0ijY95p5BSdC93MtQq6F0JoVdCmxRgJcJlMDCZM21wB2/rpeeMLWujQnqXTh9CADq4awUaY+GpxjAMxExYc8OZtn4mwowbpZ24W76SgZup2rL1Yf0O1KFdi16flO1UlZUSaxm2RU39bZeYrW1lE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756336960378812.4971429301283; Wed, 27 Aug 2025 16:22:40 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPT9-0004wk-Oi; Wed, 27 Aug 2025 19:22:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSr-0004MS-A4 for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:02 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSm-0004Jc-0k for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:00 -0400 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-32326e5f058so331597a91.3 for ; Wed, 27 Aug 2025 16:21:55 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.21.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:21:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336913; x=1756941713; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RixljIz+HOjrys5KmnaZU9bK0ysdxVWlZPGtRGwn11E=; b=dhL7J5jmzSUiu7S1iunupXxAOovBud9sufzjOrt9ewvtluOnzi54IypxJXzw5ppOOi LgiqHPYwVTPof5EP+UUIfhEiGNgcvRsy36vb28i94Dn5jsWhhkJa10V9J2vjV/M9rxTB Cgnb+ntgRECTvNHbHFu/I/ademFhiBqKE8vDJmxnL1PUAoB3CuZTJasKxplFd0XNxJJz K+52dWVDhTpnFIzzUSOYPTQlqVIiupoDvwP1J5VQV6CAg2QVY9ttAu6Ol66dfCMlWNu8 mbC8n7bXadj30dWztcFahsv/lKmoin+n56BdcWYX1bUMfP1H+0LrMhjx9Z2cYR5oD5Kn UNvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336913; x=1756941713; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RixljIz+HOjrys5KmnaZU9bK0ysdxVWlZPGtRGwn11E=; b=sE359zzDVhbXnUwmfNAqdSU6Np/F4k1uBotYaqHuKKo5iql63KeIupOo2DX/LmX0oO ktOXQ8NdQMsaB4fCVM9J2Q8JJa72Za6f6n76eYH5ACwKJWVSBpKpwxqMDZ7pD/h4gSVv NM/0pXZMt99Wbw1RurEVdFNyfLSoSz36WuTvSrBFaZOY0RyPfeXtxzYAfi5JMbeGmbiI Z890V7UW0L6xPQKmLhNHOiKLV5CfkWOqZxXNT8J6YoMgEC3TMftrzOMFHYuBKpUlsClJ 8Tg4djg0iM8mYL+/DXKaf+puY+5hcY2xsMRmamcGMy5/HBHKrbi7dsxAJpLDEfAj1unr tCKQ== X-Gm-Message-State: AOJu0YxXvNAqEUTYYjN7qEsBo8cwRoUue6qy/somDED6qFDHcg35o93Q mmPExD8+EPRQ91TC/+x9xv7+NtbjYbWp28djN9ro1ciyXLiEPxs0tDSDd+lqsazn05zz2uiqiAs B1QRHhCg= X-Gm-Gg: ASbGncvGqO8tuMj1/gByQgm3db5J1AGnrwdiQtH/j8roNwkQdI9eO8JQ0n4Gk22JgyO vHe/xtsfvDYc1v6z+vSRW+h9loPLql3c2hW5tsSwBe/wu2HHGOv0Wdy0uTAlqOIPWvNfQHP2h/f v8cSpQCr1pB4fFbmfG8OfJsb6WAP8Puz67S29ENwk+8jYXq0uWYsQmy7cUwMrxJCBvKJnR/hfXF qdiLHtsJIEqS+BAh5cnuptbQlYk1JrcbdXqsTeobO8kcpVQ4zRUfjTHaYzxxi13xBTLXc8GImvF 33DOsygbeLkoEPvi57bzXsqeEyhhvsZkdxcmjYZsGXO45ErQZ/lG0xaTSS5YRQWvEW9RKyXrNfV 7JTi1n4MwBUqHB8O0F/sC96YIzXIaAUrzd02w X-Google-Smtp-Source: AGHT+IGRCrZrd/2R/25PwgIBqGnvuwZgE16LKsLb4qbiz86kYYPu1Po0rcKCQPlKLc2kiY+KtTtJUA== X-Received: by 2002:a17:90b:2790:b0:325:46e4:b171 with SMTP id 98e67ed59e1d1-32546e4b308mr23795471a91.6.1756336912675; Wed, 27 Aug 2025 16:21:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 29/46] linux-user/aarch64: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:06 +1000 Message-ID: <20250827232023.50398-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756336962800124100 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/aarch64/cpu_loop.c | 14 ++++++-------- linux-user/elfload.c | 10 +--------- 2 files changed, 7 insertions(+), 17 deletions(-) diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index 030a630c93..4c4921152e 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -137,10 +137,10 @@ void cpu_loop(CPUARMState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { + CPUARMState *env =3D cpu_env(cs); ARMCPU *cpu =3D env_archcpu(env); - int i; =20 if (!(arm_feature(env, ARM_FEATURE_AARCH64))) { fprintf(stderr, @@ -148,14 +148,12 @@ void target_cpu_copy_regs(CPUArchState *env, target_p= t_regs *regs) exit(EXIT_FAILURE); } =20 - for (i =3D 0; i < 31; i++) { - env->xregs[i] =3D regs->regs[i]; - } - env->pc =3D regs->pc; - env->xregs[31] =3D regs->sp; + env->pc =3D info->entry & ~0x3ULL; + env->xregs[31] =3D info->start_stack; + #if TARGET_BIG_ENDIAN env->cp15.sctlr_el[1] |=3D SCTLR_E0E; - for (i =3D 1; i < 4; ++i) { + for (int i =3D 1; i < 4; ++i) { env->cp15.sctlr_el[i] |=3D SCTLR_EE; } arm_rebuild_hflags(env); diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 9586873954..f93afbdcea 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -395,15 +395,7 @@ static const VdsoImageInfo *vdso_image_info(uint32_t e= lf_flags) #define ELF_ARCH EM_AARCH64 #define ELF_CLASS ELFCLASS64 =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - abi_long stack =3D infop->start_stack; - memset(regs, 0, sizeof(*regs)); - - regs->pc =3D infop->entry & ~0x3ULL; - regs->sp =3D stack; -} +#define HAVE_INIT_MAIN_THREAD =20 #define ELF_NREG 34 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337309; cv=none; d=zohomail.com; s=zohoarc; b=B3c8oZWRDn2ZP1WnI6SMfiJ2q3DYgo5GZrdrNSHQpLLn44DXsNN4WajqJuaA76OmhsYYEO7OppDqnfGmExzXAQsJFli+KwvzE/0EfzZ3CvOt8OlpklRQj0RDzilWMSe/Bwc+ZxWGrf0ypEmGu5CRtTlG5oRGga62YcGIk5gPVCE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337309; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=hyAgW55H5bM3qji66ZgE4qa6mv5NgUjvr6IxHop/cLg=; b=Rvmh0336JP8jUxdTKwQa+dzbUHXVYmsW7JwhhnXudgx3jeljrUieOla8dHpfAAMnTtiClUCgjc0jvIDYLuFMzDebCYdsgnB+JP/Ks389oKwhAE0RmLLCf4jy7mFcVK6e3tYk+3kL8/1IpPtYdVZdt3EIPT3ToJawGryVI1foBt4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337309328957.3906193394926; Wed, 27 Aug 2025 16:28:29 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPT7-0004jX-BS; Wed, 27 Aug 2025 19:22:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSx-0004V7-1U for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:08 -0400 Received: from mail-pf1-x433.google.com ([2607:f8b0:4864:20::433]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSn-0004Jp-3h for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:06 -0400 Received: by mail-pf1-x433.google.com with SMTP id d2e1a72fcca58-771e1e64fbbso476822b3a.3 for ; Wed, 27 Aug 2025 16:21:56 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.21.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:21:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336915; x=1756941715; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hyAgW55H5bM3qji66ZgE4qa6mv5NgUjvr6IxHop/cLg=; b=aosxZishaY5Y/WKVQlYLTuIVleiyA2ipyItnvBVDH8a0xBSw1BPknnIITXVgxbxA4T zDtObPUygpP53qFXISOsVTfPXO4QdRqE8RDzxp+Z8NErvaztsRiET27doQbksDptNuWg XfZhuySRCfffcgWM6qtZ1GeXxE4Ii6xp12temJeI+X8PEfbePAltNeQD7vlL5awLLC1g 0fzc8dNFxo+lDfhB5xeEqD9366yDaPao2BwCtT6Pd+4zETNSlI+orDnknUs+Ly6SwHuj FEeXNHars+lVTbZRcrq5aLa596o+3Z/6XRYMvcSclgkdGTs0jjV/E9Hzz8b2FfmPoky/ Wv3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336915; x=1756941715; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hyAgW55H5bM3qji66ZgE4qa6mv5NgUjvr6IxHop/cLg=; b=GSxw4Bt0Aoq0v8q8Ooo9ur7pL+TYna+IIIxsZaj9FXRibJ9n/YYn8UhV6EO20JRhCi fNOPZ9QpN50ZHQfhzICld6Chs2SNSpjIZChjyZo7bR12/P2BZON+6pUUskPLG3wHKzAB aUeNntg76y6VHRL+h9iJ5bm7+fLwHNNTHZ2Pf2RzImX336i0gpaY9HfQsxF+ZxoUe/7X qsPC0tI6rgsbi3xSEtvoVlQtK1Sj8pxIhUgsXd1rSQN1nvYADEDSOwBeIYalQ9NWtuXC 0FQvD0j6fC2GOLNxrt08ND/EA6smjOxele6978jFu3+GzQRULikNkUDPwDJ/6ZtfNt+w HptA== X-Gm-Message-State: AOJu0YzDDllsZbs7z1Dnv7UGomZw8zkBo3IxYbd76mM4bkjy4Klg5cCy WQ4MEUKBxgeIIWHDwoD1CzTbGOjnVM+ULIbmZC3reMrHuUo1zyrbIiY+oXP7VvXuHPGT787h32p Dh9U/2hw= X-Gm-Gg: ASbGncvET6MWRdEosw7jiDUie3i4+heQhLpurmukzvEOlJD365NRBkXubFlBLIEmpLd pcvUHyLa2qO7aJO8CUgbiI8irnW633SbAhvqyzftasPho3bKADF7xPYDDcOB2Pvr+eNki1T83m7 +S1+dUI8cTMxa8m1vBLHpChTQs7FjGKpriiKMnxk0vIzuIQGg3+kzpBJUGnSWX1U2+i8BmcgQn8 v/ntaO7FgTf1TMCL/BHAezajMZ4vDe7KQ+NR9Dt/UzEWWMW7XwWgQjPatR4+KzOMXC0cRIP9eZZ oNOPtuyoG2bliFlv/sUqqaDqglpluHIkCH5fY6ar9sjNx6/09ifv3XJJ77Rd/U7+9mKCXBml229 +BEV7TMACPT1HHf2Hy5lh9BPzuQ== X-Google-Smtp-Source: AGHT+IFRSQZw6V7T96ih+2XYzwN2TGFSaPUnY2eNztmNLsodCeyz/eVhE4JqoaMfG7jmKakUlnvofQ== X-Received: by 2002:a05:6a00:244e:b0:771:ef50:34c with SMTP id d2e1a72fcca58-771ef500a1cmr13713778b3a.24.1756336914783; Wed, 27 Aug 2025 16:21:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 30/46] linux-user/sparc: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:07 +1000 Message-ID: <20250827232023.50398-31-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337309946116600 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 12 ++---------- linux-user/sparc/cpu_loop.c | 16 +++++++--------- 2 files changed, 9 insertions(+), 19 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index f93afbdcea..887a3a1cb2 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -438,16 +438,8 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, # define ELF_ARCH EM_SPARCV9 #endif =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - /* Note that target_cpu_copy_regs does not read psr/tstate. */ - regs->pc =3D infop->entry; - regs->npc =3D regs->pc + 4; - regs->y =3D 0; - regs->u_regs[14] =3D (infop->start_stack - 16 * sizeof(abi_ulong) - - TARGET_STACK_BIAS); -} +#define HAVE_INIT_MAIN_THREAD + #endif /* TARGET_SPARC */ =20 #ifdef TARGET_PPC diff --git a/linux-user/sparc/cpu_loop.c b/linux-user/sparc/cpu_loop.c index 68f1e8ecd4..7d30cd1ff2 100644 --- a/linux-user/sparc/cpu_loop.c +++ b/linux-user/sparc/cpu_loop.c @@ -357,14 +357,12 @@ void cpu_loop (CPUSPARCState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - int i; - env->pc =3D regs->pc; - env->npc =3D regs->npc; - env->y =3D regs->y; - for(i =3D 0; i < 8; i++) - env->gregs[i] =3D regs->u_regs[i]; - for(i =3D 0; i < 8; i++) - env->regwptr[i] =3D regs->u_regs[i + 8]; + CPUArchState *env =3D cpu_env(cs); + + env->pc =3D info->entry; + env->npc =3D env->pc + 4; + env->regwptr[WREG_SP] =3D (info->start_stack - 16 * sizeof(abi_ulong) + - TARGET_STACK_BIAS); } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337203; cv=none; d=zohomail.com; s=zohoarc; b=OBwLHPmNBVdcNAoyUaLG7JHVSl8OyeDGjUXdJ6NYEAz4AuCN4ANf39CLFOgbcmdS2uBt0Epevgadyq1VZ2l5QbTD8RjBaTZLi6rUGO3hXXaRq71GBiJ34HmjKOU7MU35/+s5qCecuriNaB1Ij0ecs9k7Ec34QdGVs+3vse4d8sg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337203; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=V7yJ2dOzXEPF3L/bLWXq6zElOhyfMDM32daynhfDIlI=; b=BSiLMaCX51XsJnhyIbQZr3XjreALG3i+3eoldIG8UtFcwF8D/DhUI9BMYhMdbQlBLAbg+ao0r48dXVL4RWxhqxCfkNGi96GqhhHYVpIoM0BopCK0e/0JYFWtuVcs26Fuygj4C4lbKDXVTI4TnakoCeBpPuGdWtB4gAIzbIerAVc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337203038978.5083006780844; Wed, 27 Aug 2025 16:26:43 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPTA-00051K-KX; Wed, 27 Aug 2025 19:22:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSw-0004Tn-5Z for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:08 -0400 Received: from mail-pg1-x535.google.com ([2607:f8b0:4864:20::535]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSo-0004KG-Re for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:05 -0400 Received: by mail-pg1-x535.google.com with SMTP id 41be03b00d2f7-b49b56a3f27so277621a12.1 for ; Wed, 27 Aug 2025 16:21:58 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.21.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:21:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336917; x=1756941717; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=V7yJ2dOzXEPF3L/bLWXq6zElOhyfMDM32daynhfDIlI=; b=BmjQiGsRxEoX4Y+BISRlYtjS/4gcOH4fQ++N4qn3BraPpyk7iYycKKQMg4HuBFCEmr r1UkSdFk4IJJCyxHdhSuIP8sB05jzsngcyZKGRHMSb01KcGTs5r6Fw/oUxUs4BwMiSmZ n+CjX3XG016Zng1QqzLF5GKMc/1H636+d9fF+gjSoIxqKPc2uB7CqUjCWaazM+xL7sql SacEV8H5+BQVlGqmKEGGJmvkdgc44TQd5RYTUS89lp8iBqxBSklfuRM7lPZtLM8g1rrW Ibyrig+u8ssqetmxGRJ01xjakeapsz59ktrwUZgTS/r9AxyWjDkvgR8aDOGpJO9Solvu Qymg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336917; x=1756941717; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=V7yJ2dOzXEPF3L/bLWXq6zElOhyfMDM32daynhfDIlI=; b=K2ZxZaq5DS1A53rfoGWSjml9kuqSe+QEjJE2J+FtUEQxDyfrwWkY4BFi7GYLUUNgqg C7zPLyxCTYT76adV6PAGjczWgLS9l5kqRLEcu/zlItZZVnFe17ULdzecw75lLy5GpYGm Muw5zRKQn8+GlGtw3IYamanQG9zoWTfKgdVePDQHLEjZXNlwnV0qRz1j9v/fMqm6/Ri7 Kq3EeSIah0uxldPVo0V9R+zFTrwRf8wY3+W8JFw1xeIOE943tKJKenJo7Hd5NtBEkUaq PXGT8qfnmXm3Bo2CsfeAT+TOzUfPI28lz6PGKRST0yIQ03DaOxj+MoM1j6VL+ho9ZtcM tCEw== X-Gm-Message-State: AOJu0YzZDZveAfTDs5C3wNIii2Yz2GmMtIsiCHh1RPMUi89LYZzzXD2A K0PipZe6qXWKbGNR77qxlILYP+sKtFoNG9vMQLezdD0ITsN547RfTZbr5+zpZypep4WWWY0qoES Rob3m2X8= X-Gm-Gg: ASbGncuagHF5atPyooFPIUFZ1mm3y1JZKLOAL9W4gtMUcpV+0cD5U+ykmtlcDtLVnRa x+AhK/e8LrmaFEdm17jLcq/CDR8c+mW/6lAlTiWr4+VCVYj16nhtF6gNQd7rcCLdGlUuu/eOoOS 6FcrY7vCNoks1jiRJDyrvtX3hMaijv/uQZATmHjG30O/jGQdD6m0ct84lfijkSSMxqjQMGl12rt vIWYaa1UhXtQNUy7YevPkY+ZNgUy9HVMXriHsrn8oY2ZV7Tc5izuOAoStgS2CuO999mZuP2ZN+R RsdM7edfJ3e4c7/38f85oYEaSWQOiJSe52wB/V1qDzhFfleLl1E/mOzxL7psmRGBR9RXyru0WsN F48brWScq02prIK5X4UhlzfKUkA== X-Google-Smtp-Source: AGHT+IGQIUXrni3PXf27OCFs5ESuZXrJZpi5wDPLgZcC6+xdbxl7fY9ROs6mbn9ndwhiuctWut46lw== X-Received: by 2002:a17:90b:4a81:b0:31f:2fed:7867 with SMTP id 98e67ed59e1d1-32518998362mr25686402a91.34.1756336916847; Wed, 27 Aug 2025 16:21:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 31/46] linux-user/ppc: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:08 +1000 Message-ID: <20250827232023.50398-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337205526124100 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 17 +---------------- linux-user/ppc/cpu_loop.c | 26 ++++++++++++++++++-------- 2 files changed, 19 insertions(+), 24 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 887a3a1cb2..a30431c7a2 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -485,22 +485,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, NEW_AUX_ENT(AT_UCACHEBSIZE, 0); \ } while (0) =20 -static inline void init_thread(struct target_pt_regs *_regs, struct image_= info *infop) -{ - _regs->gpr[1] =3D infop->start_stack; -#if defined(TARGET_PPC64) - if (get_ppc64_abi(infop) < 2) { - uint64_t val; - get_user_u64(val, infop->entry + 8); - _regs->gpr[2] =3D val + infop->load_bias; - get_user_u64(val, infop->entry); - infop->entry =3D val + infop->load_bias; - } else { - _regs->gpr[12] =3D infop->entry; /* r12 set to global entry addre= ss */ - } -#endif - _regs->nip =3D infop->entry; -} +#define HAVE_INIT_MAIN_THREAD =20 /* See linux kernel: arch/powerpc/include/asm/elf.h. */ #define ELF_NREG 48 diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c index 2a0efaffcd..22885ffd90 100644 --- a/linux-user/ppc/cpu_loop.c +++ b/linux-user/ppc/cpu_loop.c @@ -378,21 +378,31 @@ void cpu_loop(CPUPPCState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - int i; + CPUArchState *env =3D cpu_env(cs); + abi_ptr entry =3D info->entry; + + env->gpr[1] =3D info->start_stack; + +#ifdef TARGET_PPC64 + if (get_ppc64_abi(info) < 2) { + uint64_t val; + get_user_u64(val, entry + 8); + env->gpr[2] =3D val + info->load_bias; + get_user_u64(val, entry); + entry =3D val + info->load_bias; + } else { + env->gpr[12] =3D entry; /* r12 set to global entry address */ + } =20 -#if defined(TARGET_PPC64) int flag =3D (env->insns_flags2 & PPC2_BOOKE206) ? MSR_CM : MSR_SF; #if defined(TARGET_ABI32) ppc_store_msr(env, env->msr & ~((target_ulong)1 << flag)); #else ppc_store_msr(env, env->msr | (target_ulong)1 << flag); #endif -#endif +#endif /* TARGET_PPC64 */ =20 - env->nip =3D regs->nip; - for(i =3D 0; i < 32; i++) { - env->gpr[i] =3D regs->gpr[i]; - } + env->nip =3D entry; } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337146; cv=none; d=zohomail.com; s=zohoarc; b=ICj+ALOfgAsYX4ttBMDhhx2R1/m3Pbb7f9f/6/1Tbrc9KK3jb7cn1drwMiHySpUFpXjMnIW9ZOMuYSN/4c9KyUH+85oURaNFjTS1zULPDE8rry/ss8rzM6Pf1TJXjuX37yUrNqBqFnVqRopM3JyM+nVBGeC8sW4Q8U1Z2BAA5L4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337146; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=+wIvTYAiiT1df2UjL/R0r+8svJREkoZn9cbNcggG3h4=; b=miB6bYvDnfs8nUYn3x6hKqGrW0mdMAvu2DdxGCdPvcE+DBe2qakb9ndHFL7lMixcYoZi5E80DWzJM0i/MbDNygbYsL16n0Lm+65mBzLFJK5oX7nQCi48s/BDpojd77iA2200vaR0ZTsZf+4posfBaaXIPETn7acTuo3Gh0zTRrY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337146530743.3466143995095; Wed, 27 Aug 2025 16:25:46 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPTI-0005uc-Tq; Wed, 27 Aug 2025 19:22:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPT1-0004cI-4a for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:14 -0400 Received: from mail-pf1-x434.google.com ([2607:f8b0:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSt-0004Km-1y for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:10 -0400 Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-7704f3c4708so474047b3a.1 for ; Wed, 27 Aug 2025 16:22:00 -0700 (PDT) Received: from stoup.. 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There's no point going through a target_pt_regs intermediate. Note that init_thread had set crmd in target_pt_regs, but target_cpu_copy_regs did not copy to env. This turns out to be ok because loongarch_cpu_reset_hold initializes CRMD properly. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 9 +-------- linux-user/loongarch64/cpu_loop.c | 11 ++++------- 2 files changed, 5 insertions(+), 15 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index a30431c7a2..0feccfbe91 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -533,14 +533,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, const CPUPPCState *en =20 #define VDSO_HEADER "vdso.c.inc" =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - /*Set crmd PG,DA =3D 1,0 */ - regs->csr.crmd =3D 2 << 3; - regs->csr.era =3D infop->entry; - regs->regs[3] =3D infop->start_stack; -} +#define HAVE_INIT_MAIN_THREAD =20 /* See linux kernel: arch/loongarch/include/asm/elf.h */ #define ELF_NREG 45 diff --git a/linux-user/loongarch64/cpu_loop.c b/linux-user/loongarch64/cpu= _loop.c index ec8a06c88c..a0a4cbb7cc 100644 --- a/linux-user/loongarch64/cpu_loop.c +++ b/linux-user/loongarch64/cpu_loop.c @@ -120,13 +120,10 @@ void cpu_loop(CPULoongArchState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - int i; - - for (i =3D 0; i < 32; i++) { - env->gpr[i] =3D regs->regs[i]; - } - env->pc =3D regs->csr.era; + CPUArchState *env =3D cpu_env(cs); =20 + env->pc =3D info->entry; + env->gpr[3] =3D info->start_stack; } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337302; cv=none; d=zohomail.com; s=zohoarc; b=hrndV9hgceDoCQ+KcqD215yOw4bFw6rhzFOWGpQDWRcAarlYWCtghUiNhdal134bvd+cGo7d6u8YT5dJ9AFPuggHmeBGy0b/bB8JcJCuQbeEYOPNEApbkGVo+2yOzDgb+jXaJIneu/hD23bi9lFejS91BVohMdYb1yl7pLGbFNA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337302; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=M5IHWXiuirOhIdHwAX/EQgapibaS75RzzatEhNgb4z0=; b=M8kIvsnBr0ghbOtXN3I3HohSGMJnjU1L7R/4ZNQumxkywRm7NAd9uPZiSzkh4AqT2cqsCDnwup/iaYh0gDlBNbaARjhkx1AhqBFiNL2Ehb4aa+EF5VlNhScv0pnuAb3RN+3f2RVomA36Rn5UlaYQu+0oSIMEApkH/ON++xV7a84= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337302833619.5822531870973; Wed, 27 Aug 2025 16:28:22 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPTI-0005ti-Nb; Wed, 27 Aug 2025 19:22:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSy-0004WJ-P6 for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:08 -0400 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSt-0004L7-LA for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:07 -0400 Received: by mail-pj1-x102f.google.com with SMTP id 98e67ed59e1d1-3253f0c8788so488981a91.0 for ; Wed, 27 Aug 2025 16:22:03 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.21.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:22:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336921; x=1756941721; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=M5IHWXiuirOhIdHwAX/EQgapibaS75RzzatEhNgb4z0=; b=DfwiY/Ur9YhcdPQR17oJPjSdjaPu1KodOcxJotDrhX6frjB9zi5SzzqM2bpebGlgc6 vYchYg0UOeBu/XYhVS+sLjIpyCwNYWQcmYYa4PHpyL6uIbSXHEtV5ClROg59I/KzNW4D oi6mSWljl23/KdlbfJDL86137O2RXSg+G3T939zHlNUOLQG8GrtDOcv2PaPJ0kY8PXm7 WnXK0hS0Mgz0WNBEjfLZW2W4v4pn+UZa/B21S4Slje/MmoEVt2IfgvTwXr3N8X79V9KX WFgEEUDKZCfqvejbPrhBpQKazHOIvTkNvmzIDICD1ESQxN2Mb5IxIh1rNTe7sdr4D/uM uchQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336921; x=1756941721; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=M5IHWXiuirOhIdHwAX/EQgapibaS75RzzatEhNgb4z0=; b=RyxMj+ys19hcq0WvT5Y5GGPgzi66IKpGVB1dLdFUdB7fSvnvk9mvHzRC/G2f4WwoUd eqZhe4uTwoTewJAPyc4vhdjh3YMphMw2DCgyYKJrgTzLS9hlbFEHAbYuCruhgrxl1rWj pB4zRtemQhKgDnTmDh85Wvbn3whbNnpVcFKLguSQUamJGav+Ud4jVfGpU4QllyYVOMEg DArj9e4ZmzsZC5VLD4oqTtavJNSKlGUS8p5OknwVwSBArzI9+3LmBafb18rM05lbEGYT 1wzlvRujpVORC9+OjTt1Gudwi0Dprjear3L9Hpf6pWb1QOm3R7tVF3sd5z94QBeQwimx J7hw== X-Gm-Message-State: AOJu0YwpDvRtqaqNu6AQpDHY664ghme4yWym1V+ph5P8bP4Ppbm/qD+S zdkx4BzINkiYG6q4D9rHkcH3XaBNEiOeeyJ2X6Cb+f57QltsTxAcibwi5cNzwkAFkZdBiOikyDE UoC02kUs= X-Gm-Gg: ASbGnctAdr55iVTo1nDaXHBTkADrR8wqOEJC8/e9M3jWhA5Mtyaeg/SS7vLJ2f+XB4G sS7geYQvqCyrBCpe2RkwH7kLVF3sMu8itEv4WAGMykd/XFra9sD1dMLFvgZutAzAhzjnBk0jA5U M3QEtRN9cPgeOV0t+yGNzmL57wr35627WRev7fYt7tlH0I+G09SfvyrGnJ4meagUz5jDwP+8xZK zcqZhMeUr/4iqLZLqauHxbf8FsopCvTXmV4K7kBNZ0VFxDUJQQ/dXJTBfQH1w21IBfNRtobJ5BW cF+k5Y3UlxGX46dXaz7ut6jw26SvPL1EdZXXFZTogKjTlnrdPhf4eMCwHLaX6ARavUY6w5Q5MI4 q4UOZisiWDR0wRsrEZEKgRXw9BQSwH9fnKzlr X-Google-Smtp-Source: AGHT+IHlCkNedVLU77sLuhJtGobn2weWAx0qzXk64ItfeczVnhZYfz2F8Jn8THhXJZypeb+QBPihUQ== X-Received: by 2002:a17:90b:2f47:b0:321:87fa:e1ec with SMTP id 98e67ed59e1d1-32515ef197cmr26127483a91.34.1756336921087; Wed, 27 Aug 2025 16:22:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 33/46] linux-user/mips: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:10 +1000 Message-ID: <20250827232023.50398-34-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337303871116600 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Note that init_thread had set cp0_status in target_pt_regs, but target_cpu_copy_regs did not copy to env. This turns out to be ok because mips_cpu_reset_hold initializes CP0_Status properly. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 8 +------- linux-user/mips/cpu_loop.c | 16 ++++++---------- 2 files changed, 7 insertions(+), 17 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 0feccfbe91..ac96755b06 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -581,13 +581,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, #define elf_check_abi(x) (!((x) & EF_MIPS_ABI2)) #endif =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - regs->cp0_status =3D 2 << CP0St_KSU; - regs->cp0_epc =3D infop->entry; - regs->regs[29] =3D infop->start_stack; -} +#define HAVE_INIT_MAIN_THREAD =20 /* See linux kernel: arch/mips/include/asm/elf.h. */ #define ELF_NREG 45 diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index 6405806eb0..e67b8a2e46 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -211,12 +211,9 @@ done_syscall: } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - CPUState *cpu =3D env_cpu(env); - TaskState *ts =3D get_task_state(cpu); - struct image_info *info =3D ts->info; - int i; + CPUArchState *env =3D cpu_env(cs); =20 struct mode_req { bool single; @@ -245,12 +242,11 @@ void target_cpu_copy_regs(CPUArchState *env, target_p= t_regs *regs) =20 struct mode_req prog_req; struct mode_req interp_req; + target_ulong entry =3D info->entry; =20 - for(i =3D 0; i < 32; i++) { - env->active_tc.gpr[i] =3D regs->regs[i]; - } - env->active_tc.PC =3D regs->cp0_epc & ~(target_ulong)1; - if (regs->cp0_epc & 1) { + env->active_tc.gpr[29] =3D info->start_stack; + env->active_tc.PC =3D entry & ~(target_ulong)1; + if (entry & 1) { env->hflags |=3D MIPS_HFLAG_M16; } =20 --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336959; cv=none; d=zohomail.com; s=zohoarc; b=BKWfXdqs0oMRhSrauZJ2JoXMk+j43BUk7+HtX11S4TTDVI4VL+5cHwVVy+z/uQnj+MG3zU46yyUEhVg3FiujCHfogwdNJWoaV9l5z4S8eNB3gYKQIrB9MO4QBrFwN/9JhhEbfBQEXrbZhXxLZmMHlnT2e1MwF8+P4cNtGHmgHPU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336959; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=HsK1dRAVucN5uYDjY51g3VI30aLAIpvpyFsxl3c/Nkw=; b=ZyWxJi6hjgOXARMU1nGhjjo/n2NswIlvEmOqfnT0hrZzw7G9ln3wqbRDHiiEbC64gCE/ZPCY+oX6JnyrWZ6vHwFZ5q4UO5cbY5SvxYFcQlVPDViQ5vfq6QojCrA6zrK8f+BxRwyF6v8kgcInZeJIf48f+JDxLtFAQoItp9Yd8RA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756336959116952.5269235900356; Wed, 27 Aug 2025 16:22:39 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPTC-0005CJ-JS; Wed, 27 Aug 2025 19:22:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPSy-0004WI-PD for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:08 -0400 Received: from mail-pf1-x42c.google.com ([2607:f8b0:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSv-0004LO-0P for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:07 -0400 Received: by mail-pf1-x42c.google.com with SMTP id d2e1a72fcca58-7720c7cbcabso297102b3a.3 for ; Wed, 27 Aug 2025 16:22:04 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.22.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:22:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336923; x=1756941723; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HsK1dRAVucN5uYDjY51g3VI30aLAIpvpyFsxl3c/Nkw=; b=IXViq7418Yle243J2NUEIOryzZlzRknRLwPPPXkM56j5g3/5f/2QHq62BbNpVDY4Nu HPJMACCyTIYYumgYiwu+B1PzGQ5cXLeAyPxO5OIRB+deoNaYXeV8f0zXoBeZ1DM/SaSJ tcSRCTtiyHDLYYyUxfxXVs+6t1UhmOVMaTt4PyF4xWNA6avdkW+o5lcXfmJdwlre3v9o g13ErJYt/e/bpD+BM9Eqdg8JOnlaDOCmKklhpsjtVCZQh8aL/ppETCJ7XFLS6cf79w7d Y5z3MiZHjO+oA9xkLbhvYAwmlsxO2FZx9iQDEDEzX1VMyxLFLcnkeHg17invVymjnToq 4ceg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336923; x=1756941723; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HsK1dRAVucN5uYDjY51g3VI30aLAIpvpyFsxl3c/Nkw=; b=Bw4Gu/jpPBwbZVQ8BM7drIUWgOKrh+DE+WQx9hFejv+muJrGEf5hOBWgHnzMzm2a1V SJA1Lr9N+L7qGMQx8P31Ce93epdRy+rI7usxic/odROufmTiLMy7MgY4n9SUsghmuDdw SjpLbs6m+pYaD/t49O9fChlKeOA4SGkytDk2/qmnOJiM12IebKnLxd4YfUKt6zy2W0yn pKGYmXJjh5GsO9qQ8s1WyN2ZyntBWocLUQLEVn4ewRWWlEc3zJusNlHDBq2tDPLBIEpA admTvt0tnm9KzDBAEiKtYcPjfABEDwT+Mv/ifdV+N0X4K8gx8LFfbI+NDo3szjkqdOfD +eAQ== X-Gm-Message-State: AOJu0YzTnbYzCoShMNsbqXdvKwsnyHxYikVcjIK6qholX2Ap2XRuE4d+ EfDDeYlrA9IKb3kmRk/nIp7v+bNxlJ2u1BwcGdHA6RsxvfcyVygCvXWDnc76mRJ6Id2xD8t5po+ 3hCfqhJQ= X-Gm-Gg: ASbGncubno18kUPCY5ue9D5P+fm6ys9OAckzNwXCGLkvRB+94L0KfG/6LIN68N+vRXH pvKfu1fQiByuechW4Ptylqe1d8Z4deGbTczcUt3GlvDBAiCFQJlgkhDo+8HpG9Pk+80uB6Drrvz bFYRyiJsENWuxHL13hx4qW/YQm6yLyShWOiueGp3USCreekbJHV87PCM6GXFznUzjla/nQwRj9x 6TMDesX3oKbbquv+hY8JXnwhC/9MWpcMLhXQ3PkHbyaZsT3gHYBv41ol05fz/zqmwwXW3cpu/6j dx+UI0G8VOUbZhDvcLh1PtxXwwALUehY+ytVFuB6JwDM0OzZrdKI8Z2w1YuGkCzo164qm731dUJ cTuyR4gWN1MqBI5Iunw3x+mHnyDfx6Aj26SxN X-Google-Smtp-Source: AGHT+IHQa6/mY7sGgMUeuf3h3bGunarCvSRhaPq2raCSBaVeAGfePEfum9Tnex4L9Ws6q2Tc3yzD5Q== X-Received: by 2002:a05:6a00:398a:b0:76b:d75c:8a76 with SMTP id d2e1a72fcca58-7702f9d90b9mr25706648b3a.1.1756336923420; Wed, 27 Aug 2025 16:22:03 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 34/46] linux-user/microblaze: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:11 +1000 Message-ID: <20250827232023.50398-35-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756336960738124100 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 8 +------ linux-user/microblaze/cpu_loop.c | 39 ++++---------------------------- 2 files changed, 6 insertions(+), 41 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index ac96755b06..3f9ec49359 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -640,13 +640,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, const CPUMIPSState *e #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_MICROBLAZE =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - regs->pc =3D infop->entry; - regs->r1 =3D infop->start_stack; - -} +#define HAVE_INIT_MAIN_THREAD =20 #define ELF_EXEC_PAGESIZE 4096 =20 diff --git a/linux-user/microblaze/cpu_loop.c b/linux-user/microblaze/cpu_l= oop.c index 87236c166f..d8277961c7 100644 --- a/linux-user/microblaze/cpu_loop.c +++ b/linux-user/microblaze/cpu_loop.c @@ -127,39 +127,10 @@ void cpu_loop(CPUMBState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - env->regs[0] =3D regs->r0; - env->regs[1] =3D regs->r1; - env->regs[2] =3D regs->r2; - env->regs[3] =3D regs->r3; - env->regs[4] =3D regs->r4; - env->regs[5] =3D regs->r5; - env->regs[6] =3D regs->r6; - env->regs[7] =3D regs->r7; - env->regs[8] =3D regs->r8; - env->regs[9] =3D regs->r9; - env->regs[10] =3D regs->r10; - env->regs[11] =3D regs->r11; - env->regs[12] =3D regs->r12; - env->regs[13] =3D regs->r13; - env->regs[14] =3D regs->r14; - env->regs[15] =3D regs->r15; - env->regs[16] =3D regs->r16; - env->regs[17] =3D regs->r17; - env->regs[18] =3D regs->r18; - env->regs[19] =3D regs->r19; - env->regs[20] =3D regs->r20; - env->regs[21] =3D regs->r21; - env->regs[22] =3D regs->r22; - env->regs[23] =3D regs->r23; - env->regs[24] =3D regs->r24; - env->regs[25] =3D regs->r25; - env->regs[26] =3D regs->r26; - env->regs[27] =3D regs->r27; - env->regs[28] =3D regs->r28; - env->regs[29] =3D regs->r29; - env->regs[30] =3D regs->r30; - env->regs[31] =3D regs->r31; - env->pc =3D regs->pc; + CPUArchState *env =3D cpu_env(cs); + + env->pc =3D info->entry; + env->regs[1] =3D info->start_stack; } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337298; cv=none; d=zohomail.com; s=zohoarc; b=mZs6gP/BrNxgLs+AZnosFLU0VuiYHsBfHbcAsJ3fhrTMr8do4fuUqf52DH+fEAouCfooM0BzLmAF8cMey53d9Tt8OwgPFrjzUVlOLsCP8djwNTsbKuL+GKgTZZ5Mhu9LG82ggX93+5Yy/l39V9i+dl+UkrQ09iBrFZnt+urYULg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337298; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=HCC1Bj0ds8VpE2M603U1zvLp3zKKtAPXp9DANJJjBMA=; b=IWWRJOBRShmTfFGqcQg4+7ipwxL1imjE/INYwlCnVgpjTJ2fA+OvGGwlxV0isWaYI0QS/BJlfxFSz0iPeVV4k5a09VFhQ11/lDCQovdrQKrGmFlGQPiUTd8xGqJRGvG1XIh52x670c6Yd7+PVlF+jYjxukmkfp5GnU3MhdqDsO0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 175633729841245.70215695173977; Wed, 27 Aug 2025 16:28:18 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPTI-0005ui-Vg; Wed, 27 Aug 2025 19:22:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPT0-0004aN-B8 for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:10 -0400 Received: from mail-pf1-x435.google.com ([2607:f8b0:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSy-0004M4-Gq for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:10 -0400 Received: by mail-pf1-x435.google.com with SMTP id d2e1a72fcca58-770530175b2so327515b3a.3 for ; Wed, 27 Aug 2025 16:22:06 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.22.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:22:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336925; x=1756941725; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HCC1Bj0ds8VpE2M603U1zvLp3zKKtAPXp9DANJJjBMA=; b=Rjd+MYLQku/ErnSbrf70+UUsXajDcFuvzDanlYF4dc5wLDPK/ONR+xV5HCmFGjwrlJ +ACDT3h4Zqh2TEgfzGpt//m1ITJNT7NrDCWybJmJ8+NoBWmOz0GlLO1eFoJISikXKvQv m40oQEy7YeyE4cc8xtqZuphXh6WmorAXxukMpEi51/S00Mov2s2jipoN32UUgUT2rtAT ejdatou3tT35b0gBUTJhc3yaCP4Qg5wAqJfyoJnJ6z0t3hlUu8VY5puhUCnjaWdTDX/+ CCqsiMoigxJUYa3N3P4vMPBmFhZpvGd7gLPApdDFRV9LfVpc3XyGFtdtfaniYSjsgkB0 ruQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336925; x=1756941725; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HCC1Bj0ds8VpE2M603U1zvLp3zKKtAPXp9DANJJjBMA=; b=uyAJBszH7p8yKZJDTcKPsL4gKcAwDGHRofxoTGGG7Viv7qsKRjQS9ByDiTgj2XIfR0 BxAlcij4vNc91KDCaTxR1pb8OM7PfrzjPHwdZtpdEkYJL96QcIrwiDq7yNbz+pDzIKam ERIvgsgw9jeAqmObAcZ3Lbp0RLPQZUhjeHDPMgek3eC2tFlSVahqke8VumUuVN9OlVrh hDE3173d602BfS8Xj4R6NDHgQ19MM1BZFdB3pTloXY7Ow2MKVdM4ssGB3XASb+nk6rao tPlOxu+lgwIxwwXnxytoW5npF0OUhj9kPsGKHSLamezO+iS2g24HCKk82DDqE/vQyHTQ P+Iw== X-Gm-Message-State: AOJu0YyyEaFZSOhZzCxCqGOJld2DeVifRnsznH3hHMQY3a1nID1AKZqU HxbAz1AqlQkn3Amum/VlY44Fm5FcT/0Anw9g402/i6lXwev+XAK/yTTwhnoUn+W9vC9eqTjQrWP OOkdAaiM= X-Gm-Gg: ASbGncty8eeeEMp/0uzvrsTwIGHI/uffXtZkZ8XSbMy2RKZeqd5e/+gILo3Dbpdkz8h k3P4AEfjkzMR0pn4GkWT7osQ+8+crH7ezZbIWg7SiyZlT3AzKWnpD7fEfKE6H1EHGoWQLayj8FZ dC5R1pvbg9/LHpy3WcBIspLmrWAuImBsVZZRvm4Uz2OFApIWBCAYGF0CZGLn4bbntpGCn3VBHyH DpcZG4uxZVIzRWt3a9wyZkJXv5Ru694fqQY18qf6ZF4LTlsgbjsdzb72KSaTH8EzI675toEAVMJ p5waZSZSuEOseDP3cx9aU9j1gGJQrBiXK/cXwOaUcEk9RrRbDfcGcut/CzekwSeWlpCJxH8yWDa 05yEvr0sOsVkDLKhLtExwYdIRyA== X-Google-Smtp-Source: AGHT+IGaw1XB4+pBnN9OP4bwkaCiNsgOWjRr44xiFt0Q8w9hUm3MgbhxNWXnSdDQfBf1SdQlK16FmQ== X-Received: by 2002:a05:6a00:1954:b0:76e:885a:c344 with SMTP id d2e1a72fcca58-7702fad491bmr22429276b3a.26.1756336925456; Wed, 27 Aug 2025 16:22:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 35/46] linux-user/openrisc: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:12 +1000 Message-ID: <20250827232023.50398-36-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337300645124100 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 7 +------ linux-user/openrisc/cpu_loop.c | 11 ++++------- 2 files changed, 5 insertions(+), 13 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 3f9ec49359..03c9539774 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -673,12 +673,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, const CPUMBState *env #define ELF_CLASS ELFCLASS32 #define ELF_DATA ELFDATA2MSB =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - regs->pc =3D infop->entry; - regs->gpr[1] =3D infop->start_stack; -} +#define HAVE_INIT_MAIN_THREAD =20 #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 8192 diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c index 306b4f8eb4..8c72347a99 100644 --- a/linux-user/openrisc/cpu_loop.c +++ b/linux-user/openrisc/cpu_loop.c @@ -83,13 +83,10 @@ void cpu_loop(CPUOpenRISCState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - int i; + CPUArchState *env =3D cpu_env(cs); =20 - for (i =3D 0; i < 32; i++) { - cpu_set_gpr(env, i, regs->gpr[i]); - } - env->pc =3D regs->pc; - cpu_set_sr(env, regs->sr); + env->pc =3D info->entry; + cpu_set_gpr(env, 1, info->start_stack); } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337033; cv=none; d=zohomail.com; s=zohoarc; b=B1+5cdFeray53v9NVFdko9I+n/kokknQK77hKU9OSzcdXkoSVImG6M/nCq+b/1sSLygRu1y6STAeHwJU4k2Q10pVv/fvRgnwv3rRaqq+99NcWxbI7VnJaFIaLGGLlI7izzBib3cQY4l69010/Ed/zoVOOe/POkgvlD1SR0vOrYU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337033; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Qgx7jPh2mv/gIUiwJWtq6P9AJ4NMIrU+C1ZhQ4Ea56Q=; b=TFIeTYInWA3UYsG4lBv4/2IfL4BW2ztsnEEoUncT6NPa1xfOxvN5f6b9Nx4Hc3sNkVMUfuvUs3t7g/n9HT76klxkuqNiTs5djbdBN2encboWQ12k7t6ok3QoBl8T46A1Gu7km6ZGTvctHHlNcE2OlVJXzbbuWvqCW62q9otZ01Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337033461203.3874198571898; Wed, 27 Aug 2025 16:23:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPTG-0005bk-KR; Wed, 27 Aug 2025 19:22:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPT1-0004cJ-4Z for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:14 -0400 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPSz-0004MX-6p for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:10 -0400 Received: by mail-pf1-x42f.google.com with SMTP id d2e1a72fcca58-771e987b4e6so322363b3a.2 for ; Wed, 27 Aug 2025 16:22:08 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.22.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:22:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336928; x=1756941728; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Qgx7jPh2mv/gIUiwJWtq6P9AJ4NMIrU+C1ZhQ4Ea56Q=; b=amEG5UHPpQnxN9ImOl1J4LI/fx4LEL+gTHW0Mnz3/gP8jf1NNL3aujhvlVAjZ1RJm4 HxwPxOV026eVjNlSVtDUFXJ3fFjCmIIUXf9TI5uQtnjNqM6nyckDrD1ZVK9xA9a7z1ny 9Z40DZr0wYnty5RrZn9i6naT5Zt96g5e7Ds11OpWp/RezEUvOcklAoxceSqBJmLfgPmY 0/hrjm/4DMaCFdYUYT6nfXAbdlSmlUVG2zGanZuW2ng81zPj81MTi8HHfCN3N+8kcisi PqVq41gmbRjOnenfePB9dSITa8JPZYRHBbIJ4HG/D2MklNvlOGhRZcBRrz9TVYcrbm6O Sb0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336928; x=1756941728; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Qgx7jPh2mv/gIUiwJWtq6P9AJ4NMIrU+C1ZhQ4Ea56Q=; b=xJilFEgZ/xcGWQp8CAiZBSlquGn5xH1rDPMMyL05S5jwX8COoLD6jizuAplLV0YHXu xuVwmL0l2Bd3eeMKKGx1XO+8hPIUj+J+ztXrli0P4oyC2IELmm6aRtCUvYOZ37TRG+pk V7af9hSkfd0hU5dWt95SNY2Uf+roi1dJHx3nfL/XAiCazgGe7qQTUJrHpPLajmsUj3FT UVcWjYv0EishrHohpzwwyb8fWaEtmg9XsnAfmOxchN5/K8JRYE8BdmJWjR5IQt3o4y8y pn6b9dhuZXyjv4F0A+OnJQSIf7ohdN1py9WUGIddZrMBiWhynmvGkUavTVzEZx7ZEns3 QPYQ== X-Gm-Message-State: AOJu0Ywu98bqJyKmn698V9mEafebxa6qza0ktHoMg3pykPCl5g2jam9p ueSi5DZAg1OZrp78fxxREeflaSy46PWSWH/yP+eY5e6ZIRsz5qH4PdBfGSFEmDpjsNZPKtEc7hK DU7Ic2sE= X-Gm-Gg: ASbGnctfxoxtIqfEgfSiuaA50rsPeQC9LIyK8RMnhItqACsYdGy/MYuYLEVDIcCWc+0 iBgedeiglLDQR2OM4JxzUcJYeCZWHAl0VnFFgJnBLfutbZynBlkupIWQcMQ1lwSbCTFzkqM6gOE uy6hAZYwfplUwn8MV/j6fp7603cPO87iA6zVlmWYrah62Kfdoq+AvxArHrck0FgUMrwx7rVsdk2 T23nUoWU5yp5R+R94rdM+QPW97Oj4FWHbrnMwoleaR+fjzPxZaxo0O/LbA8kYuh1AaPIDGUKxku xZT+vom2WM0+WtHYAnkU2Vq+PyM9S1TcFbbxtiOrWHqAEUrmmtpAxB0TRHA9vzQ3d2vspsMFkOq vBzGfrM1fTGNBlreBFtBj2NnvYQ== X-Google-Smtp-Source: AGHT+IHD+1P4JiimYsILlZhVJMEZYs564va8n2obc7B5ihLMUOXxsq6/pbEhZLaL8bQDlxDXu5/etw== X-Received: by 2002:a05:6a20:a104:b0:243:af34:8f80 with SMTP id adf61e73a8af0-243af3492d3mr116634637.33.1756336927621; Wed, 27 Aug 2025 16:22:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 36/46] linux-user/sh4: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:13 +1000 Message-ID: <20250827232023.50398-37-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337034607116600 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 8 +------- linux-user/sh4/cpu_loop.c | 10 ++++------ 2 files changed, 5 insertions(+), 13 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 03c9539774..8604308a31 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -701,13 +701,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_SH =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - /* Check other registers XXXXX */ - regs->pc =3D infop->entry; - regs->regs[15] =3D infop->start_stack; -} +#define HAVE_INIT_MAIN_THREAD =20 /* See linux kernel: arch/sh/include/asm/elf.h. */ #define ELF_NREG 23 diff --git a/linux-user/sh4/cpu_loop.c b/linux-user/sh4/cpu_loop.c index ee9eff3428..259ea1cc8b 100644 --- a/linux-user/sh4/cpu_loop.c +++ b/linux-user/sh4/cpu_loop.c @@ -81,12 +81,10 @@ void cpu_loop(CPUSH4State *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - int i; + CPUArchState *env =3D cpu_env(cs); =20 - for(i =3D 0; i < 16; i++) { - env->gregs[i] =3D regs->regs[i]; - } - env->pc =3D regs->pc; + env->pc =3D info->entry; + env->gregs[15] =3D info->start_stack; } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337125; cv=none; d=zohomail.com; s=zohoarc; b=X+O6QfTKmxZpq/V+CtVp3bg16DjfqiGY2+GH7m69K9FrPsEf/L9xkvD7HT9qyMfRrqpm+l3FakFnlKub67pSUkPdJBeop4cKMsqXBJjqI25To7zy5o2YXrFpcKVAKl/+MlZdrZrtsr/fjfTEKDlnZj9LjPrHjvYPxpUmf2axhqk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337125; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=OeGroPrnRpObcnV2bOJGVQoai493yMe+Cg8ch1Rprt4=; b=gF9TxAH5WsnN4OO6N9GMVZN7hbeuBlw+d1nOR2iiHgjRXpis7DL4kZHOKrq7fmGti/hyx1LV+9q08AMYW93GLRgSdomWApESdBXXIdTR3KPNPoYQf/ZGllGcz4fmwTRgLJLfwjY/Icx06BIZUQN3MRVXSHRhIYNL4ku7NChcID8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337125924441.29433309553326; Wed, 27 Aug 2025 16:25:25 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPTL-00064t-Lj; Wed, 27 Aug 2025 19:22:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPT5-0004iZ-3G for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:15 -0400 Received: from mail-pj1-x1036.google.com ([2607:f8b0:4864:20::1036]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPT1-0004NJ-M8 for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:14 -0400 Received: by mail-pj1-x1036.google.com with SMTP id 98e67ed59e1d1-32326e8005bso376143a91.3 for ; Wed, 27 Aug 2025 16:22:11 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.22.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:22:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336930; x=1756941730; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OeGroPrnRpObcnV2bOJGVQoai493yMe+Cg8ch1Rprt4=; b=fF4jMm2dP7h9cApt4YF0SovC2Ty6Wzkko6ej3JtWJ3cMn6XOzQu9tv9SjBHvSXanGG MVjRAS/DE/Zm7MdGIG5WYM2Kvdagzqy7QS3m+edLxc8aRwtdoK24zr3xfPP21jtSkLuu 3/tkYYzTDWP6/A3bMe3ytLoQdukw43Hfaj36jUTVav2aczXRFz+xnNHLTpvq7zz24YrR eKKiLtROUeyqYa3IS8wL0BCaaluzyAaoui59qkDYQGPlyB1GtS1TNdkxq/+MOaUb1a6R QkO0pSOPBKEhr+/psUs0Fsxtw3MNcHvYEss1AGKptsdSGl1ivhgQwcU9Lmgqf5QbATM3 ZZ6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336930; x=1756941730; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OeGroPrnRpObcnV2bOJGVQoai493yMe+Cg8ch1Rprt4=; b=sKe0iO4huf/VKzFPJOQIpQO1PhEUX29vRcBBvjxfnnerjLXWSJ972bD82gNCpL5mfB N1f96BiBv6XpO506JZQ43RuJofYtNnPcIynxyoJCY7vo1S6nUOe780XwxHgkex8wmyOX q6JnEoEZ4A7s51eXL+GYlaPUEyWWyIbf1HMJUz4LAbCyKkCGlEXzkDBTvmPCrQThBD73 4Ga+9k/o82DhGmXHRhYTmhmkyeGv+jsG703AAF2/m0nUwiAH5AIlqgcrbZJUt5cnTcRT ZnNzn0LYl+RP4W5vDXfAeg1VWoGuveAOpxfmFIi/u6tffRa3m1scrdbNaY/OfRC4yhvK VN3A== X-Gm-Message-State: AOJu0Yzs7+knAKUX44AELUxiaj58h7AjTnD33XalzcHUshLFhhtFKZU7 8E4XO+B5LWw5YT96gdO/3+bcykj88614MNf9pk7sHy5nqMcxOh4TZsue2jM+oSGagkriWTF78mh EF6EPAws= X-Gm-Gg: ASbGncsTObgUA8nCM5iHZoi8Ntydh5xyNEXsVuiaRUgmYkJEJvuUti+SYVJqLYxV908 AQotaqoUxrV/1HbvF2qadTPtKHFqP/KDZCzhQf8EGlSczE2d1Nh4ew0pAGlwnuAaNQjaoDKE7dC tl8BQe9zIXPcPmkBUYhSoaN5ophK/7qYH3qfntzWQyme1koEIkgAcy5v+xD35l1np9+g05r9p5V 4WdBYxZj2ynfSa0nFeeN9551bwceMM3f6/v18jtcRg/L/FdhY2eQOanLX5qZwAv4ETaVc/eM1z3 Wd1YgN4r57QD/ef2uVLS+ui6PKPASRDgAG4Kw8F3xAzWpcmJSvVDxWMWEkEDdi6YYirQFq+Kvyd hN0nhVrUxOBU5Ux51cEjQeSQh7w== X-Google-Smtp-Source: AGHT+IFd8mm8fHQLlU7tcgIv1imhaJETIj3uVCQeZNSw8TdIjaSkW9GsJ3AXY3Ys0fQT126SfX8kSg== X-Received: by 2002:a17:90b:58ec:b0:327:a04b:aac with SMTP id 98e67ed59e1d1-327a04b11e8mr2128141a91.24.1756336929904; Wed, 27 Aug 2025 16:22:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 37/46] linux-user/m68k: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:14 +1000 Message-ID: <20250827232023.50398-38-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337128839124100 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 11 +---------- linux-user/m68k/cpu_loop.c | 25 ++++++------------------- 2 files changed, 7 insertions(+), 29 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 8604308a31..46150586af 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -746,16 +746,7 @@ static inline void elf_core_copy_regs(target_elf_gregs= et_t *regs, #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_68K =20 -/* ??? Does this need to do anything? - #define ELF_PLAT_INIT(_r) */ - -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - regs->usp =3D infop->start_stack; - regs->sr =3D 0; - regs->pc =3D infop->entry; -} +#define HAVE_INIT_MAIN_THREAD =20 /* See linux kernel: arch/m68k/include/asm/elf.h. */ #define ELF_NREG 20 diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 23693f3358..aca0bf23dc 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -92,24 +92,11 @@ void cpu_loop(CPUM68KState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - env->pc =3D regs->pc; - env->dregs[0] =3D regs->d0; - env->dregs[1] =3D regs->d1; - env->dregs[2] =3D regs->d2; - env->dregs[3] =3D regs->d3; - env->dregs[4] =3D regs->d4; - env->dregs[5] =3D regs->d5; - env->dregs[6] =3D regs->d6; - env->dregs[7] =3D regs->d7; - env->aregs[0] =3D regs->a0; - env->aregs[1] =3D regs->a1; - env->aregs[2] =3D regs->a2; - env->aregs[3] =3D regs->a3; - env->aregs[4] =3D regs->a4; - env->aregs[5] =3D regs->a5; - env->aregs[6] =3D regs->a6; - env->aregs[7] =3D regs->usp; - env->sr =3D regs->sr; + CPUArchState *env =3D cpu_env(cs); + + env->pc =3D info->entry; + env->aregs[7] =3D info->start_stack; + env->sr =3D 0; } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756336996; cv=none; d=zohomail.com; s=zohoarc; b=J/NkGGJDimcvtH2UYeXU3lpEAO671aSlIIcypTDr2xC9n3i1ClofNQbT5+6YbrFmbfCCUJw9qzhXfKUtPI0HIAXDttgY6UiDEKVCkWf28GvhMaeKRhUgcv97BCmxnmNZ/li29U3k/CtNCM2bYeBrt7uVo+//gNAz2RzmOng/uOc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756336996; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=0rY2E7Jr8J8yMWkbd0RU0/ukH6+5hs0u0rTGs3Urkec=; b=DaYjElEFN58f9jc1qNoyXnZLSimik2LWwSUGL4R4Pbe5sCqKaAaUi3MQ+ek52v0vqpZDJj7a9zmfzSgSyp0PD5cS7lLJEwkVh3V27YBSZhHEx8GkDXnhT0Td5G3Mq8ACUCdOjLKpTdKeRAB+zwe+F7w0XoEk9rS1j1uBplwsrPg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17563369964281003.7282632590911; Wed, 27 Aug 2025 16:23:16 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPTF-0005YK-R6; Wed, 27 Aug 2025 19:22:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPT7-0004qz-Rw for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:18 -0400 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPT5-0004Nv-Sp for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:17 -0400 Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-76e6cbb991aso394503b3a.1 for ; Wed, 27 Aug 2025 16:22:13 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.22.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:22:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336932; x=1756941732; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0rY2E7Jr8J8yMWkbd0RU0/ukH6+5hs0u0rTGs3Urkec=; b=FB9tAI1TLVnHWjLr0BfJ2jq/OGRiwDFvslqq7W9+KCv8IkLQXqJnjj7Y8AZ319CC1a TlqF8kZx1lsJGVlv/KLMi2L4zJVAL8JS9yQfLZholjksplT8GshQKziaZQzSrQjkoBbK ti0HABvF9vPTNQyZtYPYC2FGnO8glzCaJN7oPiOWZla22+v93ekHyYuD06EA25ATyLk+ yVOfTXxwewFfrRdfsl0Hjz7fF/gisV7T5X9/Z0GQFouXI11liRxCCOr3KwoPtO4qfKwn E87/TDdYuWe54USQ99IQTqO2Xem3WhmPCv6sjl86r3QzzTMIQ7rl3gmZe8UN3aE7xKMz BV5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336932; x=1756941732; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0rY2E7Jr8J8yMWkbd0RU0/ukH6+5hs0u0rTGs3Urkec=; b=mzH9BIl6QK0csbNNtwG69mIS+Pp6GD+o3vBNqWT7DIOmcuacyMBBr2azIDftaBx7p/ qr6Y0aKLVLYsMkVjOmc/PfT0c9p/7S4GdyfC1PcYPXdpNw8mhKLtaw5uDIDqKiqTSHKn FHnE3mo90LOQBnYr8/JNJVk61GBZjrw9zrFNpQLt1Da4FBUufxq/I2KhokuhBMYWGCkt oKGFB+fIqTIQwSoFfsB01M8DYFdgczPwEbFYCCcIYqAYU/2h0guiVgfpnc59fObLBhMc uRxug63Bah3k5SewMPkbgk1Fln71syXnd1XrbWQa35UAlgRg9FZMAoz/s2wAOhWbfrMf 3JUg== X-Gm-Message-State: AOJu0YwZZHaXSOjAzFPQNUaZDVsJq7dlsJ6zPLLi3vX35lJ+nO96ImCr Lowg7FDaKWtpoolWs4xRIzx4nE/AOpb1/qPVMksyMekajXfIZvOIgt9DIF+76Cg8R238wiQ0tFk +NFuA4AY= X-Gm-Gg: ASbGncvU08XLWYyKPMrubpisK+dz98Bycih3Wv+2+Y5ooDI4bQT+mTxIb1o/CWvMr1e 7us8tghClokGR8Pb3dMRBLKCtR2O21CNT7Cj9qs/Os9KYs50POB2F8ZMuxxDP7X0j5D9INdf7OO cn2Y7jW9t2WSGk+mbg62NshfXxqxIiNp+hlt8htHgN+iL9M/LJaPVT87YzjtKYPRqG2bwI7XLDa 8m6zJ5Z2O6XU4Chbycbg4QSwELQbQPFKqoIwQblyBp0iB9qq6ubRnOJjcBT4XTRTdBy7bq6eqmw XD78c2WDc2A17ievY5OhfNCxnPCnKV9S3WdAvRNolCIGOiWZ6CvQB4HKoBTncfNfDd1VUlXH737 eCtWU/dkdnSGH4c4KaMTfJmwizdQCRxUNvGIH X-Google-Smtp-Source: AGHT+IER7pHI11tA4+QQ85S78/vK/lnRXOaTm1OeawnT3eJabWxzR2FWKnebrT/IR/bhFs/X7Rtf+g== X-Received: by 2002:a05:6a00:3d0a:b0:770:48d1:e7b7 with SMTP id d2e1a72fcca58-77048d235c8mr16743584b3a.30.1756336931984; Wed, 27 Aug 2025 16:22:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 38/46] linux-user/alpha: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:15 +1000 Message-ID: <20250827232023.50398-39-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756336999144124100 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Note that init_thread had set ps in target_pt_regs, but target_cpu_copy_regs did not copy to env. This turns out to be ok because alpha_cpu_initfn initializes flags properly. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/alpha/cpu_loop.c | 11 ++++------- linux-user/elfload.c | 8 +------- 2 files changed, 5 insertions(+), 14 deletions(-) diff --git a/linux-user/alpha/cpu_loop.c b/linux-user/alpha/cpu_loop.c index 80ad536c5f..728b64906d 100644 --- a/linux-user/alpha/cpu_loop.c +++ b/linux-user/alpha/cpu_loop.c @@ -173,13 +173,10 @@ void cpu_loop(CPUAlphaState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - int i; + CPUArchState *env =3D cpu_env(cs); =20 - for(i =3D 0; i < 28; i++) { - env->ir[i] =3D ((abi_ulong *)regs)[i]; - } - env->ir[IR_SP] =3D regs->usp; - env->pc =3D regs->pc; + env->pc =3D info->entry; + env->ir[IR_SP] =3D info->start_stack; } diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 46150586af..a7de852d4d 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -786,13 +786,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, const CPUM68KState *e #define ELF_CLASS ELFCLASS64 #define ELF_ARCH EM_ALPHA =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - regs->pc =3D infop->entry; - regs->ps =3D 8; - regs->usp =3D infop->start_stack; -} +#define HAVE_INIT_MAIN_THREAD =20 #define ELF_EXEC_PAGESIZE 8192 =20 --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337277; cv=none; d=zohomail.com; s=zohoarc; b=FNXVL00UJib6kuI8OzbjX/VGhjkWhZSQF6jHuIzvrpfalJNA/1QRzx77DJJdKcv/kh7tEOiLmeKZV29zkGgRaNgKIcGn+kp+fW+RyDpPCj0+DPI4R6h7afIq+tMi1U3KZNIT0Deu0Cg3gsnP3DN5ihOZMO+rYjA/078m7wCcVKc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337277; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=pUBD8oIvbmmAV90/hCSe5xxGHDkQPpbW/W14D5nKNic=; b=HMjARnTjrSIOAENwj9Gnz4CiJZ0E5lKEhkscVthuWqFQOjAA21ZXprKzpU6w/3YkmCD0h08C4Wjnh3sCl+ZosS+Xs1Eh7qQntIL9e9wMWAjGY7NWxvsOhZW+qv/KoefsgDkbsk0WYJUBkEnSzFaX+KDyPvfbH9VHX2zVL0JoPBE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337277989915.1023380827543; Wed, 27 Aug 2025 16:27:57 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPTM-0006Jf-VE; Wed, 27 Aug 2025 19:22:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPT7-0004sc-VR for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:18 -0400 Received: from mail-pf1-x42c.google.com ([2607:f8b0:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPT6-0004Om-0p for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:22:17 -0400 Received: by mail-pf1-x42c.google.com with SMTP id d2e1a72fcca58-77053017462so310952b3a.1 for ; Wed, 27 Aug 2025 16:22:15 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7703ffebd33sm13986886b3a.29.2025.08.27.16.22.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:22:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756336934; x=1756941734; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pUBD8oIvbmmAV90/hCSe5xxGHDkQPpbW/W14D5nKNic=; b=v64bCHa4qxLrU0ssmIQrb95p71OS+Htig7Jwe/cw1YR3KKqpwrS4DM2AZPgPzHiQgQ Jh6IUyoJ596fMephntTw5tZxcLLT1S4Iz4WCd90ypTANfh5hWqCzl8kOzmceQnPo4E+e Ab2RMbPT+th030sM3Qkxcucoklq1G4HM89FWHw8h5QRm0+N3DnfTcXpZXUPajR5RPdvo 4t2htfn9NgJYzBS4jpgq6TFUGfnahD6NzVHuRBFZFzViASumZz4e2u1HYO9skLk89HvW 8k9cZ2y9ZN2algVFLcAZi0DU6tSbdoBkInJVU0Xx5vG4xzVLr2sZdWoGsVYKUPic3qMi 0mew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756336934; x=1756941734; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pUBD8oIvbmmAV90/hCSe5xxGHDkQPpbW/W14D5nKNic=; b=RN9hM+mjD7ljr7umuBp9zFUzGoW9a9zzu159Tksh+4dvPFeFpG8X2+QTxnFYxVSc5A lq6juYg+/r7tzb9xNfrf+28KD9jnckYxorpw+LtGfVYpWh6ycN36JPs5uTEUI98Lkm9i XsGXKE0gQhMKnHviz6BbE2QPvBL4GTcrN3lDB6eDxehLx21q8JOmHoA1qCplLI620LYh txi7gRROSsemorDvXpAb6xKjEMmRliSmMjMfONRDLNdUhzVKhZ5IHXm/J0WV6J+WkfeF tT6yI4VcbywUPQc8ONi2ywap3Ubd/hI5zhJ0AsPO/pCTYHNI80RdE3s3xT5+uWFQN/Yj JXVQ== X-Gm-Message-State: AOJu0YxhIRodfdq1+aHtHvq4XchYM77SBN3ogupsdA0m0WFLmt4R1bQs 5m/HpwPb1OXtpspdu2oA6/GDkmoHKgAAapZB57BZLUBu8SbG6Uadw38y97xxbzxDgnN1EIP4rJ1 2mMqttdE= X-Gm-Gg: ASbGncsTOtWqisCYTQ9c78dCxlcLa4yiqTGqkAuI0W0rGNfBo/DPnMr+ckqavCXRb6V abhvpLvcYed+i9Vg9T1ttgzhg/gjpXOXjvMb9GkdB023O8GQzHg1UdB0qgDaP2Uce8OjoT2KgVE KzbXQPmO2LX5Crg5p1PwH53T7fncKu6VbV6IF8H2+TDIQc9se8uPrRTs/CdQjoLGTsTGhCyRioN wjZ61u1dmtrp1J11vh+cw5uTqcBJ6onW+8OWh2DsX5JmbSTKjYC5OgL/3jvPBI8WKuqAe1aeFkU +A/gTNkFA8cDrbjSp9YqV4D20qgez2Uw6vXz2zqwthsC1KNYDTKHLUYSxhjx/fA0Ua3lHrpsDCL yUvHSz0N3825ANBQuaSAj3mhhuyjQuk0Ge9hT X-Google-Smtp-Source: AGHT+IFAWe9GyDC7Do0OEmT+c0OUJI9GFafwndIiAG9itS0tp005sOu099By8eKI7H6/AMznTI3pFw== X-Received: by 2002:a05:6a00:9288:b0:76b:d67b:2ee0 with SMTP id d2e1a72fcca58-7702f9d7f70mr32610187b3a.6.1756336934485; Wed, 27 Aug 2025 16:22:14 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 39/46] linux-user/s390x: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:16 +1000 Message-ID: <20250827232023.50398-40-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337280417124100 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 9 +-------- linux-user/s390x/cpu_loop.c | 15 ++++++++------- 2 files changed, 9 insertions(+), 15 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index a7de852d4d..16aa09214e 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -798,14 +798,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, const CPUM68KState *e #define ELF_DATA ELFDATA2MSB #define ELF_ARCH EM_S390 =20 -static inline void init_thread(struct target_pt_regs *regs, struct image_i= nfo *infop) -{ - regs->psw.addr =3D infop->entry; - regs->psw.mask =3D PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \ - PSW_MASK_MCHECK | PSW_MASK_PSTATE | PSW_MASK_64 | \ - PSW_MASK_32; - regs->gprs[15] =3D infop->start_stack; -} +#define HAVE_INIT_MAIN_THREAD =20 /* See linux kernel: arch/s390/include/uapi/asm/ptrace.h (s390_regs). */ #define ELF_NREG 27 diff --git a/linux-user/s390x/cpu_loop.c b/linux-user/s390x/cpu_loop.c index c9124444ed..49e44548f8 100644 --- a/linux-user/s390x/cpu_loop.c +++ b/linux-user/s390x/cpu_loop.c @@ -180,12 +180,13 @@ void cpu_loop(CPUS390XState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - int i; - for (i =3D 0; i < 16; i++) { - env->regs[i] =3D regs->gprs[i]; - } - env->psw.mask =3D regs->psw.mask; - env->psw.addr =3D regs->psw.addr; + CPUArchState *env =3D cpu_env(cs); + + env->psw.addr =3D info->entry; + env->psw.mask =3D PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | + PSW_MASK_MCHECK | PSW_MASK_PSTATE | PSW_MASK_64 | + PSW_MASK_32; + env->regs[15] =3D info->start_stack; } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337203; cv=none; d=zohomail.com; s=zohoarc; b=WKplpQTrY8F6+HhC2kSVbtRT/0h4Pm9Fo2hnnaq4R9E0Sc/RHxMWMnqKiTkr8tNWfpOfw3pbaxX/kz3s8mqizb/fsmcUpvKFFNZ5ENWZr0n4XZ4p/86MlUp+hKdQboywc6kN5Ksxfn9XtJn8mnuqcVLJU7U1HHjQGT0jq/TtjvY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337203; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=F4kf8BI1YPBOaTtnCkPyQ8GhVkj2Nhm4gjasXIKyLdM=; b=cRsMQsE9o5r1sQ+dHMc428TXK8Xa0M8gwzhqR3YfmzLBafNj9zpZa/I+Fj4qAcLadHSAkiFHuF9IK4Ox0E+nunl0nSbRR9290lvv9k785AFMwiX9b7PUA1ylV9BMxd34oj6eNxqMB7owljHxmRSavn0awre+dbpUi/DoWIyhVrU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 175633720328134.17215762646913; Wed, 27 Aug 2025 16:26:43 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPWR-0007vJ-U7; Wed, 27 Aug 2025 19:25:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPWO-0007lt-Jo for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:25:40 -0400 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPWK-00058Q-Va for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:25:40 -0400 Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-248a638dbbeso3326245ad.2 for ; Wed, 27 Aug 2025 16:25:32 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-248cd627e40sm7282025ad.94.2025.08.27.16.25.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:25:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756337131; x=1756941931; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=F4kf8BI1YPBOaTtnCkPyQ8GhVkj2Nhm4gjasXIKyLdM=; b=iQJmBHFEUaffVuucWX9G6NW1nZUJMtqubPHM7TB+ZohBt+KAXOfYFh6s27G3ZcKVsr PG/yzOgJQoDyXEJ/x0+23eNQb/ABmh+Jo8VA9rMZawPiuUFnL2+9RE2M6he/kZ05LXCA vcPxMQ5hmjhR2FJ3Aqr8AX8kDaHNsoVATI5IOcZwB0IciPbv2xbTPMYSvdWCGszSCd69 y+HdcPk2+0/VwnPRbgFAgOsGYWFU7JRlToW3bmRK77JQxrX4NQ5VL2nKz1uRXn7KdKCj qTvG3ksTLP5YEmBqJMASK6dLSpjijWDLLC/d3bG46G4y/H3Nt2anOPsXRYUE7H2/s6H1 4L0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756337131; x=1756941931; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=F4kf8BI1YPBOaTtnCkPyQ8GhVkj2Nhm4gjasXIKyLdM=; b=lBZ+k9KmlicVqbc/D3m0uH/K7cnCkhxI/8APRhwE8QG5jnKJvMnuhRK1PaI0glDvbd F+AB2pYMN/xOLGW/NfuEYtnMy3vR4T4Sn9igvsQPDvBLno+gB8obvYJcx4b/OGAn6sYW PDDIIOPpTRjzZBELZOPx0TVb1X29WNxJNvVEJkzcn7DbTih9zCletWt0/vqWuHamFaPh q9qAUZApYrUUJQtP2Iug3OhTfERD9KD3JCbTyqJppUa2vFbxrdxAiGkeR2ggCAW+M7S5 OkrrU62c1f77wsA/ayVCeHdezKxvlcXyIZ9DCz6dBWLXY2FV5tdCuMtjddHkhPRwpg9J Czqw== X-Gm-Message-State: AOJu0YyeU8bMWVVQ2VE4PkLobh0D2Asb3l0vttDsqfJzzwwNlcftMgMo F0cGNQSKklwxf4uXMFGr9EJiAAA1Ewp9J2vh6NOq2n3bfqgWoDCp23nGBynRdAQns9jZWOPH3mx pr55TpD0= X-Gm-Gg: ASbGncsJoMbQJaP5GW+py+lgOpwLjJgso3Nr/kdNLFnrCZ3v4rSIgfVWOattWCL/rEU bbq66XqPY6jpJ1OZH1lZMoni8xeDtd7yqmMOUcxY5ZtvTFTnEMBkGHeJrBO+FvLBG1EsEp5EfIs SSP2LAZC8H4NsGQSYyFMZqosQfHbElhMpMrZjAMqD6PV35eEZEbaTijXzgCW6LWT+okTnSzwnc7 xBUfyH9O9j3a803IeyLKJ5YJVfSIr5zXEUfTB9Hg9e7RU0mhmXSf8AM5Fr4+OmXnlrt7t4qUrd/ pCEmDxNFMKcl56ywfDHxw/mNVo6qB0yc67S7MJQbDjIfsZqLl9XG8P5UXxSUUb4TgOwfq32laxF zVw5tMUjn0Xi41msbumoRDAz4LX7L47kVtwiX X-Google-Smtp-Source: AGHT+IEea5JafBzdxn9y+gTbwnPJRFUjUMGWvzVs9IqX+sdOb/qchRvoVEgvJoVnRKJyvqD1JPYeNA== X-Received: by 2002:a17:903:ac5:b0:246:a132:8edb with SMTP id d9443c01a7336-246a13291b0mr179985635ad.32.1756337130702; Wed, 27 Aug 2025 16:25:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 40/46] linux-user/riscv: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:17 +1000 Message-ID: <20250827232023.50398-41-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337204897116600 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 7 +------ linux-user/riscv/cpu_loop.c | 10 ++++------ 2 files changed, 5 insertions(+), 12 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 16aa09214e..556f11d720 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -849,12 +849,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, #define VDSO_HEADER "vdso-64.c.inc" #endif =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - regs->sepc =3D infop->entry; - regs->sp =3D infop->start_stack; -} +#define HAVE_INIT_MAIN_THREAD =20 #define ELF_EXEC_PAGESIZE 4096 =20 diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 2dd30c7b28..b316281532 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -94,14 +94,12 @@ void cpu_loop(CPURISCVState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - CPUState *cpu =3D env_cpu(env); - TaskState *ts =3D get_task_state(cpu); - struct image_info *info =3D ts->info; + CPUArchState *env =3D cpu_env(cs); =20 - env->pc =3D regs->sepc; - env->gpr[xSP] =3D regs->sp; + env->pc =3D info->entry; + env->gpr[xSP] =3D info->start_stack; env->elf_flags =3D info->elf_flags; =20 if ((env->misa_ext & RVE) && !(env->elf_flags & EF_RISCV_RVE)) { --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337269; cv=none; d=zohomail.com; s=zohoarc; b=HdPEmdP+bUIfRcSo0x7gfxGWTllfWlBZ08HgJVy2SicM1gxVor+HNl67Pkg8mfx6WEm2qqFt1bzfH5jUeomPqPlLNoxe+9K4Nq+7xLjeYow9NkDjXzmDF0XWsE9oX+C5goYeE9BAV/Dceq9VauVeVf3N9aahIGRMoAbVa1gJy5k= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337269; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=DcKY3nbqGoTt331KVt3AQH8Upmaeqmua001Bsshfz4I=; b=Fmqn5lD6iS0JGibCsy8Uo+yWNyF6UulLAAWcwclxuxfxCiIUDapZAuQ1W+4KVJe9r6VklnmXGYqC2bvUvCrmwW7lzCIGDUz5yCnQ+foLEOpCYYH/O1SH2LaPOEhXRgydsIo6PW9Lokyv1f3sfOh1oF0NPFZhmQxS6NoiUt6csbQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337269012760.813100191778; Wed, 27 Aug 2025 16:27:49 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPWW-0007vj-MD; Wed, 27 Aug 2025 19:25:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPWO-0007lk-Fk for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:25:40 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPWL-00058o-6T for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:25:40 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-b49d98691faso313701a12.1 for ; Wed, 27 Aug 2025 16:25:36 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-248cd627e40sm7282025ad.94.2025.08.27.16.25.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:25:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756337135; x=1756941935; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DcKY3nbqGoTt331KVt3AQH8Upmaeqmua001Bsshfz4I=; b=AE3U/E/wuSpn4F3bQcFkJO9nWklQubn4YbrcCGSfF1iVqYB3BaH3S9eU9Pq4AGVw7m 58T/pveFR+a1jTs1ogxFxOTxACDWxPzWJBwrZneuzDO3439JiwdoqLkCPlu+BdZgsg1F FS3hMvrUU2IHBuNeEfZuh1Wrz4lJkwOS+QR5ArSt59Umzc0CT//+Vx2sWN02TpFt5Hv0 yko2TjuC9FA7pLpVRAnqY5gWkxZal4sgMseV7QrjKzPeeTFtvAvWNQbJcQVeVXeVC7lF 0L6Ew6QB750mXqsK6Ul2lcYVjVwjHSxRkVAa4EsonxGhB/iMcW1E4Jr3312ZLjH9Vi/A 1+8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756337135; x=1756941935; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DcKY3nbqGoTt331KVt3AQH8Upmaeqmua001Bsshfz4I=; b=gbvCdLZaVZrrdIlFooMi6rWefjDlFatgnZHdobjw4VI3WfgfqBjjBy82jpJiFxJ5SU yCw17NQYc9uTP3viiRZbvCcsZPGBUislIE0xsOXF5pLM2Zfe34GhOnRxGWPS1nMGXjLt 8uNcW2OiBHwWTxXKbDixkkk7Vfzc7guDvfTznxUCt4nx7p8MY9hBopbTti1h5oTdWjR2 oqJ9xHPvmsfmFmvB4Dmf7zXXnwsfej1w0WPrcyBZTdCDyqrX9nj7HiSB63v++k6QBK4p GuVRDshyE6G3ihL2Yx/sBDTp+jU7iVaifWJNmcQUmiLWYpNVjHWZ03FSom9kHbMgMAeg buNQ== X-Gm-Message-State: AOJu0YxN12kA58AnIZnc3bOZfhAsChk7er2B26nTOGzOjuOri8tw9e6L I6wwBoVnhfM70XbxBZQuMrbApdB+WqZpbqhns+OhvTMTVYABthcC7nB8VLtfaayzI7+rMrlSgmC QfVCHxh8= X-Gm-Gg: ASbGnctN9qbWwJuxOzgzYXa37V7MtrNm/ULsmVhGxMnJL8RnQbpsOq+wAKavFGtv93K FKT/2VCsn0lARY1Bzw3BjWN20xmQ1nNcnBye0pLf5hscL4CoujXQajLSJy7oOqeyy/hwqHgdqhP NXq5rkS3gLsncNYKJ3PlSPpdC4aj9avgm0vsaGPG7/U8RTp/QOoR6rubDEaUB1Tq7rwPfy30/6n pCAGgNp6Q5nGtkzEb3WGZb+B9M/Gs3duaTuQcIGi8pS4nMxvQFVht98XV03JW9xs9WZjG6H7dl5 g7RqCWRfEmQhhl7Ff3SpPZh+EUsjiCMT16YIF2JPj+rFuXbsuuVWfewi84jklXUBL6REJC4UZOL E8hG4NPmeEBHVoLIsb581tkBmcg== X-Google-Smtp-Source: AGHT+IGWW6Y6s5DROvpMGSxgL5+zVxyVvXLayJdTZF+qAfP+SXgwgidwsX+6/334SPci9GKr/dnB1A== X-Received: by 2002:a17:902:ef06:b0:244:9c27:9829 with SMTP id d9443c01a7336-2462ee0c6edmr246079665ad.10.1756337134843; Wed, 27 Aug 2025 16:25:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 41/46] linux-user/hppa: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:18 +1000 Message-ID: <20250827232023.50398-42-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337269522116600 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 13 +------------ linux-user/hppa/cpu_loop.c | 18 +++++++++++------- 2 files changed, 12 insertions(+), 19 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 556f11d720..4876e4b0a8 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -864,18 +864,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, =20 #define VDSO_HEADER "vdso.c.inc" =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - regs->iaoq[0] =3D infop->entry | PRIV_USER; - regs->iaoq[1] =3D regs->iaoq[0] + 4; - regs->gr[23] =3D 0; - regs->gr[24] =3D infop->argv; - regs->gr[25] =3D infop->argc; - /* The top-of-stack contains a linkage buffer. */ - regs->gr[30] =3D infop->start_stack + 64; - regs->gr[31] =3D infop->entry; -} +#define HAVE_INIT_MAIN_THREAD =20 #define LO_COMMPAGE 0 =20 diff --git a/linux-user/hppa/cpu_loop.c b/linux-user/hppa/cpu_loop.c index 9abaad5ef8..3af50653bb 100644 --- a/linux-user/hppa/cpu_loop.c +++ b/linux-user/hppa/cpu_loop.c @@ -196,12 +196,16 @@ void cpu_loop(CPUHPPAState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - int i; - for (i =3D 1; i < 32; i++) { - env->gr[i] =3D regs->gr[i]; - } - env->iaoq_f =3D regs->iaoq[0]; - env->iaoq_b =3D regs->iaoq[1]; + CPUArchState *env =3D cpu_env(cs); + + env->iaoq_f =3D info->entry | PRIV_USER; + env->iaoq_b =3D env->iaoq_f + 4; + env->gr[23] =3D 0; + env->gr[24] =3D info->argv; + env->gr[25] =3D info->argc; + /* The top-of-stack contains a linkage buffer. */ + env->gr[30] =3D info->start_stack + 64; + env->gr[31] =3D info->entry; } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337232; cv=none; d=zohomail.com; s=zohoarc; b=mDb/LEIwzzEabDcEgmQzo2WwV4jWHSdjXPaXXW7Aohx4nI/My5NMtTg25fyRN8dAuIXH6zwLLHjCXhk6OE0Rf13lMXuFOyqVc1y+IpjQhEBNWE/1QvnX51BlO68BtoDQtQQtEpn6E/dqEPN1/JS4AMZwYTYI1ZdYn0jmpiIbN3o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337232; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Tz5VaXvtV93wHMZKr+baduksZM5BuR3kgES/WJ5tu1M=; b=PV4yhTLdAGY7sMc627nC5J1dU4ic5GCRWLPcDKr94NrRAxn7TtHswPS5Dt7qGiwgBVIPIRFiZq+hVoD2Jai0j2HORLSRDUShWcmRSen7KVApdAGFwkzVxgneDz+te6eW63o3u+uuLtrveRuANsXA95o0/pNrD79CqXNSR/zSmqE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17563372320733.5599590390329467; Wed, 27 Aug 2025 16:27:12 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPWb-00082T-4Z; Wed, 27 Aug 2025 19:25:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPWR-0007vm-Pf for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:25:44 -0400 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPWO-00059E-Id for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:25:43 -0400 Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-24458272c00so4142305ad.3 for ; Wed, 27 Aug 2025 16:25:40 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-248cd627e40sm7282025ad.94.2025.08.27.16.25.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:25:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756337138; x=1756941938; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Tz5VaXvtV93wHMZKr+baduksZM5BuR3kgES/WJ5tu1M=; b=tnAvzTCgQF9aBzYdIW/+gMds8inRiwoROImMyX2ak2eRxMiLzW/FPBzD4NtT+vu1Zd gRFgabcIk1F1UlrEi8VQ/K6obdfQhJRIrqARASyjmbLffk00ppzkXvwKSOHrXl7KdVSb hMjAsk+dyCidmZufBr6CAtUI7YyG0pJ+SjJzRvLfKb5U7aMDTHzJWGHNmvLkrguFgS6J y+GxqZiNX4ELFB2H0YP/0epqsd99g8WGPw/LLTnhv2X/8HlVIGpc4ruGY/3AHxLZ3GTA omL3P+X2k3v9ih2idtclTVKWygowVXMJoFNnAPEidjYmETwlzfHRg41ihrag2ExQwdCd bHxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756337138; x=1756941938; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Tz5VaXvtV93wHMZKr+baduksZM5BuR3kgES/WJ5tu1M=; b=sVAy9s67ZdJQum55oOKC2xTfW9f0e4/CeO80SoCaEkcaWMSGdf2F3v0N+0BcIIRHpq reUc/ktqZ0egDycC48pnQ/zyri7lDoICEYHrktX7RvoC87vaiqv9NQ9uhkCfrkv3Ia9K WqdGi2vztrdLGaOE6Zmo1+77JkXwi8LvvynvH/cMBza8BtQySTUkAohTH4JauG1OXki7 vLsUzNJgPo0H0PwoT+4biQbOjcFhmbnoWXLXAZPt10wUhokqDriyHvQ4g/saNLyl3u15 utXPL79Npx9BvE9kXtyuuql+qOlXKXBgBMHvyZMQxcRLHzkwQwIf44SzQGhWE93QeqCN klMQ== X-Gm-Message-State: AOJu0YzvbJp0wgtIScDf5cJe40kqxwNznjYc0i7e8noUg/3O50Fha/3n G8nqWU+5FYZQqSOkRMdBkuGqYSbyGZPvjwfFEOfIa82z3Z1pMi+3CEiZj4BDsbQapvu1zS9VR+G 90Bhwheo= X-Gm-Gg: ASbGncsD3jwdBXvnp8sHTbmFVjXb4nxYkTiLIWjFR8taIJaFQ4sG2Zf2kdRAzjy4lNP 3PqRo4Dbwca3Ng0sMBiUsVaFc/3MMUjGntkXu2P7hMjAy3Amd88sm9KjHiDooScE9I9EiPZJXvk yCVLGFdJgDJnJdBeWwBSjhw6ggec7BbPfQs+BPT7nkyzhhmUDEhpDuYiT41SJSMlGwF9+8mMf3J PDanM5Y0NARN/PdT/L41mKeuVNnMtKETikfkkcTPZQ4Ps7go4zEPxb1Zqg5j7VFaCEPsnqkNiI+ qvrXkLFQQgxoLDhXEnmFVcV2ztrHwK4WrysOOfyHnTeQ13GXkwk+TviKDpG0E6lFwIMXOjK3KDM 13XSixMAtROOjnRrSEjn5B30NCf59+Z0DUSuw X-Google-Smtp-Source: AGHT+IHThR34inx67JKrwgXo7eVPcVZ5m53rYbS8EwI5SaJI07l34y3Ml+3irgHlaMadWlU4jyzgBA== X-Received: by 2002:a17:903:1ac4:b0:240:83af:e2e0 with SMTP id d9443c01a7336-2462ef93339mr297747995ad.47.1756337137795; Wed, 27 Aug 2025 16:25:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 42/46] linux-user/xtensa: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:19 +1000 Message-ID: <20250827232023.50398-43-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337233829124100 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 18 +----------------- linux-user/xtensa/cpu_loop.c | 22 ++++++++++++++++------ 2 files changed, 17 insertions(+), 23 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 4876e4b0a8..447a9be11d 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -905,23 +905,7 @@ static bool init_guest_commpage(void) #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_XTENSA =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - regs->windowbase =3D 0; - regs->windowstart =3D 1; - regs->areg[1] =3D infop->start_stack; - regs->pc =3D infop->entry; - if (info_is_fdpic(infop)) { - regs->areg[4] =3D infop->loadmap_addr; - regs->areg[5] =3D infop->interpreter_loadmap_addr; - if (infop->interpreter_loadmap_addr) { - regs->areg[6] =3D infop->interpreter_pt_dynamic_addr; - } else { - regs->areg[6] =3D infop->pt_dynamic_addr; - } - } -} +#define HAVE_INIT_MAIN_THREAD =20 /* See linux kernel: arch/xtensa/include/asm/elf.h. */ #define ELF_NREG 128 diff --git a/linux-user/xtensa/cpu_loop.c b/linux-user/xtensa/cpu_loop.c index c0fcf743e7..43a194fc4a 100644 --- a/linux-user/xtensa/cpu_loop.c +++ b/linux-user/xtensa/cpu_loop.c @@ -238,12 +238,22 @@ void cpu_loop(CPUXtensaState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - int i; - for (i =3D 0; i < 16; ++i) { - env->regs[i] =3D regs->areg[i]; + CPUArchState *env =3D cpu_env(cs); + + env->sregs[WINDOW_BASE] =3D 0; + env->sregs[WINDOW_START] =3D 1; + env->regs[1] =3D info->start_stack; + env->pc =3D info->entry; + + if (info_is_fdpic(info)) { + env->regs[4] =3D info->loadmap_addr; + env->regs[5] =3D info->interpreter_loadmap_addr; + if (info->interpreter_loadmap_addr) { + env->regs[6] =3D info->interpreter_pt_dynamic_addr; + } else { + env->regs[6] =3D info->pt_dynamic_addr; + } } - env->sregs[WINDOW_START] =3D regs->windowstart; - env->pc =3D regs->pc; } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337235; cv=none; d=zohomail.com; s=zohoarc; b=nlPCylmlNxaBVYgT0f59HGGn6TvyELcVTBCrQMi3vlGexkN0p7DlexByfm7oyXpAJVNv64jLo79/oXscIXSzGuPWmrY0nq4HKWqaGt+smxQBZIhhr9iBBLvP7Z/F+o4AP76Ddk/xfbzm4+08MuoPHSYykUUbJ2wqw8isC8LG5qE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337235; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=LrimBB+faaHzZ0a+sOK+yKBp8vwT8/efwhqeBA5wVfA=; b=IfWSG57w9tpHssvLpuRW0VekfKtyh9vrD4G2bQj6QwuIPgdIGQSjEVuGwc9d7HeJW7kQGIgG8Xbsr3qzp7lMvqlDr+vd5Wi4Soh83ERWNO+7X1OdyXZMD2nQcAhK6IaBQQSADH6x2KFadVLGVsqI/x1elFiT3g5be7xng4gFIKs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337235182223.49428120161178; Wed, 27 Aug 2025 16:27:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPWl-0008OE-CV; Wed, 27 Aug 2025 19:26:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPWZ-000833-JN for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:25:53 -0400 Received: from mail-pg1-x535.google.com ([2607:f8b0:4864:20::535]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPWR-00059r-3f for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:25:51 -0400 Received: by mail-pg1-x535.google.com with SMTP id 41be03b00d2f7-b4bafe2e538so400318a12.3 for ; Wed, 27 Aug 2025 16:25:42 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-248cd627e40sm7282025ad.94.2025.08.27.16.25.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:25:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756337141; x=1756941941; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LrimBB+faaHzZ0a+sOK+yKBp8vwT8/efwhqeBA5wVfA=; b=To0lgDyFoMbk5iyZ8L1xu7N0DU+ttdp0MxI/Xp4setyuklZGRMnfxQQix76RQQEDqK kc5V1B8lu33XGBfARib7VqXhQCS5Z3urQ02gN5fTIhVIm5oY4+7liu2iLfTtnXqtqUti Qwb3ZIxKjx4g+0cNZitOZrqrt5aeBB+N7OQoGMFKZv2Q3VghuZh1RzRwXX4Wg+6yrp4v cILNAKiziRFtmQzUZmDJTtkHJDMHdrLkAZo4eqet4EGIF1BltNN2lmYZ4BVnZ4ErE6I0 K0g++AsFcfmUKjZtpQPIU7CNeZ/cRsp5YkNTAMoKnU9gZ+P0C4b2WAcoNhVLY4hiX9fW 1tWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756337141; x=1756941941; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LrimBB+faaHzZ0a+sOK+yKBp8vwT8/efwhqeBA5wVfA=; b=QXULzTlfF7VgEEp2a6swNzhSERqeuH7NYVi4yHvoXVt89VOqQMrxytclZ9VaoKfUEz 81YSkNdj9qiXlcvL4GlOxLSiXl9/eFKWHkTkZo2amUmlseFFQoejj0VEkn8IkwYn/9Kx ObYVYisRQZDQ2rLKLjIbF9M0aDay1CgrVCWXgKOXXI30z7iYe7Jq4AJzwyoHvP8iYbIq D1s5zltXU/dtVhMsaKkBz/wJ6Z3VQvj410h6tvTGUP0QdNVicle+3ikwu0oIAB62AIXJ Hq4KFm9jRUZC+mBjtLWYC70eI7l7rMh9Lx3LvVHHP81cAtzGilb7Ey2VO+3PSSqRSxzI IXUw== X-Gm-Message-State: AOJu0YxNoG04wVNYrK0xO0bIZBAJggbJU+RRjqun7A9usFhmCRmnrEZg ZoXoJuclR3X7h50bytgBqh0GtTLSWUbDJ8Oc2hfue0DUr7RVhyp/ggkt1uiEHfPXa7CqZ7cGfip O/VwwEuw= X-Gm-Gg: ASbGnctfzn/Uj/F5iRUSZkDpgamhJq/6F/6M8pSmOsXmS9350blP3mq8lYXXSSuIbad 4/UAE4nK8942X7x5sF6lTUZcoD9ODkSSdwH883Yhc7zTpiwkNVSR0LrIik6HQZBVAMPWpmhKZU/ 3sl2cV0NdiTb3tiCsbA/+UXS/LEegy6NdAvq/HMRZRJZYhLoxRP7Q/bm81KIYLF5928AUeYRxAH Sg3sLtd3NEsgcbXcMZNupWwS363xMbeJ4Se0FKlNgNt9/6ira13LeswLjbz0IjHptWqIU6g8qdc IfKkirMe3h7tK6IxqeTPBzXkvyOgRuGKgjFTi4UsV0UpSJD5EOUqZ49SllkeW/dtog1xs8KZNBr 8Le8Ff/mSuO5sk9GDMeBen0Gm9dhx8Gu5qUHH X-Google-Smtp-Source: AGHT+IFOVMMuJQvlgmeAhO0VZl/4+ImoXW5bKxlXve4JjJ5vFqUOh6m4gBPq1qkVSHJ+oPg2hrsh/Q== X-Received: by 2002:a17:903:240c:b0:246:cb50:f42f with SMTP id d9443c01a7336-246cb50fe74mr209732285ad.19.1756337141273; Wed, 27 Aug 2025 16:25:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 43/46] linux-user/hexagon: Create init_main_thread Date: Thu, 28 Aug 2025 09:20:20 +1000 Message-ID: <20250827232023.50398-44-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337237803124101 Content-Type: text/plain; charset="utf-8" Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 7 +------ linux-user/hexagon/cpu_loop.c | 8 +++++--- 2 files changed, 6 insertions(+), 9 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 447a9be11d..4417c2d99a 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -954,12 +954,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *r= egs, #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_HEXAGON =20 -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - regs->sepc =3D infop->entry; - regs->sp =3D infop->start_stack; -} +#define HAVE_INIT_MAIN_THREAD =20 #endif /* TARGET_HEXAGON */ =20 diff --git a/linux-user/hexagon/cpu_loop.c b/linux-user/hexagon/cpu_loop.c index e18a0183b5..25c97edcae 100644 --- a/linux-user/hexagon/cpu_loop.c +++ b/linux-user/hexagon/cpu_loop.c @@ -79,9 +79,11 @@ void cpu_loop(CPUHexagonState *env) } } =20 -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - env->gpr[HEX_REG_PC] =3D regs->sepc; - env->gpr[HEX_REG_SP] =3D regs->sp; + CPUArchState *env =3D cpu_env(cs); + + env->gpr[HEX_REG_PC] =3D info->entry; + env->gpr[HEX_REG_SP] =3D info->start_stack; env->gpr[HEX_REG_USR] =3D 0x56000; } --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1756337190; cv=none; d=zohomail.com; s=zohoarc; b=TJST6f6sMJBnJymHUvCgwo7L3qois4/X+2ku4Gm+erdlt7H9vUst5b2z0NZIUTjs4/WNqFcf4+tuUaNsNw1/hUTuKWq87K9qeWJ1tq+YWi1Nj1lVtO7cJ3XdpZ7XHrNfFqUoS9rodi0zGnkig8oUcmE8S3W1cnYqUU/qO2vyqYA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756337190; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=H2ibNlDU/It0+v2WxVACXlLnTyz0/s7ExcXTNLC1sCA=; b=aUzmiTkcKAuu3sWpz9SS9yYOoeutJhnTlEkRRVIeZ4Tazj9QqpvomkTUi2bm2gcPcO1A44z2/D627OFnArS+4KUQ6CavAx5wqq5eiILsf1PCXD3R0OiwMUuMmxACxu0z7UnFp2MeIqhv/Mf/lfO1iRUOVTWIG0+QUL7GBcv3ixk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756337190941530.5486555345774; Wed, 27 Aug 2025 16:26:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urPWg-0008Hk-6j; Wed, 27 Aug 2025 19:25:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urPWX-00081q-E4 for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:25:51 -0400 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1urPWV-0005As-3v for qemu-devel@nongnu.org; Wed, 27 Aug 2025 19:25:49 -0400 Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-2489c65330aso3609455ad.0 for ; Wed, 27 Aug 2025 16:25:46 -0700 (PDT) Received: from stoup.. ([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-248cd627e40sm7282025ad.94.2025.08.27.16.25.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:25:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756337145; x=1756941945; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=H2ibNlDU/It0+v2WxVACXlLnTyz0/s7ExcXTNLC1sCA=; b=GZ28zrtsn0MgrR+5SCNCk52qqib3nCfKJ+p7INuSr975rAZBvKqJ94ThQVk26QEfT1 hVW3pzj9wEmRs9eorM7zjkmietWZVCHs7iihA4QWQ/j1IB9bX2xWUKFuh2s83ryDsPtZ Jn9kzL3E2+FuPIiUVHDK65Uq8vpNHupcAPS3Faqb+Y4C8H8BWcYK+QeticBCFiQGPyIg cK821ar5WP/HqsFWxDnpySYBPoeW126nqObvi34UiKulkVLgybMQ+nnGxb25BTdBjAba EUNjmizlLNborwUJOLeFjZIhRLxkEVmul9VoZ3HveAxs7F8V/bmxCV65kSRECRAWm9tk NLrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756337145; x=1756941945; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H2ibNlDU/It0+v2WxVACXlLnTyz0/s7ExcXTNLC1sCA=; b=i7E4+ZQJ08Dn3kGdSBHLGxTt1FXjBP4njnL6+lk/aBqadTgW9f0dwfT4hYlB2jUz2Z oNqlc323hIvc44f9tEbIlNXb5CdPfCz0td9utScPwC69MOm40v/jZah9n6SxDGSQAA3E hSB1KOP/kdiwO9b6hwF7VUM0Np9aHmqrId5J5q0VxhaLzd4wUDf6VtslOEX+6BJs8qWC j4ufVnpfPrMhjMgP11rlKpzBXsAFds+w+6FiUWnl86y/SPSPm5itnp+iVe17D1FneXrh RAbygQi5zTLnZP+ghPJnD/Q3p+3buy4N81pyt588enZCl7f42YF4fvrHHayrlhGOJDKu QfNQ== X-Gm-Message-State: AOJu0YzAAQ4KOTqAtm3s3LAlg2R/iyYR30dOJE3HztyIrunhEAUbMQT1 oyYJdghyihOJfIS5FmcMmzkz2ZcqxptkBU9eSyEEGG4oxiK/3iGZFJlnU59BpeyNSZT5mg/CNlB nP+22Eng= X-Gm-Gg: ASbGncvYclPkrlKbskn9ZeRJ/9PsQIZQWjwgItksvy/Z0MadMvv9C3HdlnUU8O9xy2E BHBpygdXJYchrEtNF9bdZEwK3+/0DuDhjhNIS58Wh73/ALFX//kcqqDb3WJMN6g0O508LjLjpVf sip1ht6VKhR+1d77xU+PZdCKy4NAsJnMtZvWytmoEmwV8d0mzlpfJw1K7A27ky1E3zWHUy9eADm fzO9wdtLeMWAPgOJzDdwawMkZyQvQNf17LpOj6pQ9WPdHe0oqWmnrJY7aufyk7JzIES3NmpIZ1D QjK/aIBlx3jN1EdvuaF3SeuVeidzvlCvWI78e4Pb6Qu/TwUwzV1EBHXlMkAK+io6xLTAZH/Ho51 ZCQ6D8AJhSq7Y94ihogwT52yWxg== X-Google-Smtp-Source: AGHT+IHSL9b/SGRecwq0nA6E+L9x4BFYBoK6hwk8nfZExjmjNpnpC69TZQI/HSUIQVyVtYZAsEN01Q== X-Received: by 2002:a17:903:1a2b:b0:244:55b5:7cfc with SMTP id d9443c01a7336-2462eeb78f8mr265056605ad.37.1756337145008; Wed, 27 Aug 2025 16:25:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 44/46] linux-user: Remove do_init_main_thread Date: Thu, 28 Aug 2025 09:20:21 +1000 Message-ID: <20250827232023.50398-45-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337192705116600 Content-Type: text/plain; charset="utf-8" All targets have been converted, so we can call init_main_thread directly. Remove do_init_main_thread and HAVE_INIT_MAIN_THREAD. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/loader.h | 1 - linux-user/qemu.h | 2 -- linux-user/elfload.c | 46 -------------------------------------------- linux-user/main.c | 2 +- 4 files changed, 1 insertion(+), 50 deletions(-) diff --git a/linux-user/loader.h b/linux-user/loader.h index e0291cc3b0..6482c7c90c 100644 --- a/linux-user/loader.h +++ b/linux-user/loader.h @@ -82,7 +82,6 @@ struct linux_binprm { int (*core_dump)(int, const CPUArchState *); /* coredump routine */ }; =20 -void do_init_main_thread(CPUState *cs, struct image_info *infop); abi_ulong loader_build_argptr(int envc, int argc, abi_ulong sp, abi_ulong stringp, int push_ptr); int loader_exec(int fdexec, const char *filename, char **argv, char **envp, diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 8a9500d4f4..e4dca0c20f 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -359,8 +359,6 @@ void *lock_user_string(abi_ulong guest_addr); /* Clone cpu state */ CPUArchState *cpu_copy(CPUArchState *env); =20 -typedef struct target_pt_regs target_pt_regs; -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs); void init_main_thread(CPUState *cs, struct image_info *info); =20 #endif /* QEMU_H */ diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 4417c2d99a..fce4c05674 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -149,8 +149,6 @@ typedef abi_int target_pid_t; =20 #ifdef TARGET_I386 =20 -#define HAVE_INIT_MAIN_THREAD - #ifdef TARGET_X86_64 #define ELF_CLASS ELFCLASS64 #define ELF_ARCH EM_X86_64 @@ -293,8 +291,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, const CPUX86State *en #define ELF_CLASS ELFCLASS32 #define EXSTACK_DEFAULT true =20 -#define HAVE_INIT_MAIN_THREAD - #define ELF_NREG 18 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; =20 @@ -395,8 +391,6 @@ static const VdsoImageInfo *vdso_image_info(uint32_t el= f_flags) #define ELF_ARCH EM_AARCH64 #define ELF_CLASS ELFCLASS64 =20 -#define HAVE_INIT_MAIN_THREAD - #define ELF_NREG 34 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; =20 @@ -438,8 +432,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, # define ELF_ARCH EM_SPARCV9 #endif =20 -#define HAVE_INIT_MAIN_THREAD - #endif /* TARGET_SPARC */ =20 #ifdef TARGET_PPC @@ -485,8 +477,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, NEW_AUX_ENT(AT_UCACHEBSIZE, 0); \ } while (0) =20 -#define HAVE_INIT_MAIN_THREAD - /* See linux kernel: arch/powerpc/include/asm/elf.h. */ #define ELF_NREG 48 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; @@ -533,8 +523,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, const CPUPPCState *en =20 #define VDSO_HEADER "vdso.c.inc" =20 -#define HAVE_INIT_MAIN_THREAD - /* See linux kernel: arch/loongarch/include/asm/elf.h */ #define ELF_NREG 45 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; @@ -581,8 +569,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, #define elf_check_abi(x) (!((x) & EF_MIPS_ABI2)) #endif =20 -#define HAVE_INIT_MAIN_THREAD - /* See linux kernel: arch/mips/include/asm/elf.h. */ #define ELF_NREG 45 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; @@ -640,8 +626,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, const CPUMIPSState *e #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_MICROBLAZE =20 -#define HAVE_INIT_MAIN_THREAD - #define ELF_EXEC_PAGESIZE 4096 =20 #define USE_ELF_CORE_DUMP @@ -673,8 +657,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, const CPUMBState *env #define ELF_CLASS ELFCLASS32 #define ELF_DATA ELFDATA2MSB =20 -#define HAVE_INIT_MAIN_THREAD - #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 8192 =20 @@ -701,8 +683,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_SH =20 -#define HAVE_INIT_MAIN_THREAD - /* See linux kernel: arch/sh/include/asm/elf.h. */ #define ELF_NREG 23 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; @@ -746,8 +726,6 @@ static inline void elf_core_copy_regs(target_elf_gregse= t_t *regs, #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_68K =20 -#define HAVE_INIT_MAIN_THREAD - /* See linux kernel: arch/m68k/include/asm/elf.h. */ #define ELF_NREG 20 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; @@ -786,8 +764,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, const CPUM68KState *e #define ELF_CLASS ELFCLASS64 #define ELF_ARCH EM_ALPHA =20 -#define HAVE_INIT_MAIN_THREAD - #define ELF_EXEC_PAGESIZE 8192 =20 #endif /* TARGET_ALPHA */ @@ -798,8 +774,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, const CPUM68KState *e #define ELF_DATA ELFDATA2MSB #define ELF_ARCH EM_S390 =20 -#define HAVE_INIT_MAIN_THREAD - /* See linux kernel: arch/s390/include/uapi/asm/ptrace.h (s390_regs). */ #define ELF_NREG 27 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; @@ -849,8 +823,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, #define VDSO_HEADER "vdso-64.c.inc" #endif =20 -#define HAVE_INIT_MAIN_THREAD - #define ELF_EXEC_PAGESIZE 4096 =20 #endif /* TARGET_RISCV */ @@ -864,8 +836,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, =20 #define VDSO_HEADER "vdso.c.inc" =20 -#define HAVE_INIT_MAIN_THREAD - #define LO_COMMPAGE 0 =20 static bool init_guest_commpage(void) @@ -905,8 +875,6 @@ static bool init_guest_commpage(void) #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_XTENSA =20 -#define HAVE_INIT_MAIN_THREAD - /* See linux kernel: arch/xtensa/include/asm/elf.h. */ #define ELF_NREG 128 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG]; @@ -954,8 +922,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_HEXAGON =20 -#define HAVE_INIT_MAIN_THREAD - #endif /* TARGET_HEXAGON */ =20 #ifndef ELF_MACHINE @@ -3438,15 +3404,3 @@ static int elf_core_dump(int signr, const CPUArchSta= te *env) return ret; } #endif /* USE_ELF_CORE_DUMP */ - -void do_init_main_thread(CPUState *cs, struct image_info *infop) -{ -#ifdef HAVE_INIT_MAIN_THREAD - init_main_thread(cs, infop); -#else - target_pt_regs regs =3D { }; - - init_thread(®s, infop); - target_cpu_copy_regs(cpu_env(cs), ®s); -#endif -} diff --git a/linux-user/main.c b/linux-user/main.c index e21842bde9..6edeeecef3 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -1037,7 +1037,7 @@ int main(int argc, char **argv, char **envp) the real value of GUEST_BASE into account. */ tcg_prologue_init(); =20 - do_init_main_thread(cpu, info); + init_main_thread(cpu, info); =20 if (gdbstub) { gdbserver_start(gdbstub, &error_fatal); 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charset="utf-8" From: Joel Stanley build/qemu-riscv64 -cpu rv64,v=3Don -d strace build/tests/tcg/riscv64-lin= ux-user/test-vstart-overflow 1118081 riscv_hwprobe(0xffffbc038200,1,0,0,0,0) =3D 0 1118081 brk(NULL) =3D 0x0000000000085000 1118081 brk(0x0000000000085b00) =3D 0x0000000000085b00 1118081 set_tid_address(0x850f0) =3D 1118081 1118081 set_robust_list(0x85100,24) =3D -1 errno=3D38 (Function not implem= ented) 1118081 rseq(0x857c0,32,0,0xf1401073) =3D -1 errno=3D38 (Function not impl= emented) Signed-off-by: Joel Stanley Signed-off-by: Richard Henderson Reviewed-by: Richard Henderson Message-ID: <20250826060341.1118670-1-joel@jms.id.au> --- linux-user/strace.list | 3 +++ 1 file changed, 3 insertions(+) diff --git a/linux-user/strace.list b/linux-user/strace.list index ab818352a9..51b5ead969 100644 --- a/linux-user/strace.list +++ b/linux-user/strace.list @@ -1719,3 +1719,6 @@ #ifdef TARGET_NR_riscv_hwprobe { TARGET_NR_riscv_hwprobe, "riscv_hwprobe" , "%s(%p,%d,%d,%d,%d,%d)", NULL= , NULL }, #endif +#ifdef TARGET_NR_rseq +{ TARGET_NR_rseq, "rseq" , "%s(%p,%u,%d,%#x)", NULL, NULL }, +#endif --=20 2.43.0 From nobody Sun Sep 28 16:28:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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([144.6.121.55]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-248cd627e40sm7282025ad.94.2025.08.27.16.25.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Aug 2025 16:25:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1756337154; x=1756941954; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NGGtyPIF9xqz++XIAVqkzNlT+hk2ClPUujJ2E0FOM70=; b=NCfWsbeAsQqUzRrxu3w3p24tdUUgJf56hKT/lX/gSx5ZsN68tb7b+cnYTbY7aySTfR e/FCNveF4uHwD1l9WmJIqwTRyEupZ5v6c4dWZlCa8dUX3J9426urTpiuAf2i9yctq0UU /qK9A5So3cOuUpA1tIppA3tuCWIqY2GVSdvToREYnIip6W4bBrkOTNzcNppEMGJePeri 6P1PDDwU0gjN3NhGHUM9wTG623MVL4IBvh73ZLT9NLsllFLxSQPTlLgDyRhKPgE0kL+r oZf7MWGTKIdm9fFsJthu1AZ2TssVOXUHhwmaXRCd7Trz4Rd71EAObKVasN8qd7M1Wb0/ +rGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756337154; x=1756941954; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NGGtyPIF9xqz++XIAVqkzNlT+hk2ClPUujJ2E0FOM70=; b=HYv1WrqbazUw/QxTN4Naac7pMwierycOy4O9izo3/2J1xep9egX2W8XR18PfKLwd/V 7xYysnDKQdFvWc/306moVahzh+N8WptmBpChs0aRAruT6vYR83BMG8jrJpNW8uom5kDz h/mpebJXm7cNKAz60XMErZLxqjm+2tREGAFwtYzsbXsT2yQbNz04smqKt4kCwhMX4DOK yJvbLOKX+LgT2By9sQLuD5POY+MXoBU3fTh1F/1oNFPOyKwckZ+toP2QjPuqN2ZtJo4X 6nCx/oXfXbHKamWrzbauMRxug7wG4GLorhNmyVVEY6d/pQI6MI9q/liOfzWHvT+iMq2i tFKw== X-Gm-Message-State: AOJu0Yxd6Hu5s3RfM9G7SYxbg7ZEHCa4JyaZSm1QkHewyLDWk2oobgxB t0Bs6Q/FIZAz+uL5QYDV1TzHXbp0lyYiG2pFRkAmWoIRzZJvHXcxEbO9rOh7eMjwHuhezw+n1CT 0erc/jj0= X-Gm-Gg: ASbGnculGe2ee/l4UlzHZ2XQmhzuc3bJb1SPxvASlcXzzzkzcYOS2L64EmbCZL8KVer tFF+goTK6uYYF8P2UMYQtHKQoOL6aWaJXLK9y4KtDKNeFrvBA3wyPalTlR6ut+6Zz+ZIvjLywhn 4072k37IrEFfgUE0SahwL8XGtMPqN9EBfQPm+lqA7QhFyPKEff8cPArEcZieeCeKu/7Pcp7nl2A b5s5zAkwnLEdmGftMZh4usKNuGxwOcxrg8A0y1hhF1oZvpFdndStAqEfxRlatdImAfj+z8eT7zd psyoviriuGRfK5PQrW1Fx61xGLk8SjnvWGyrPBZ9APluKRP7vd0ujkxlW9FnYEyfz5BZJIjPgdd 2LzILGxpwKuLk4H58PrYzlQKM4w== X-Google-Smtp-Source: AGHT+IHWAnWk48OHvWODzxhqiFX7GbA3PRUVGlNteV1/XTwFl9dK+tapwH3fnLi9Iz6o1bvS+dM5lA== X-Received: by 2002:a17:903:11c7:b0:246:d5b3:6303 with SMTP id d9443c01a7336-248753a2961mr91270325ad.5.1756337154092; Wed, 27 Aug 2025 16:25:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?=C5=81ukasz=20Stelmach?= Subject: [PULL 46/46] linux-user: do not print IP socket options by default Date: Thu, 28 Aug 2025 09:20:23 +1000 Message-ID: <20250827232023.50398-47-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250827232023.50398-1-richard.henderson@linaro.org> References: <20250827232023.50398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1756337269499116600 From: =C5=81ukasz Stelmach IP protocols should not be printed unless the socket is an IPv4 or IPv6 one. Current arrangement erroneously prints IPPROTO_IP for Unix domain sockets. Signed-off-by: =C5=81ukasz Stelmach Signed-off-by: Richard Henderson Reviewed-by: Richard Henderson Message-ID: <20250827095412.2348821-1-l.stelmach@samsung.com> --- linux-user/strace.c | 36 ++++++++++++++++++++---------------- 1 file changed, 20 insertions(+), 16 deletions(-) diff --git a/linux-user/strace.c b/linux-user/strace.c index 3b744ccd4a..786354627a 100644 --- a/linux-user/strace.c +++ b/linux-user/strace.c @@ -586,23 +586,27 @@ print_socket_protocol(int domain, int type, int proto= col) return; } =20 - switch (protocol) { - case IPPROTO_IP: - qemu_log("IPPROTO_IP"); - break; - case IPPROTO_TCP: - qemu_log("IPPROTO_TCP"); - break; - case IPPROTO_UDP: - qemu_log("IPPROTO_UDP"); - break; - case IPPROTO_RAW: - qemu_log("IPPROTO_RAW"); - break; - default: - qemu_log("%d", protocol); - break; + if (domain =3D=3D AF_INET || domain =3D=3D AF_INET6) { + switch (protocol) { + case IPPROTO_IP: + qemu_log("IPPROTO_IP"); + break; + case IPPROTO_TCP: + qemu_log("IPPROTO_TCP"); + break; + case IPPROTO_UDP: + qemu_log("IPPROTO_UDP"); + break; + case IPPROTO_RAW: + qemu_log("IPPROTO_RAW"); + break; + default: + qemu_log("%d", protocol); + break; + } + return; } + qemu_log("%d", protocol); } =20 =20 --=20 2.43.0