From nobody Sun Sep 28 16:35:51 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1756304609; cv=none; d=zohomail.com; s=zohoarc; b=VCzpd3jZLf4zk+0G/FXC3TGh2cYE188s7WoxM69r7dcT/zOOnN2QWfkoeXo/j2U5T4LsHDBVfd0hlrAwxBy39C3LUw/qjghDkwZN67Oy65S9fdsPCMUfhGxpsP33q9R81v3qqpOrFrSIrQRVInE/7/jen9dYQ2iA6xTXzkoxndI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1756304609; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=MufPVaoK/Yqf3RDLsIshhQHvskhMVysjAB9cfs9xv98=; b=XdjAYt1ITxKRnI5cQufxi0NJ9DLAn4vpd62V0HcoeychvPoUSgBbDHuHQEg/pQb1KHT3qrErShXYQPSg203qGMtx1CQw8lDC3x0dhZzySphiq9hCAdPkXxzylAU9zIanApfrQ2zhH0Q0ULPrSDqGaRhhoMMOm9qmhhD2B2Q10uY= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756304608940248.26629471166495; Wed, 27 Aug 2025 07:23:28 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1urH3M-0001ll-Jh; Wed, 27 Aug 2025 10:23:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urH3L-0001hj-Ef; Wed, 27 Aug 2025 10:23:07 -0400 Received: from [185.176.79.56] (helo=frasgout.his.huawei.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1urH3J-0006Ti-IH; Wed, 27 Aug 2025 10:23:07 -0400 Received: from mail.maildlp.com (unknown [172.18.186.231]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4cBmr56fl3z6J6sV; Wed, 27 Aug 2025 22:19:33 +0800 (CST) Received: from frapeml500003.china.huawei.com (unknown [7.182.85.28]) by mail.maildlp.com (Postfix) with ESMTPS id 5435D140276; Wed, 27 Aug 2025 22:22:59 +0800 (CST) Received: from a2303103017.china.huawei.com (10.126.171.221) by frapeml500003.china.huawei.com (7.182.85.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Wed, 27 Aug 2025 16:22:58 +0200 To: CC: , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v16 2/8] hw/core/machine: topology functions capabilities added Date: Wed, 27 Aug 2025 15:21:46 +0100 Message-ID: <20250827142152.206-3-alireza.sanaee@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250827142152.206-1-alireza.sanaee@huawei.com> References: <20250827142152.206-1-alireza.sanaee@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.126.171.221] X-ClientProxiedBy: lhrpeml100006.china.huawei.com (7.191.160.224) To frapeml500003.china.huawei.com (7.182.85.28) X-Host-Lookup-Failed: Reverse DNS lookup failed for 185.176.79.56 (deferred) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=alireza.sanaee@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -33 X-Spam_score: -3.4 X-Spam_bar: --- X-Spam_report: (-3.4 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Alireza Sanaee From: Alireza Sanaee via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1756304612276124100 Content-Type: text/plain; charset="utf-8" Add two functions one of which finds the lowest level cache defined in the cache description input, and the other checks if caches are defined at a particular level. Signed-off-by: Alireza Sanaee --- hw/core/machine-smp.c | 56 +++++++++++++++++++++++++++++++++++++++++++ include/hw/boards.h | 5 ++++ 2 files changed, 61 insertions(+) diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c index 0be0ac044c..32f3e7d6c9 100644 --- a/hw/core/machine-smp.c +++ b/hw/core/machine-smp.c @@ -406,3 +406,59 @@ bool machine_check_smp_cache(const MachineState *ms, E= rror **errp) =20 return true; } + +/* + * This function assumes l3 and l2 have unified cache and l1 is split l1d = and + * l1i. + */ +bool machine_find_lowest_level_cache_at_topo_level(const MachineState *ms, + int *level_found, + CpuTopologyLevel topo_l= evel) +{ + + CpuTopologyLevel level; + + level =3D machine_get_cache_topo_level(ms, CACHE_LEVEL_AND_TYPE_L1I); + if (level =3D=3D topo_level) { + *level_found =3D 1; + return true; + } + + level =3D machine_get_cache_topo_level(ms, CACHE_LEVEL_AND_TYPE_L1D); + if (level =3D=3D topo_level) { + *level_found =3D 1; + return true; + } + + level =3D machine_get_cache_topo_level(ms, CACHE_LEVEL_AND_TYPE_L2); + if (level =3D=3D topo_level) { + *level_found =3D 2; + return true; + } + + level =3D machine_get_cache_topo_level(ms, CACHE_LEVEL_AND_TYPE_L3); + if (level =3D=3D topo_level) { + *level_found =3D 3; + return true; + } + + return false; +} + +/* + * Check if there are caches defined at a particular level. It supports on= ly + * L1, L2 and L3 caches, but this can be extended to more levels as needed. + * + * Return True on success, False otherwise. + */ +bool machine_defines_cache_at_topo_level(const MachineState *ms, + CpuTopologyLevel level) +{ + if (machine_get_cache_topo_level(ms, CACHE_LEVEL_AND_TYPE_L3) =3D=3D l= evel || + machine_get_cache_topo_level(ms, CACHE_LEVEL_AND_TYPE_L2) =3D=3D l= evel || + machine_get_cache_topo_level(ms, CACHE_LEVEL_AND_TYPE_L1I) =3D=3D = level || + machine_get_cache_topo_level(ms, CACHE_LEVEL_AND_TYPE_L1D) =3D=3D = level) { + return true; + } + return false; +} diff --git a/include/hw/boards.h b/include/hw/boards.h index f94713e6e2..3c1a999791 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -55,6 +55,11 @@ void machine_set_cache_topo_level(MachineState *ms, Cach= eLevelAndType cache, CpuTopologyLevel level); bool machine_check_smp_cache(const MachineState *ms, Error **errp); void machine_memory_devices_init(MachineState *ms, hwaddr base, uint64_t s= ize); +bool machine_defines_cache_at_topo_level(const MachineState *ms, + CpuTopologyLevel level); +bool machine_find_lowest_level_cache_at_topo_level(const MachineState *ms, + int *level_found, + CpuTopologyLevel topo_l= evel); =20 /** * machine_class_allow_dynamic_sysbus_dev: Add type to list of valid devic= es --=20 2.43.0