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Iglesias" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , "Frederic Konrad" , Sai Pavan Boddu Subject: [PATCH v4 34/47] hw/arm/xlnx-versal: use hw/arm/bsa.h for timer IRQ indices Date: Fri, 22 Aug 2025 17:15:59 +0200 Message-ID: <20250822151614.187856-35-luc.michel@amd.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250822151614.187856-1-luc.michel@amd.com> References: <20250822151614.187856-1-luc.michel@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF0000231D:EE_|PH7PR12MB7842:EE_ X-MS-Office365-Filtering-Correlation-Id: 624100fa-65da-4dee-aa2c-08dde18f0532 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|1800799024|82310400026|376014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?Z2EySnJvMEg4SDZMSmdudVVYc0hmUkcxbkpSZmtvcXhvcW9BV3dPQVhtbTJp?= =?utf-8?B?L3lhNzlVRk1TaEc5OEVsMG0vMjAxTWtqZUtFeWpJUi9KTDNYS09TSGlZTjRr?= =?utf-8?B?Nm5VU0VMdU1DcU9ETXNBY1M1VGVtSEQ4cjhDV1BhMzRncGM2NnF3bUtxaENw?= =?utf-8?B?ZVFPb3o1Tk1tdjB6R1lTOVRtNEJkZW9QQkI1Q3RweFBsWEZTbVU4aGI0d0hW?= =?utf-8?B?TTBmZGlZK0tBak1lVFM3TWxBWUZSMFFsS05KNjNwMWJHVlcxMHZKZTNaSG9j?= =?utf-8?B?RzJuWUk1ejJ0Tkw1bFUyeTFLMStveEZLVWZrOHpXaVdMT0JDMVZ6aDVKZ2Nx?= =?utf-8?B?cVVZTGd6dllNUFJIY3JmTzQycWhycnBmblQzUHNxTW5kckhPOHZjYnhXSjgy?= =?utf-8?B?YitRODlJODRvMlF0VEIrTnNBQ0R0S2U5SWZpOFJOYUhUVmdEY3owVWlWOWU4?= =?utf-8?B?enRBUU44WHBDM1BmSTJhRloyY2FhV2drTGg2Vi8rYnFWNlcwYUNJRmVJZzZ5?= =?utf-8?B?c3IvaDBXZnA0Y0pKNjhRYklDK2puSVdwMjdtMEhQQldjMzJLYURmVHBESy9w?= =?utf-8?B?V3RBTTkyQS8yRXZWZW9rY0s1SllUNnhMdDlEVzQySFF5VVZ3SVJndjFxM1pC?= =?utf-8?B?Y09XbGEvb3BrcW5OeXdkY2ljdTgyZGtkd0ZqTTFXTFdmVUtINTJMRW9TUEFk?= =?utf-8?B?T0lDbW0rSExjUFh1dFlWYVJiTjNLUjhKK21yTDl0SWU4T2E3OTQ3QnltcUdh?= =?utf-8?B?ZjF6Q0tNTkEyM1RHZmtyY09ZN21obW5wU0VseDBSLzhKQ1hZS2I4c2JXYWgr?= =?utf-8?B?c0pJZ2EyaEplbkZQNzZMdHRGZ1ZDdHVheTJDSXBFUi9ZaXFpOHZ2Z2d1OFBq?= =?utf-8?B?dkxoK3ZybzY2eHh3RzhDVGJsVGlZamtIY0dKRzlZWlZtbmxLcFM1c0JmSThs?= =?utf-8?B?YVlpa0x5c3Y5TFFJNUVlRC9teVdPYytNVzY0TlhlUlhFYVJYZCs4bFlQMGN3?= =?utf-8?B?MjVIWWRiaXA5SWJhS3F0R08zdExPeUlFaSt4Q2JXbEE3cXNCd0NkaWVSb1RH?= =?utf-8?B?VTNKbUVuUGdybGdGQ3YxWkRLb3VYSTNnYkk0cW1pMjFGaFVUU2lRRkFUOEZ5?= =?utf-8?B?SXV5VHJRMytyK1Y3VjhtTFRZUytXeEx0dU9sYk9KaGlNZ2I4MnZucjdGbmhq?= =?utf-8?B?Z2ZJMUZrM3JiZ21nODVoQ0UvbGFsSVFleFBNR3BwNkJRWGxmQndzbUY0VDFP?= =?utf-8?B?RmFJa285YkVURmNjdi9NdXVWbWVnZlIyR1lXaGNpRFhrbkIzYjJWTW1xMVI4?= =?utf-8?B?Z1hubTVHMWtaazRWWGNYY04zMHRRY2w0ZWtzN1A0QzRMZnRoczZkenR1QWVm?= =?utf-8?B?WHFzaVlGZ09YV3dsMzN1OUxsWVRNU1lXL3A3Z2o5amhuT2Jtc1JkbXFkamhV?= =?utf-8?B?V0hwdExhbUpXc2sxbG9VYWRWUXJoU1NGVkZWSUVtMXhyaDJnZklZU05DNWpX?= =?utf-8?B?dHk1bm1hdkx4N051THRzcVhFejlkOVFBUkNhVHc0My8wVHhEbk9zTHNMV0Fj?= =?utf-8?B?SHN1TEhhY1ljUjg1ZE8xSDU3L0VFR1pCOHI0V0dGamRRS2duQ1dhdHE0TE03?= =?utf-8?B?ODVyMnhST0libEJmbnRpWVNDc0ZTcnpCRUNiYlBYQUNhYlZjdmZwdnBrV0JD?= =?utf-8?B?Mit6eE9Ra20xRklwL3hiMHcrd2NQSnJmTGV0MWNUZXBuN0RYRVY0M0I4QVV1?= =?utf-8?B?N1hVeFZZUCtsQ0kxTEJsWmEzT2VIbUhweGsyaVhrN2QwcjBkd2xBdndPVDR4?= =?utf-8?B?czhITXN3dXhnNTZ1akZmZnA2Ymd2dU1renVTSXY4NHFRbEVvV1p1cHZaSmgy?= =?utf-8?B?ZGdpSWdER3pVQXRKWGVYYVNPQTYrMkpReGpaRE5yRDBhL3JGazk2YXlXbEt4?= =?utf-8?B?dkI2eEsyNUQ2RGVNbU56SDEzbzRkS0I4cDFOTnNWL2dZY3UvMERQck5tVDRW?= =?utf-8?B?cTVnV0JYSVdDQTFibmFhQTJZNjFPNHRSRk15RDh3OU56YUpCTmwvM2RDOXBO?= =?utf-8?Q?AJZQHn?= X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Signed-off-by: Luc Michel Reviewed-by: Francisco Iglesias Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/arm/xlnx-versal.h | 6 ------ hw/arm/xlnx-versal.c | 28 +++++++++++++++++----------- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 7bdf6dab629..da0260b83de 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -85,16 +85,10 @@ int versal_get_num_can(VersalVersion version); int versal_get_num_sdhci(VersalVersion version); =20 /* Memory-map and IRQ definitions. Copied a subset from * auto-generated files. */ =20 -#define VERSAL_GIC_MAINT_IRQ 9 -#define VERSAL_TIMER_VIRT_IRQ 11 -#define VERSAL_TIMER_S_EL1_IRQ 13 -#define VERSAL_TIMER_NS_EL1_IRQ 14 -#define VERSAL_TIMER_NS_EL2_IRQ 10 - #define VERSAL_CRL_IRQ 10 #define VERSAL_UART0_IRQ_0 18 #define VERSAL_UART1_IRQ_0 19 #define VERSAL_CANFD0_IRQ_0 20 #define VERSAL_CANFD1_IRQ_0 21 diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 1462c2ffc84..3b6413262f0 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -47,10 +47,11 @@ #include "hw/intc/arm_gicv3_its_common.h" #include "hw/intc/arm_gic.h" #include "hw/core/split-irq.h" #include "target/arm/cpu.h" #include "hw/cpu/cluster.h" +#include "hw/arm/bsa.h" =20 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") #define GEM_REVISION 0x40070106 =20 @@ -671,11 +672,12 @@ static DeviceState *versal_create_gic(Versal *s, } =20 qemu_fdt_setprop_cell(s->cfg.fdt, node, "phandle", s->phandle.gic); qemu_fdt_setprop_cell(s->cfg.fdt, node, "#interrupt-cells", 3); qemu_fdt_setprop_cells(s->cfg.fdt, node, "interrupts", - GIC_FDT_IRQ_TYPE_PPI, VERSAL_GIC_MAINT_IRQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_GIC_MAINT_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI); qemu_fdt_setprop(s->cfg.fdt, node, "interrupt-controller", NULL, 0= ); } =20 versal_create_gic_its(s, map, dev, mr, node); @@ -696,14 +698,14 @@ static void connect_gic_to_cpu(const VersalCpuCluster= Map *map, /* * Mapping from the output timer irq lines from the CPU to the * GIC PPI inputs. */ const int timer_irq[] =3D { - [GTIMER_PHYS] =3D VERSAL_TIMER_NS_EL1_IRQ, - [GTIMER_VIRT] =3D VERSAL_TIMER_VIRT_IRQ, - [GTIMER_HYP] =3D VERSAL_TIMER_NS_EL2_IRQ, - [GTIMER_SEC] =3D VERSAL_TIMER_S_EL1_IRQ, + [GTIMER_PHYS] =3D INTID_TO_PPI(ARCH_TIMER_NS_EL1_IRQ), + [GTIMER_VIRT] =3D INTID_TO_PPI(ARCH_TIMER_VIRT_IRQ), + [GTIMER_HYP] =3D INTID_TO_PPI(ARCH_TIMER_NS_EL2_IRQ), + [GTIMER_SEC] =3D INTID_TO_PPI(ARCH_TIMER_S_EL1_IRQ), }; =20 has_gtimer =3D arm_feature(&ARM_CPU(cpu)->env, ARM_FEATURE_GENERIC_TIM= ER); =20 if (has_gtimer) { @@ -714,13 +716,13 @@ static void connect_gic_to_cpu(const VersalCpuCluster= Map *map, } } =20 if (map->gic.version =3D=3D 3) { qemu_irq maint_irq; + int maint_idx =3D ppibase + INTID_TO_PPI(ARCH_GIC_MAINT_IRQ); =20 - maint_irq =3D qdev_get_gpio_in(gic, - ppibase + VERSAL_GIC_MAINT_IRQ); + maint_irq =3D qdev_get_gpio_in(gic, maint_idx); qdev_connect_gpio_out_named(cpu, "gicv3-maintenance-interrupt", 0, maint_irq); } =20 sysbus_connect_irq(sbd, idx, qdev_get_gpio_in(cpu, ARM_CPU_IRQ)); @@ -840,17 +842,21 @@ static void versal_create_cpu_cluster(Versal *s, cons= t VersalCpuClusterMap *map) =20 has_gtimer =3D arm_feature(&ARM_CPU(cpus[0])->env, ARM_FEATURE_GENERIC= _TIMER); if (map->dtb_expose && has_gtimer) { qemu_fdt_add_subnode(s->cfg.fdt, "/timer"); qemu_fdt_setprop_cells(s->cfg.fdt, "/timer", "interrupts", - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_S_EL1_IR= Q, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_S_EL1_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI, - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL1_I= RQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_NS_EL1_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI, - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_VIRT_IRQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_VIRT_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI, - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL2_I= RQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_NS_EL2_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI); qemu_fdt_setprop(s->cfg.fdt, "/timer", "compatible", compatible, sizeof(compatible)); } } --=20 2.50.1