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Iglesias" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , "Frederic Konrad" , Sai Pavan Boddu Subject: [PATCH v4 26/47] hw/arm/xlnx-versal: rpu: refactor creation Date: Fri, 22 Aug 2025 17:15:51 +0200 Message-ID: <20250822151614.187856-27-luc.michel@amd.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250822151614.187856-1-luc.michel@amd.com> References: <20250822151614.187856-1-luc.michel@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF0000343D:EE_|CY5PR12MB6107:EE_ X-MS-Office365-Filtering-Correlation-Id: 5d95a3eb-ea71-431e-a5aa-08dde18efb63 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?XAVexVLnSxQQMzcOghll5aBcUu9bJ+Kda/C2G4kkMaSs4mac36OjjaG+YTNM?= =?us-ascii?Q?NpJQ1d/EvIu2w11SqciQR8hfBPANbr6j+Ml3eSnEPZxZZK23baMgMs2bdyWT?= =?us-ascii?Q?8BMOey02fpGeGa20qiCGVpSW1T2oQGOhRoe+SQTjUv4JUcHHZvKE3JkAEClx?= =?us-ascii?Q?MxXhLhlII0bVmlaFrt8YVNcW8U/8+2pXGsPSV1HrYSH35pahzu1qyaWmgZi0?= =?us-ascii?Q?LL/s6eIGywHQERTI3Zq0g+8iTx1lmGKpcqdjd58xfxoaRPw6GZ+5V5ScPL0Z?= =?us-ascii?Q?tH2ezrclKCM47rVl/xx66uQW/9toahkRnYucbEVqktRKgfHcAKSjIbrX2T4G?= =?us-ascii?Q?zYZbDREK7jHWqbbZdu20C23kV+tgmaojw4l0sXHaEK+AEG84+aoLokcI7NS+?= =?us-ascii?Q?5JQcR9be0F+UNbBBagQ/Jyrd3ypauMdW4TjV5rXQvGqrwFl2TjelGY7QIkL+?= =?us-ascii?Q?hrOEv1pvCvJ0xEAUlyBA1vOzl1nvkBtbKGUeSzsAk7AncaivxH1e5jLk59KA?= =?us-ascii?Q?ypSHfPJr9k8KtmC0C9uFtuaKPiuDzv9euZCQH73+BafOmBHfiKX0aVrFTwgF?= =?us-ascii?Q?rn9lOn/ZoHnMhfZ+LTelpZcImoR7M5d8QqO5EtjJg8mA3gafCA24pt7uGZY2?= =?us-ascii?Q?UtGRcgUVZfi4FAbfkvVp+xBGReRP8LhpeszZA/SNLZgHZ6W/eF2qSEPfljD/?= =?us-ascii?Q?BlDCP/czaS8+9KPsxbzHLg8A3gjCMopO9MyJnqd3ko3tGDeZuUZ62NQvqGIr?= =?us-ascii?Q?RLpsCZn5rrPrIDc/KSoQrs1+NyDSi4fD4tL/sYjaCC22eMCmVpXxT4GxpUC1?= =?us-ascii?Q?YGzZFTzPCkP5tq2kow44UiHxJ9ScDeAWgWCo4Edej9MueM3BskMxOGWhef+N?= =?us-ascii?Q?OTDobbxRyepiTNKKLNAezEJD7sssJ5Hlh1r7vanoWuTT4CjZwD2EVFZzS4if?= =?us-ascii?Q?R6kAmfd17JHhBtzx12DNg8uQynpEpLjiSxpgDDHO3Bz3yrj+qwxxhuTR9x3W?= =?us-ascii?Q?6coGA9kJg/a3JmaieGxCha7RmUby2xO6qd0J3EsM4Q9d5bIIlLOZoidSiM+4?= =?us-ascii?Q?w0J0oY20T+LjgmqOX30rKlxx7av0DAl/3T3citc7h8Bo4LAQnkQwz9LFCSZ+?= =?us-ascii?Q?kkH6NQE/GKp+RKwVPzjK7OzKJ4gVUIWwnP1N8VICtRlk3y4WpZ03+aPwwKhr?= =?us-ascii?Q?romQju8JuE27LUDoxAGZE8yaIyMzpX90V4NOHcPmkEW1R47oHFEfBEV5JJeH?= =?us-ascii?Q?vaL92eMt9JJOJOE3GPibUGtL9LJOYTMDr0i9h2tI8+ZkTvFIdbDcpbumlUYp?= =?us-ascii?Q?Uufy8tGAwK1EBz63KqggurR/uwObb7W4ZQ3Yalrjv7UUvs4jRPQUk7SN8OBj?= =?us-ascii?Q?syupIiPUtiIkjQNYB5TnjcnCniIL2OammUPEtpHY7wY1mneSTMdIBEaiX2oK?= =?us-ascii?Q?NbKt+0JYWlISUqmmlmkZRXvbo4A0gZIgPxiw5KIhr1R++uLhgiOpdy4VKz7M?= =?us-ascii?Q?EK+LbWvaHJJ8xhbCEagGT5h5nx5LkRUtMI4I?= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(376014)(36860700013)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Aug 2025 15:17:17.4890 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5d95a3eb-ea71-431e-a5aa-08dde18efb63 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF0000343D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6107 Received-SPF: permerror client-ip=2a01:111:f403:2406::619; envelope-from=Luc.Michel@amd.com; helo=NAM02-SN1-obe.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1755875938812124100 Content-Type: text/plain; charset="utf-8" Refactor the RPU cluster creation using the VersalMap structure. This effectively instantiate the RPU GICv2 which was not instantiated before. Signed-off-by: Luc Michel Reviewed-by: Francisco Iglesias --- include/hw/arm/xlnx-versal.h | 11 ------- hw/arm/xlnx-versal-virt.c | 1 + hw/arm/xlnx-versal.c | 60 +++++++++++++++--------------------- 3 files changed, 26 insertions(+), 46 deletions(-) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 984f9f2ccdd..0a91ec7ae36 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -12,14 +12,12 @@ =20 #ifndef XLNX_VERSAL_H #define XLNX_VERSAL_H =20 #include "hw/sysbus.h" -#include "hw/cpu/cluster.h" #include "qom/object.h" #include "net/can_emu.h" -#include "target/arm/cpu.h" #include "hw/arm/xlnx-versal-version.h" =20 #define TYPE_XLNX_VERSAL_BASE "xlnx-versal-base" OBJECT_DECLARE_TYPE(Versal, VersalClass, XLNX_VERSAL_BASE) =20 @@ -50,19 +48,10 @@ struct Versal { MemoryRegion mr_ddr_ranges[4]; } noc; =20 struct { MemoryRegion mr_ocm; - - /* Real-time Processing Unit. */ - struct { - MemoryRegion mr; - MemoryRegion mr_ps_alias; - - CPUClusterState cluster; - ARMCPU cpu[XLNX_VERSAL_NR_RCPUS]; - } rpu; } lpd; =20 struct { uint32_t clk_25mhz; uint32_t clk_125mhz; diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 27594f78c8f..5958e712519 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -22,10 +22,11 @@ #include "hw/qdev-properties.h" #include "hw/arm/xlnx-versal.h" #include "hw/arm/boot.h" #include "target/arm/multiprocessing.h" #include "qom/object.h" +#include "target/arm/cpu.h" =20 #define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt") OBJECT_DECLARE_SIMPLE_TYPE(VersalVirt, XLNX_VERSAL_VIRT_MACHINE) =20 #define XLNX_VERSAL_NUM_OSPI_FLASH 4 diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 96e687abcf8..2f0b4c845a6 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -45,10 +45,12 @@ #include "hw/misc/xlnx-versal-crl.h" #include "hw/intc/arm_gicv3_common.h" #include "hw/intc/arm_gicv3_its_common.h" #include "hw/intc/arm_gic.h" #include "hw/core/split-irq.h" +#include "target/arm/cpu.h" +#include "hw/cpu/cluster.h" =20 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") #define GEM_REVISION 0x40070106 =20 @@ -105,10 +107,11 @@ typedef struct VersalCpuClusterMap { enum StartPoweredOffMode start_powered_off; } VersalCpuClusterMap; =20 typedef struct VersalMap { VersalCpuClusterMap apu; + VersalCpuClusterMap rpu; =20 VersalSimplePeriphMap uart[2]; size_t num_uart; =20 VersalSimplePeriphMap canfd[4]; @@ -224,10 +227,31 @@ static const VersalMap VERSAL_MAP =3D { .has_its =3D true, .its =3D 0xf9020000, }, }, =20 + .rpu =3D { + .name =3D "rpu", + .cpu_model =3D ARM_CPU_TYPE_NAME("cortex-r5f"), + .num_cluster =3D 1, + .num_core =3D 2, + .qemu_cluster_id =3D 1, + .mp_affinity =3D { + .base =3D 0x100, + .core_shift =3D ARM_AFF0_SHIFT, + .cluster_shift =3D ARM_AFF1_SHIFT, + }, + .start_powered_off =3D SPO_ALL, + .dtb_expose =3D false, + .gic =3D { + .version =3D 2, + .dist =3D 0xf9000000, + .cpu_iface =3D 0xf9001000, + .num_irq =3D 192, + }, + }, + .uart[0] =3D { 0xff000000, 18 }, .uart[1] =3D { 0xff010000, 19 }, .num_uart =3D 2, =20 .canfd[0] =3D { 0xff060000, 20 }, @@ -804,39 +828,10 @@ static void versal_create_cpu_cluster(Versal *s, cons= t VersalCpuClusterMap *map) qemu_fdt_setprop(s->cfg.fdt, "/timer", "compatible", compatible, sizeof(compatible)); } } =20 -static void versal_create_rpu_cpus(Versal *s) -{ - int i; - - object_initialize_child(OBJECT(s), "rpu-cluster", &s->lpd.rpu.cluster, - TYPE_CPU_CLUSTER); - qdev_prop_set_uint32(DEVICE(&s->lpd.rpu.cluster), "cluster-id", 1); - - for (i =3D 0; i < ARRAY_SIZE(s->lpd.rpu.cpu); i++) { - Object *obj; - - object_initialize_child(OBJECT(&s->lpd.rpu.cluster), - "rpu-cpu[*]", &s->lpd.rpu.cpu[i], - XLNX_VERSAL_RCPU_TYPE); - obj =3D OBJECT(&s->lpd.rpu.cpu[i]); - object_property_set_bool(obj, "start-powered-off", true, - &error_abort); - - object_property_set_int(obj, "mp-affinity", 0x100 | i, &error_abor= t); - object_property_set_int(obj, "core-count", ARRAY_SIZE(s->lpd.rpu.c= pu), - &error_abort); - object_property_set_link(obj, "memory", OBJECT(&s->lpd.rpu.mr), - &error_abort); - qdev_realize(DEVICE(obj), NULL, &error_fatal); - } - - qdev_realize(DEVICE(&s->lpd.rpu.cluster), NULL, &error_fatal); -} - static void versal_create_uart(Versal *s, const VersalSimplePeriphMap *map, int chardev_idx) { DeviceState *dev; @@ -1638,11 +1633,11 @@ static void versal_realize(DeviceState *dev, Error = **errp) qemu_fdt_setprop_cell(s->cfg.fdt, "/", "interrupt-parent", s->phandle.= gic); qemu_fdt_setprop_cell(s->cfg.fdt, "/", "#size-cells", 0x2); qemu_fdt_setprop_cell(s->cfg.fdt, "/", "#address-cells", 0x2); =20 versal_create_cpu_cluster(s, &map->apu); - versal_create_rpu_cpus(s); + versal_create_cpu_cluster(s, &map->rpu); =20 for (i =3D 0; i < map->num_uart; i++) { versal_create_uart(s, &map->uart[i], i); } =20 @@ -1694,12 +1689,10 @@ static void versal_realize(DeviceState *dev, Error = **errp) /* Create the On Chip Memory (OCM). */ memory_region_init_ram(&s->lpd.mr_ocm, OBJECT(s), "ocm", MM_OCM_SIZE, &error_fatal); =20 memory_region_add_subregion_overlap(&s->mr_ps, MM_OCM, &s->lpd.mr_ocm,= 0); - memory_region_add_subregion_overlap(&s->lpd.rpu.mr, 0, - &s->lpd.rpu.mr_ps_alias, 0); } =20 DeviceState *versal_get_boot_cpu(Versal *s) { return DEVICE(versal_get_child_idx(s, "apu-cluster/apu", 0)); @@ -1806,14 +1799,11 @@ int versal_get_num_sdhci(VersalVersion version) static void versal_base_init(Object *obj) { Versal *s =3D XLNX_VERSAL_BASE(obj); size_t i, num_can; =20 - memory_region_init(&s->lpd.rpu.mr, obj, "mr-rpu", UINT64_MAX); memory_region_init(&s->mr_ps, obj, "mr-ps-switch", UINT64_MAX); - memory_region_init_alias(&s->lpd.rpu.mr_ps_alias, OBJECT(s), - "mr-rpu-ps-alias", &s->mr_ps, 0, UINT64_MAX); s->intc =3D g_array_new(false, false, sizeof(DeviceState *)); =20 num_can =3D versal_get_map(s)->num_canfd; s->cfg.canbus =3D g_new0(CanBusState *, num_can); =20 --=20 2.50.1