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[219.106.231.132]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-245ed4c6fb7sm78560215ad.89.2025.08.22.02.25.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Aug 2025 02:25:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=igel-co-jp.20230601.gappssmtp.com; s=20230601; t=1755854707; x=1756459507; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zCby+eLrg4GAHoTlGaZ+HvxqNUEpTOhGwkTAgVF2XVQ=; b=smxz4qOjekaPlYatmjCZX2+1yw+qAm94ZfmUiUPcX/WHVhSgyqKf+by/sMgJkBSeCv U+qp4xqfXgCTmXQix+L592Zlb2LwcJDwiUOEdJQ3gcT8FG/sO2ha/7wWxrzEkrQr5f23 UP+riUrwkxrJLTE1ubbrHwhEZX2LssEd22KLjP24bJmpVjmYvFm1lLCuvKbJamoOirF/ xLoAbWg4HTQJ8fIShFRkQ7tZhn7OCQeeJPc5LofnQFD9g+uEejzPZaW/kk30zO5E504/ 5dWyQ8RXMo0wVN7IJ0sNrddkST75BpW529zgk41lAfBths9vOMPpWQZbyRmIe3BpKrUE 7fmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1755854707; x=1756459507; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zCby+eLrg4GAHoTlGaZ+HvxqNUEpTOhGwkTAgVF2XVQ=; b=C7tdF8p7CpTddQnHXF8rYMSFmuQlxE71ShJx+8kLsbIHV+8n7uxLiogpimQQXDYjfv N/g/o3/ifq22tU4jr1LymVv0g/VPLpopkYdRX6/sF9BLWoZe5s1XblK33xeytczOrlBt k6JWhfag+Rev/Z4GFsf3396qWTRllJ+IuXNu0TIyiTuHrOYs+XqG6G/v9Xe0GHupi7nS UzTxePirVjD7MAm0f2lGRtChiE8wh2zkWE/tUyNwyaLGXrOThVNH5DUicGxGHJyGvyhC Z5SyWB87uV9jG1T72Cbf7z8XY77FPwt44qa4eNeThyPnGm33tiFJJuy/6b24rxw8RusB T3hQ== X-Gm-Message-State: AOJu0YyW2iHmXI/U0nFpZnZx/tmJ9jKgkENSC6Z9uX5yZUcLJfCwIGYx 6Vp4EkeLMWJHnlE/3vdfWmf6K/OOL9/N10I7mnrV2gD22VsWzN9nthLJMRI91fg7ZXm1XpfKWXQ 12l+9AEE= X-Gm-Gg: ASbGncsJtoM9Cz4di8+g6beqfR/i26CoHgAz60NSva8Fg4yLAWbUAtPkHJ0QLH66MDi z+YSkF1RAe5ioIxPsR6tXHRxM2hy5UNisAmJMIyzhMkH3QJ+t9brA/AVJ1Zot9jfppUnTnfjNDR iYSaUv8qirYz6eABosZqD33zSuR6ea+4IVUDGJ3WWaFToXawvKqfMIaLYBaenFEFIzD6s80XbXU v/4IRiGZDOupUOBb3sEG3PBx4Qv/cczwpTdcpYjfCIZb9LnARqjCys97JFlHUB3gByO48sFvHiV YCb9V1b74KdHM3baVswvjOtyohoZRfPzVB/S0QhynSs2zVlVwEZJNyQ/6Ib/WF3Pl4/UarACmeQ c23qUzl2YG7TE22E+sskVAQpnPvE+t7ngK0ujQ1TZGA== X-Google-Smtp-Source: AGHT+IF0Xwuu5LZYmRduWk25dRQ4N23vj9IjGYBGoJ9IRke8ciqE9vsRzsdrjU7wgvFYWKAZPSqDoA== X-Received: by 2002:a17:903:1ac4:b0:240:66ff:b253 with SMTP id d9443c01a7336-2462ef93318mr30091655ad.46.1755854707455; Fri, 22 Aug 2025 02:25:07 -0700 (PDT) From: CJ Chen To: qemu-devel@nongnu.org, qemu-block@nongnu.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org Cc: Paolo Bonzini , Keith Busch , Klaus Jensen , Jesper Devantier , Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Tyrone Ting , Hao Wu , Max Filippov , Peter Xu , David Hildenbrand , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Fabiano Rosas , Laurent Vivier , Tomoyuki Hirose , Peter Maydell , CJ Chen Subject: [RFC PATCH v2 1/9] doc/devel/memory.rst: additional explanation for unaligned access Date: Fri, 22 Aug 2025 18:24:02 +0900 Message-Id: <20250822092410.25833-2-cjchen@igel.co.jp> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250822092410.25833-1-cjchen@igel.co.jp> References: <20250822092410.25833-1-cjchen@igel.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=cjchen@igel.co.jp; helo=mail-pl1-x631.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Fri, 22 Aug 2025 09:53:58 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @igel-co-jp.20230601.gappssmtp.com) X-ZM-MESSAGEID: 1755871050023124100 Add documentation to clarify that if `.valid.unaligned =3D true` but `.impl.unaligned =3D false`, QEMU=E2=80=99s memory core will automatically = split unaligned guest accesses into multiple aligned accesses. This helps devices avoid implementing their own unaligned logic, but can be problematic for devices with side-effect-heavy registers. Also note that setting `.valid.unaligned =3D false` together with `.impl.unaligned =3D true` is invalid, as it contradicts itself and will trigger an assertion. Signed-off-by: CJ Chen Acked-by: Tomoyuki Hirose Suggested-by: Peter Maydell --- docs/devel/memory.rst | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/docs/devel/memory.rst b/docs/devel/memory.rst index 57fb2aec76..71d7de7ae5 100644 --- a/docs/devel/memory.rst +++ b/docs/devel/memory.rst @@ -365,6 +365,24 @@ callbacks are called: - .impl.unaligned specifies that the *implementation* supports unaligned accesses; if false, unaligned accesses will be emulated by two aligned accesses. +- Additionally, if .valid.unaligned =3D true but .impl.unaligned =3D false= , the + memory core will emulate each unaligned guest access by splitting it into + multiple aligned sub-accesses. This ensures that devices which only hand= le + aligned requests do not need to implement unaligned logic themselves. For + example, see xhci_cap_ops in hw/usb/hcd-xhci.c: it sets .valid.unaligned + =3D true so guests can do unaligned reads on the xHCI Capability Registe= rs, + while keeping .impl.unaligned =3D false to rely on the core splitting lo= gic. + However, if a device=E2=80=99s registers have side effects on read or wr= ite, this + extra splitting can introduce undesired behavior. Specifically, for devi= ces + whose registers trigger state changes on each read/write, splitting an a= ccess + can lead to reading or writing bytes beyond the originally requested sub= range + thereby triggering repeated or otherwise unintended register side effect= s. + In such cases, one should set .valid.unaligned =3D false to reject unali= gned + accesses entirely. +- Conversely, if .valid.unaligned =3D false but .impl.unaligned =3D true, + that setting is considered invalid; it claims unaligned access is allowed + by the implementation yet disallowed for the device. QEMU enforces this = with + an assertion to prevent contradictory usage. =20 API Reference ------------- --=20 2.25.1