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a="68851901" X-IronPort-AV: E=Sophos;i="6.17,309,1747724400"; d="scan'208";a="68851901" X-CSE-ConnectionGUID: cnbKnYCnTy2jM849mOPbLw== X-CSE-MsgGUID: yNkLsunpSme8e3KrzeFUKQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.17,309,1747724400"; d="scan'208";a="168244954" From: Zhenzhong Duan To: qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, jasowang@redhat.com, peterx@redhat.com, ddutile@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Zhenzhong Duan Subject: [PATCH v5 09/21] intel_iommu: Fail passthrough device under PCI bridge if x-flts=on Date: Fri, 22 Aug 2025 02:40:47 -0400 Message-ID: <20250822064101.123526-10-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250822064101.123526-1-zhenzhong.duan@intel.com> References: <20250822064101.123526-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.198.163.9; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1755845210165124100 Content-Type: text/plain; charset="utf-8" Currently we don't support nested translation for passthrough device with emulated device under same PCI bridge, because they require different addre= ss space when x-flts=3Don. In theory, we do support if devices under same PCI bridge are all passthrou= gh devices. But emulated device can be hotplugged under same bridge. To simpli= fy, just forbid passthrough device under PCI bridge no matter if there is, or w= ill be emulated devices under same bridge. This is acceptable because PCIE brid= ge is more popular than PCI bridge now. Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan Reviewed-by: Eric Auger Reviewed-by: Yi Liu --- hw/i386/intel_iommu.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index da355bda79..6edd91d94e 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -4341,9 +4341,10 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s,= PCIBus *bus, return vtd_dev_as; } =20 -static bool vtd_check_hiod(IntelIOMMUState *s, HostIOMMUDevice *hiod, +static bool vtd_check_hiod(IntelIOMMUState *s, VTDHostIOMMUDevice *vtd_hio= d, Error **errp) { + HostIOMMUDevice *hiod =3D vtd_hiod->hiod; HostIOMMUDeviceClass *hiodc =3D HOST_IOMMU_DEVICE_GET_CLASS(hiod); int ret; =20 @@ -4370,6 +4371,8 @@ static bool vtd_check_hiod(IntelIOMMUState *s, HostIO= MMUDevice *hiod, #ifdef CONFIG_IOMMUFD struct HostIOMMUDeviceCaps *caps =3D &hiod->caps; struct iommu_hw_info_vtd *vtd =3D &caps->vendor_caps.vtd; + PCIBus *bus =3D vtd_hiod->bus; + PCIDevice *pdev =3D pci_find_device(bus, pci_bus_num(bus), vtd_hiod->d= evfn); =20 /* Remaining checks are all stage-1 translation specific */ if (!object_dynamic_cast(OBJECT(hiod), TYPE_HOST_IOMMU_DEVICE_IOMMUFD)= ) { @@ -4392,6 +4395,12 @@ static bool vtd_check_hiod(IntelIOMMUState *s, HostI= OMMUDevice *hiod, error_setg(errp, "Stage-1 1GB huge page is unsupported by host IOM= MU"); return false; } + + if (pci_device_get_iommu_bus_devfn(pdev, &bus, NULL, NULL)) { + error_setg(errp, "Host device under PCI bridge is unsupported " + "when x-flts=3Don"); + return false; + } #endif =20 error_setg(errp, "host IOMMU is incompatible with stage-1 translation"= ); @@ -4425,7 +4434,7 @@ static bool vtd_dev_set_iommu_device(PCIBus *bus, voi= d *opaque, int devfn, vtd_hiod->iommu_state =3D s; vtd_hiod->hiod =3D hiod; =20 - if (!vtd_check_hiod(s, hiod, errp)) { + if (!vtd_check_hiod(s, vtd_hiod, errp)) { g_free(vtd_hiod); vtd_iommu_unlock(s); return false; --=20 2.47.1