From nobody Sat Nov 15 05:29:27 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass(p=quarantine dis=none) header.from=amd.com ARC-Seal: i=2; a=rsa-sha256; t=1755782050; cv=pass; d=zohomail.com; s=zohoarc; b=QfVPEDyXZNaba/jKj5suXaCvgkWFIfE9lc2gvzdQWWjTvJrFyltK49WQZTS2oxYk/rVw5K61LgEdyd9oPS9XjB3Edt04rKjwgJFrJphJi9i4OfN9GnaBFYWXVXbJXTCw7FELOseoLEduUU7sjr5sdEgX1TDEs2X75ITF3OAoz/k= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1755782050; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=t+jqUnyUVgSdl8RXZn+aPVdWt5TVe6+V+UsqqcrIPqg=; b=Pj4V8jvN8K3OfdWMJZlJIZyLUy6p1Ssr/vDZhINew1T0+759Vs0u01XKLfmwl25Buz6qkxDfUm3X43iQPFhFgTTZ7Ba17pMt0uNKg/YnL8FTWF9Jq+nRMNdzlTPMz9JWmi6pxNpWvklB+ary+5jCmr4VcXA3cEnCja4mAd2Dw3s= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1755782050237687.1587567356344; Thu, 21 Aug 2025 06:14:10 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1up4y6-0001Lf-4E; Thu, 21 Aug 2025 09:04:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1up4xw-0001Hz-79; Thu, 21 Aug 2025 09:04:32 -0400 Received: from mail-bn7nam10on2061d.outbound.protection.outlook.com ([2a01:111:f403:2009::61d] helo=NAM10-BN7-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1up4xs-0002sI-0Y; Thu, 21 Aug 2025 09:04:26 -0400 Received: from SA1PR03CA0024.namprd03.prod.outlook.com (2603:10b6:806:2d3::25) by LV3PR12MB9096.namprd12.prod.outlook.com (2603:10b6:408:198::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9031.25; Thu, 21 Aug 2025 13:04:12 +0000 Received: from SA2PEPF00001508.namprd04.prod.outlook.com (2603:10b6:806:2d3:cafe::32) by SA1PR03CA0024.outlook.office365.com (2603:10b6:806:2d3::25) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9052.16 via Frontend Transport; Thu, 21 Aug 2025 13:04:12 +0000 Received: from SATLEXMB03.amd.com (165.204.84.17) by SA2PEPF00001508.mail.protection.outlook.com (10.167.242.40) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.9052.8 via Frontend Transport; Thu, 21 Aug 2025 13:04:12 +0000 Received: from satlexmb08.amd.com (10.181.42.217) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 21 Aug 2025 08:04:08 -0500 Received: from SATLEXMB04.amd.com (10.181.40.145) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.1748.10; Thu, 21 Aug 2025 06:04:08 -0700 Received: from XFR-LUMICHEL-L2.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Thu, 21 Aug 2025 08:04:06 -0500 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=fXD7xA7LFpCm7lRRFk2oa22neJnvRTPEi4kECV3czusjALtjL0Vct4rLVEmdrpESnUpUDP2cgU5EVK8SAeLbpQ5AkKZeTyA3Q67837VD3EU6yoDGvOZjfRwh6L/CfSVqUAg5cT178ncfINw+jtjWZTcI2J8Nwg4CC/jiDD1ZSVs4ZzkhFdZUePJSHjFoLdDbxoIxAWHvCNasizD3yolO5MZHM+1q6JUOkAPUoVOTfnlJAEBQQ5oaj34QXgbdgZw4jr4BvebEQiIMLZSQTGCubFKB8DjriP7x/xzjE8DspnWWsS2TKG/fLSB3Aw1qk387nE7h1nLeYC5sR8fik9tUHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=t+jqUnyUVgSdl8RXZn+aPVdWt5TVe6+V+UsqqcrIPqg=; b=tw4lPVKyxCy2qffwNIQqVnnPmFRSgMznYXCfeB3x+RWo5vnnGHGBk5bcQHib+vYyotH8H9Mp4zBr/AHLfiynO8mZ7YXxH+f8b6cBRbPxXf5yyfGawxZW8SpEpYezlzIy6Jk/nH5C1No4tlPQ42xrMAgTtweOHw8vexjgqwOub6GOnhAAqcGOx/sLASsFl7IlICfMGClGhR/4Uq0CisSFBR78LkmlkUML8xk0ZKRmTE8LyNksHVXiXCG+/zBSi6otaYazl3ob1FvB8oVaZPb5QSVrxUChRdulK5HFhQW1WWs+pWbW6Z5Zr+dV15V/ED5x3etAa3lLA7mCNZ/SvlmI0w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=nongnu.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=t+jqUnyUVgSdl8RXZn+aPVdWt5TVe6+V+UsqqcrIPqg=; b=eKLrkjK0VXVa3AJE/Ge4yKm6xh+oG8N01ddgr7dxekM3CdDudTXiiD0+kgQhCuVQkjzQiB1kS+usR6dwrEWfRrchIMOzCC4pzKo6dnDKjfUXi5ZbttOYq6I3stIQ1epbSoUY+iM2ZEMoDRO+dGixs4Kwlo3kxj9kEQqnqYGgBUU= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Luc Michel To: , CC: Luc Michel , Peter Maydell , Francisco Iglesias , "Edgar E . Iglesias" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , "Frederic Konrad" , Sai Pavan Boddu Subject: [PATCH v3 03/47] hw/arm/xlnx-versal: uart: refactor creation Date: Thu, 21 Aug 2025 15:03:02 +0200 Message-ID: <20250821130354.125971-4-luc.michel@amd.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250821130354.125971-1-luc.michel@amd.com> References: <20250821130354.125971-1-luc.michel@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001508:EE_|LV3PR12MB9096:EE_ X-MS-Office365-Filtering-Correlation-Id: b1f1388f-4376-4958-04ae-08dde0b33950 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|36860700013|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?m8nScBRKtxi9VjUv7eZ3b+tpJmwgzx1IQl7zDNvioIr8i5wUTFFCtUtTSJIR?= =?us-ascii?Q?FJlzCBMLRiMCUWnW1+J3iQbWpL0i9FjTIK5RTb5ED7zY04F0+hMj9XPQySL/?= =?us-ascii?Q?dvJhxg3ZzzuoA2BgCrFhfYv/SLylCNSdDT+3W79MWqR2C4f2o+oWLiDNbIrJ?= =?us-ascii?Q?AWds/Vr1rXT9oqQSXtq4/z/65RNF8SbG7S/7bBBAUvO/jgvUbE8KzvX1UrpE?= =?us-ascii?Q?vayRq8ryMbVVqQoXb0zOM/2VdCKlx2HGS70q4fVjrgAXRQrSpgngn1ikb8gC?= =?us-ascii?Q?Mt1xqrL1eWb8WXuwmX3PxB9qZNsvqDOPEzYBY67m7MxmfyligSYPan1bYt+l?= =?us-ascii?Q?Z2yeQ5DzoVES0176j5tA0E/3HTBdH5XFlMOGnB4RCFnwNKYIaBa7jqGUl6nL?= =?us-ascii?Q?Xt2l9buimbQCF6Vu/7ChKa4yZKAcjuvtakgYGwkU42viXR1gncuyJv68tQdO?= =?us-ascii?Q?bH7uVD6vuw8oPURV38K1cFpQOFixK3avcNexQTnW4k3yaykHNnUc1mfBN+5e?= =?us-ascii?Q?H3mAIfXsIa4MVm0nG6Hfe0JgeXnte3SdzcHdnyA0sAt1Jb8IPj47A9ZQDSZg?= =?us-ascii?Q?o6YnSCGw1s49avfVW+1k6pg3x7SdGVnd8fafSprxKXTVxImZ5ChauXqfM50j?= =?us-ascii?Q?ApzUGTSJSDM9IBLJp7RzfHCxLf0qJc1pmRHDFTdhMDiZwRW5YQSo/8qzybT/?= =?us-ascii?Q?GO2SpfvAn/R82gni4O8fJ6v3YRoTyqgQOrXaJdiK/2qzQVhrLflgR4JUFeBW?= =?us-ascii?Q?sMeEDlEe3XTzmZF5VLUvD4pbPIBJCWrY1ptTGCwejb8NyqPTItJszWeXaJ51?= =?us-ascii?Q?8IJfm4Nv+rTpEfW8dajfAFtrgCuqjKrYH+haLAy+hCOuWPLmqnv3qHb32YJe?= =?us-ascii?Q?sjkVTvUNFm2y+a6qKQUovBW4Wo5Kn+G36BbazHwRuBIiaUNH60qcruS/qpd4?= =?us-ascii?Q?DQOddCe6AacWpubkMXoHznMxKEWGJTsVEa87IeTmNYMR1RU6VoD+tZQfLshl?= =?us-ascii?Q?dUR9iwWCJ7i/BuNTjdF5CiKG36ifk49FUGV8km9R7YOdzd0bxy/N6Ymd/I+y?= =?us-ascii?Q?rnrBMGw7pE9V0U6v3Xo+OHBcn5Xc5Exk+CTUPURi2ZAJjGUHYrdp/qJ0zHC+?= =?us-ascii?Q?/AxJI6erFH9KF62sOd0NAlvKTxplK6Ndmn2FBqDN/d3z+dCTULaLQd8+urh6?= =?us-ascii?Q?lODst0VhLfStMvNP5hjfi8MopbL74RXk4dDTl1c1ynHHnem8lR+lq9Gmqfha?= =?us-ascii?Q?23EM2/eE77n0eTd+D9O6dXw3CzKu9N0Rg/yPnfQZlre7ix8OkwXuxa+w2nxy?= =?us-ascii?Q?iO89WKhHA5OVwf6/6g6dBJv7YJ4VmuhhlpN9naYc4Bu9z3MlVHVYMyHk0MjW?= =?us-ascii?Q?ql/IvV/CDWXcxQfxI5U0goADpJVZz3uaSpFw3zSS60rceZ4gLLpR5dKrQ0kJ?= =?us-ascii?Q?0z0pXbKAAnH8eaWORBF8GDvJ5yWwxEyeteLKUvKn05apwcySbcSZFBetGTcV?= =?us-ascii?Q?Gbo9zD2JLSm8gOcMXXkyspN9XVJNxFt8kfgb?= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Aug 2025 13:04:12.1051 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b1f1388f-4376-4958-04ae-08dde0b33950 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001508.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV3PR12MB9096 Received-SPF: permerror client-ip=2a01:111:f403:2009::61d; envelope-from=Luc.Michel@amd.com; helo=NAM10-BN7-obe.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1755782052343116600 Content-Type: text/plain; charset="utf-8" Refactor the UARTs creations. The VersalMap struct is now used to describe the SoC and its peripherals. For now it contains the two UARTs mapping information. The creation function now embeds the FDT creation logic as well. The devices are now created dynamically using qdev_new and (qdev|sysbus)_realize_and_unref. This will allow to rely entirely on the VersalMap structure to create the SoC and allow easy addition of new SoCs of the same family (like versal2 coming with next commits). Note that the connection to the CRL is removed for now and will be re-added by next commits. Signed-off-by: Luc Michel Reviewed-by: Francisco Iglesias --- include/hw/arm/xlnx-versal.h | 2 - hw/arm/xlnx-versal-virt.c | 36 +-------- hw/arm/xlnx-versal.c | 142 ++++++++++++++++++++++++++++------- 3 files changed, 117 insertions(+), 63 deletions(-) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index f2a62b43552..b01ddeb1423 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -16,11 +16,10 @@ #include "hw/sysbus.h" #include "hw/cpu/cluster.h" #include "hw/or-irq.h" #include "hw/sd/sdhci.h" #include "hw/intc/arm_gicv3.h" -#include "hw/char/pl011.h" #include "hw/dma/xlnx-zdma.h" #include "hw/net/cadence_gem.h" #include "hw/rtc/xlnx-zynqmp-rtc.h" #include "qom/object.h" #include "hw/usb/xlnx-usb-subsystem.h" @@ -78,11 +77,10 @@ struct Versal { =20 struct { MemoryRegion mr_ocm; =20 struct { - PL011State uart[XLNX_VERSAL_NR_UARTS]; CadenceGEMState gem[XLNX_VERSAL_NR_GEMS]; OrIRQState gem_irq_orgate[XLNX_VERSAL_NR_GEMS]; XlnxZDMA adma[XLNX_VERSAL_NR_ADMAS]; VersalUsb2 usb; CanBusState *canbus[XLNX_VERSAL_NR_CANFD]; diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 69f3bb401b9..06cc5bae8b0 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -75,10 +75,11 @@ static void fdt_create(VersalVirt *s) =20 s->phandle.usb =3D qemu_fdt_alloc_phandle(s->fdt); s->phandle.dwc =3D qemu_fdt_alloc_phandle(s->fdt); /* Create /chosen node for load_dtb. */ qemu_fdt_add_subnode(s->fdt, "/chosen"); + qemu_fdt_add_subnode(s->fdt, "/aliases"); =20 /* Header */ qemu_fdt_setprop_cell(s->fdt, "/", "interrupt-parent", s->phandle.gic); qemu_fdt_setprop_cell(s->fdt, "/", "#size-cells", 0x2); qemu_fdt_setprop_cell(s->fdt, "/", "#address-cells", 0x2); @@ -206,44 +207,10 @@ static void fdt_add_usb_xhci_nodes(VersalVirt *s) qemu_fdt_setprop_cell(s->fdt, name, "phandle", s->phandle.dwc); qemu_fdt_setprop_string(s->fdt, name, "maximum-speed", "high-speed"); g_free(name); } =20 -static void fdt_add_uart_nodes(VersalVirt *s) -{ - uint64_t addrs[] =3D { MM_UART1, MM_UART0 }; - unsigned int irqs[] =3D { VERSAL_UART1_IRQ_0, VERSAL_UART0_IRQ_0 }; - const char compat[] =3D "arm,pl011\0arm,sbsa-uart"; - const char clocknames[] =3D "uartclk\0apb_pclk"; - int i; - - for (i =3D 0; i < ARRAY_SIZE(addrs); i++) { - char *name =3D g_strdup_printf("/uart@%" PRIx64, addrs[i]); - qemu_fdt_add_subnode(s->fdt, name); - qemu_fdt_setprop_cell(s->fdt, name, "current-speed", 115200); - qemu_fdt_setprop_cells(s->fdt, name, "clocks", - s->phandle.clk_125Mhz, s->phandle.clk_125Mh= z); - qemu_fdt_setprop(s->fdt, name, "clock-names", - clocknames, sizeof(clocknames)); - - qemu_fdt_setprop_cells(s->fdt, name, "interrupts", - GIC_FDT_IRQ_TYPE_SPI, irqs[i], - GIC_FDT_IRQ_FLAGS_LEVEL_HI); - qemu_fdt_setprop_sized_cells(s->fdt, name, "reg", - 2, addrs[i], 2, 0x1000); - qemu_fdt_setprop(s->fdt, name, "compatible", - compat, sizeof(compat)); - qemu_fdt_setprop(s->fdt, name, "u-boot,dm-pre-reloc", NULL, 0); - - if (addrs[i] =3D=3D MM_UART0) { - /* Select UART0. */ - qemu_fdt_setprop_string(s->fdt, "/chosen", "stdout-path", name= ); - } - g_free(name); - } -} - static void fdt_add_canfd_nodes(VersalVirt *s) { uint64_t addrs[] =3D { MM_CANFD1, MM_CANFD0 }; uint32_t size[] =3D { MM_CANFD1_SIZE, MM_CANFD0_SIZE }; unsigned int irqs[] =3D { VERSAL_CANFD1_IRQ_0, VERSAL_CANFD0_IRQ_0 }; @@ -700,11 +667,10 @@ static void versal_virt_init(MachineState *machine) &error_abort); =20 fdt_create(s); versal_set_fdt(&s->soc, s->fdt); fdt_add_gem_nodes(s); - fdt_add_uart_nodes(s); fdt_add_canfd_nodes(s); fdt_add_gic_nodes(s); fdt_add_timer_nodes(s); fdt_add_zdma_nodes(s); fdt_add_usb_xhci_nodes(s); diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 7bb55751e5c..87468cbc291 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -24,18 +24,96 @@ #include "qemu/log.h" #include "target/arm/cpu-qom.h" #include "target/arm/gtimer.h" #include "system/device_tree.h" #include "hw/arm/fdt.h" +#include "hw/char/pl011.h" =20 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") #define GEM_REVISION 0x40070106 =20 #define VERSAL_NUM_PMC_APB_IRQS 18 #define NUM_OSPI_IRQ_LINES 3 =20 +typedef struct VersalSimplePeriphMap { + uint64_t addr; + int irq; +} VersalSimplePeriphMap; + +typedef struct VersalMap { + VersalSimplePeriphMap uart[2]; + size_t num_uart; +} VersalMap; + +static const VersalMap VERSAL_MAP =3D { + .uart[0] =3D { 0xff000000, 18 }, + .uart[1] =3D { 0xff010000, 19 }, + .num_uart =3D 2, +}; + +static const VersalMap *VERSION_TO_MAP[] =3D { + [VERSAL_VER_VERSAL] =3D &VERSAL_MAP, +}; + +static inline VersalVersion versal_get_version(Versal *s) +{ + return XLNX_VERSAL_BASE_GET_CLASS(s)->version; +} + +static inline const VersalMap *versal_get_map(Versal *s) +{ + return VERSION_TO_MAP[versal_get_version(s)]; +} + + +static qemu_irq versal_get_irq(Versal *s, int irq_idx) +{ + return qdev_get_gpio_in(DEVICE(&s->fpd.apu.gic), irq_idx); +} + +static void versal_sysbus_connect_irq(Versal *s, SysBusDevice *sbd, + int sbd_idx, int irq_idx) +{ + qemu_irq irq =3D versal_get_irq(s, irq_idx); + + if (irq =3D=3D NULL) { + return; + } + + sysbus_connect_irq(sbd, sbd_idx, irq); +} + +static inline char *versal_fdt_add_subnode(Versal *s, const char *path, + uint64_t at, const char *compat, + size_t compat_sz) +{ + char *p; + + p =3D g_strdup_printf("%s@%" PRIx64, path, at); + qemu_fdt_add_subnode(s->cfg.fdt, p); + + if (!strncmp(compat, "memory", compat_sz)) { + qemu_fdt_setprop(s->cfg.fdt, p, "device_type", compat, compat_sz); + } else { + qemu_fdt_setprop(s->cfg.fdt, p, "compatible", compat, compat_sz); + } + + return p; +} + +static inline char *versal_fdt_add_simple_subnode(Versal *s, const char *p= ath, + uint64_t addr, uint64_t = len, + const char *compat, + size_t compat_sz) +{ + char *p =3D versal_fdt_add_subnode(s, path, addr, compat, compat_sz); + + qemu_fdt_setprop_sized_cells(s->cfg.fdt, p, "reg", 2, addr, 2, len); + return p; +} + static void versal_create_apu_cpus(Versal *s) { int i; =20 object_initialize_child(OBJECT(s), "apu-cluster", &s->fpd.apu.cluster, @@ -165,32 +243,48 @@ static void versal_create_rpu_cpus(Versal *s) } =20 qdev_realize(DEVICE(&s->lpd.rpu.cluster), NULL, &error_fatal); } =20 -static void versal_create_uarts(Versal *s, qemu_irq *pic) +static void versal_create_uart(Versal *s, + const VersalSimplePeriphMap *map, + int chardev_idx) { - int i; + DeviceState *dev; + MemoryRegion *mr; + g_autofree char *node; + g_autofree char *alias; + const char compatible[] =3D "arm,pl011\0arm,sbsa-uart"; + const char clocknames[] =3D "uartclk\0apb_pclk"; =20 - for (i =3D 0; i < ARRAY_SIZE(s->lpd.iou.uart); i++) { - static const int irqs[] =3D { VERSAL_UART0_IRQ_0, VERSAL_UART1_IRQ= _0}; - static const uint64_t addrs[] =3D { MM_UART0, MM_UART1 }; - char *name =3D g_strdup_printf("uart%d", i); - DeviceState *dev; - MemoryRegion *mr; + dev =3D qdev_new(TYPE_PL011); + object_property_add_child(OBJECT(s), "uart[*]", OBJECT(dev)); + qdev_prop_set_chr(dev, "chardev", serial_hd(chardev_idx)); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); =20 - object_initialize_child(OBJECT(s), name, &s->lpd.iou.uart[i], - TYPE_PL011); - dev =3D DEVICE(&s->lpd.iou.uart[i]); - qdev_prop_set_chr(dev, "chardev", serial_hd(i)); - sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); + mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); + memory_region_add_subregion(&s->mr_ps, map->addr, mr); =20 - mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); - memory_region_add_subregion(&s->mr_ps, addrs[i], mr); + versal_sysbus_connect_irq(s, SYS_BUS_DEVICE(dev), 0, map->irq); =20 - sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[irqs[i]]); - g_free(name); + node =3D versal_fdt_add_simple_subnode(s, "/uart", map->addr, 0x1000, + compatible, sizeof(compatible)); + qemu_fdt_setprop_cell(s->cfg.fdt, node, "current-speed", 115200); + qemu_fdt_setprop_cells(s->cfg.fdt, node, "clocks", + s->phandle.clk_125mhz, s->phandle.clk_125mhz); + qemu_fdt_setprop(s->cfg.fdt, node, "clock-names", clocknames, + sizeof(clocknames)); + qemu_fdt_setprop_cells(s->cfg.fdt, node, "interrupts", + GIC_FDT_IRQ_TYPE_SPI, map->irq, + GIC_FDT_IRQ_FLAGS_LEVEL_HI); + qemu_fdt_setprop(s->cfg.fdt, node, "u-boot,dm-pre-reloc", NULL, 0); + + alias =3D g_strdup_printf("serial%d", chardev_idx); + qemu_fdt_setprop_string(s->cfg.fdt, "/aliases", alias, node); + + if (chardev_idx =3D=3D 0) { + qemu_fdt_setprop_string(s->cfg.fdt, "/chosen", "stdout-path", node= ); } } =20 static void versal_create_canfds(Versal *s, qemu_irq *pic) { @@ -781,18 +875,10 @@ static void versal_create_crl(Versal *s, qemu_irq *pi= c) object_property_set_link(OBJECT(&s->lpd.crl), name, OBJECT(&s->lpd.iou.adma[i]), &error_abort); } =20 - for (i =3D 0; i < ARRAY_SIZE(s->lpd.iou.uart); i++) { - g_autofree gchar *name =3D g_strdup_printf("uart[%d]", i); - - object_property_set_link(OBJECT(&s->lpd.crl), - name, OBJECT(&s->lpd.iou.uart[i]), - &error_abort); - } - object_property_set_link(OBJECT(&s->lpd.crl), "usb", OBJECT(&s->lpd.iou.usb), &error_abort); =20 sysbus_realize(sbd, &error_fatal); @@ -955,11 +1041,15 @@ static void versal_realize(DeviceState *dev, Error *= *errp) s->phandle.clk_125mhz =3D fdt_add_clk_node(s, "/clk125", 125 * 1000 * = 1000); =20 versal_create_apu_cpus(s); versal_create_apu_gic(s, pic); versal_create_rpu_cpus(s); - versal_create_uarts(s, pic); + + for (i =3D 0; i < map->num_uart; i++) { + versal_create_uart(s, &map->uart[i], i); + } + versal_create_canfds(s, pic); versal_create_usbs(s, pic); versal_create_gems(s, pic); versal_create_admas(s, pic); versal_create_sds(s, pic); --=20 2.50.1