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Iglesias" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , "Frederic Konrad" , Sai Pavan Boddu Subject: [PATCH v3 34/47] hw/arm/xlnx-versal: use hw/arm/bsa.h for timer IRQ indices Date: Thu, 21 Aug 2025 15:03:33 +0200 Message-ID: <20250821130354.125971-35-luc.michel@amd.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250821130354.125971-1-luc.michel@amd.com> References: <20250821130354.125971-1-luc.michel@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001508:EE_|DM4PR12MB6349:EE_ X-MS-Office365-Filtering-Correlation-Id: 0bb4c92d-087a-4f86-f6a4-08dde0b36066 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|1800799024|376014|36860700013; X-Microsoft-Antispam-Message-Info: =?utf-8?B?cHR3Z3hGZkljb25rR29MV1NvS0ZNTmMvSGw4QWpoT1R5dWdSZTJXSmVqazNY?= =?utf-8?B?enQrQWUrVEFEaC8zRllZNFE1NzR2R1dmVzhodnZWcEFCbDdGeFB6VVE1V0xP?= =?utf-8?B?VHN2eGdUZFh5dmVyL0FQK0JlZVZxRGJTaGk3Zm9obDEwRTV3dG9pbFliU1Nu?= =?utf-8?B?K1hXTTFPbVZjMDRiT3RORWdBSTZKYm83RkVRUlBsVVlZblNlRzIrdEFPUktY?= =?utf-8?B?Z3RjRG5hbitIUVVvazh5ckJwTzZCTWFicWtQZC9hUUhYeEtsUXJyYnRqYVpM?= =?utf-8?B?M2FKOHBZUjFTNnBRWisrVSs1MW4wYk5lUkFsNmFsSUNTWnNZQS9raStESVB2?= =?utf-8?B?SnlFOE9YOERWbUJDS3Fub08wR2VMOXRKbXFFcTRLd3l2enZJYVRub3FWV0pr?= =?utf-8?B?UnE4RVNMQlF5aG1sZHhXUW1sZGRoVXZGRVFRN0NQZnczRFR2c1lTN1d6bWlv?= =?utf-8?B?RWxXWC9yV09UcVY2dUV2OUlBbzRrUmhVNnRoenBKOGRLRkpGYktWS2dhTmNY?= =?utf-8?B?K2h1SGE2eGNMaGpLdXkvUGt6M3JYWU1SQlduS0plZFMxVys4SWxZaXhienJG?= =?utf-8?B?T3FKRHpJRzIvWWUwVC9jcC92dytLWWJqd2c4b0l0OVFmRHE4YVpRZE01V21s?= =?utf-8?B?eHMxWmN3c3RoVHQ4WFRxNm9ZTGE0M2R2d1E3RG1FazgyRktiT2Y1RmVqNkRJ?= =?utf-8?B?QWdyd2pOTHlNeDNoRVhQMTZUZzZxcXJ0VkhNWDRycDBQanVrTTAvU1hOOXkw?= =?utf-8?B?Z21mbFRmaWFaODFHancrcVd1U0pueUhKTk8weWpCU3B5aUoxazQ5V2hqVkRx?= =?utf-8?B?K0kwaXg3TVdMYzNHYlF1dnZxL0k1T3AyNDk0dy9la3UzZmt5TndSZnB5eXBt?= =?utf-8?B?YmMzZkV4K01XVFcyL2dKYlUzVEdVeHdpcndEYnFORkRDTjk4cVNDYkpMSVN1?= =?utf-8?B?UDRDMUN4dHdQYlJiWjMyN3JOM0xUK2tzOVk1RHZrZ000b09ZLy9UbWR2WEs5?= =?utf-8?B?ZUYxVU9sc2hnbUFPd0tycFQ4WFFSYzd1Y3pLdnZIUHdxV1FDTkF3d29NY1dV?= =?utf-8?B?MmtGSE1VRzczZnVnaW9mamV5REU1K29nQXphcEM5ekcvcGZjT3gxVFc4NGx6?= =?utf-8?B?amM2ZmRYRTdZcWFXdkRrU0JNUWdFQjJtMU1ZMTV5L0xEd0JldEpzc3o1ZWJs?= =?utf-8?B?TXFodVNLNnIzMGl6c0sxcTNHV016OGRGM1ltVFNwajZ0RXpzM2xmRmsxL3B2?= =?utf-8?B?OVFoS3lzSzJ1K2xJakpsZUJyUWswSWptTVNUdXk3UkIzbWQyS1BqU0JPcVN2?= =?utf-8?B?bDE5UXFwMEhkM0tlL2t4OTVvdFpSU2kyVzk5WDJaMkJ4UytucEVHdEJPYjhj?= =?utf-8?B?V0NMZEVEdHdaUkVXNnAwOUdpUjgvSko0R2R1QkVSaDh3Tm1iU3E2YUJDbzFY?= =?utf-8?B?dEJZTllKUml4TUpvd2taV0ttRU5pY2lzUXFrYXdVbElxT1RDdi9HbldzOG1i?= =?utf-8?B?MFR0d3k4MVgvRFlqN29XY2xYTmdKMUZRWnBSNCs4K0Y5aUxIZ3dWT1BILzJC?= =?utf-8?B?TDhwbXNnNGxXTGZGM0V6MXFCRVFqZG94cUZVOURqSkNodXVDckllVllMcks5?= =?utf-8?B?OXJVN1ZCa05Pd2xYbFJTb2xjUmNCdkFSeGJGeEFaL0xYZHpyM1FBVFFSSHZB?= =?utf-8?B?YlprbzNxVU5WNml1QUdqRktEcUJ5SzVpQ21hT2s0Q1V1WTVQQThySytQOWdP?= =?utf-8?B?b0RZWU9WQTgwOGZPYkQwS1B0akhOZ2FZdGFWbTNJS0F0UHhpR3ZFamlKdkIx?= =?utf-8?B?aGFBNHRuTjVvRHpaZjk4S1U4djUyTVFaN1gzUENNUmU3QzloTFJoQmtleXk0?= =?utf-8?B?WkpLY0dMOFZQcEJYVk5iQ0hYWno4VjAvSHRVQm8vNnNsRmpqcmVYUG5vWWR2?= =?utf-8?B?NnNnblVFZjdjc1NlZnBOV1dzc0N2U1BXUlAvR0VncGpXOUdPNFVabFJaQlZZ?= =?utf-8?B?aDJ5VkNJRitQZE4rU2dSQ0xWekJweGl3SjY2MzRQVGZ6YUUvOHdBc2k5Y3BO?= =?utf-8?Q?O1e5kO?= X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Signed-off-by: Luc Michel Reviewed-by: Francisco Iglesias Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/arm/xlnx-versal.h | 6 ------ hw/arm/xlnx-versal.c | 28 +++++++++++++++++----------- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 7bdf6dab629..da0260b83de 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -85,16 +85,10 @@ int versal_get_num_can(VersalVersion version); int versal_get_num_sdhci(VersalVersion version); =20 /* Memory-map and IRQ definitions. Copied a subset from * auto-generated files. */ =20 -#define VERSAL_GIC_MAINT_IRQ 9 -#define VERSAL_TIMER_VIRT_IRQ 11 -#define VERSAL_TIMER_S_EL1_IRQ 13 -#define VERSAL_TIMER_NS_EL1_IRQ 14 -#define VERSAL_TIMER_NS_EL2_IRQ 10 - #define VERSAL_CRL_IRQ 10 #define VERSAL_UART0_IRQ_0 18 #define VERSAL_UART1_IRQ_0 19 #define VERSAL_CANFD0_IRQ_0 20 #define VERSAL_CANFD1_IRQ_0 21 diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 63c4e6eea6e..28db3f263c6 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -47,10 +47,11 @@ #include "hw/intc/arm_gicv3_its_common.h" #include "hw/intc/arm_gic.h" #include "hw/core/split-irq.h" #include "target/arm/cpu.h" #include "hw/cpu/cluster.h" +#include "hw/arm/bsa.h" =20 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") #define GEM_REVISION 0x40070106 =20 @@ -671,11 +672,12 @@ static DeviceState *versal_create_gic(Versal *s, } =20 qemu_fdt_setprop_cell(s->cfg.fdt, node, "phandle", s->phandle.gic); qemu_fdt_setprop_cell(s->cfg.fdt, node, "#interrupt-cells", 3); qemu_fdt_setprop_cells(s->cfg.fdt, node, "interrupts", - GIC_FDT_IRQ_TYPE_PPI, VERSAL_GIC_MAINT_IRQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_GIC_MAINT_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI); qemu_fdt_setprop(s->cfg.fdt, node, "interrupt-controller", NULL, 0= ); } =20 versal_create_gic_its(s, map, dev, mr, node); @@ -696,14 +698,14 @@ static void connect_gic_to_cpu(const VersalCpuCluster= Map *map, /* * Mapping from the output timer irq lines from the CPU to the * GIC PPI inputs. */ const int timer_irq[] =3D { - [GTIMER_PHYS] =3D VERSAL_TIMER_NS_EL1_IRQ, - [GTIMER_VIRT] =3D VERSAL_TIMER_VIRT_IRQ, - [GTIMER_HYP] =3D VERSAL_TIMER_NS_EL2_IRQ, - [GTIMER_SEC] =3D VERSAL_TIMER_S_EL1_IRQ, + [GTIMER_PHYS] =3D INTID_TO_PPI(ARCH_TIMER_NS_EL1_IRQ), + [GTIMER_VIRT] =3D INTID_TO_PPI(ARCH_TIMER_VIRT_IRQ), + [GTIMER_HYP] =3D INTID_TO_PPI(ARCH_TIMER_NS_EL2_IRQ), + [GTIMER_SEC] =3D INTID_TO_PPI(ARCH_TIMER_S_EL1_IRQ), }; =20 has_gtimer =3D arm_feature(&ARM_CPU(cpu)->env, ARM_FEATURE_GENERIC_TIM= ER); =20 if (has_gtimer) { @@ -714,13 +716,13 @@ static void connect_gic_to_cpu(const VersalCpuCluster= Map *map, } } =20 if (map->gic.version =3D=3D 3) { qemu_irq maint_irq; + int maint_idx =3D ppibase + INTID_TO_PPI(ARCH_GIC_MAINT_IRQ); =20 - maint_irq =3D qdev_get_gpio_in(gic, - ppibase + VERSAL_GIC_MAINT_IRQ); + maint_irq =3D qdev_get_gpio_in(gic, maint_idx); qdev_connect_gpio_out_named(cpu, "gicv3-maintenance-interrupt", 0, maint_irq); } =20 sysbus_connect_irq(sbd, idx, qdev_get_gpio_in(cpu, ARM_CPU_IRQ)); @@ -840,17 +842,21 @@ static void versal_create_cpu_cluster(Versal *s, cons= t VersalCpuClusterMap *map) =20 has_gtimer =3D arm_feature(&ARM_CPU(cpus[0])->env, ARM_FEATURE_GENERIC= _TIMER); if (map->dtb_expose && has_gtimer) { qemu_fdt_add_subnode(s->cfg.fdt, "/timer"); qemu_fdt_setprop_cells(s->cfg.fdt, "/timer", "interrupts", - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_S_EL1_IR= Q, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_S_EL1_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI, - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL1_I= RQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_NS_EL1_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI, - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_VIRT_IRQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_VIRT_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI, - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL2_I= RQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_NS_EL2_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI); qemu_fdt_setprop(s->cfg.fdt, "/timer", "compatible", compatible, sizeof(compatible)); } } --=20 2.50.1