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Thu, 14 Aug 2025 05:58:17 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Pierrick Bouvier Subject: [PATCH v3 05/85] target/arm: Add in_prot_check to S1Translate Date: Thu, 14 Aug 2025 22:56:32 +1000 Message-ID: <20250814125752.164107-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250814125752.164107-1-richard.henderson@linaro.org> References: <20250814125752.164107-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1755176653357116600 Content-Type: text/plain; charset="utf-8" Separate the access_type from the protection check. Save the trouble of modifying all helper functions by passing the new data in the control structure. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- target/arm/ptw.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index a914e7e23c..1b90e33f52 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -64,6 +64,12 @@ typedef struct S1Translate { * Stage 2 is indicated by in_mmu_idx set to ARMMMUIdx_Stage2{,_S}. */ bool in_s1_is_el0; + /* + * The set of PAGE_* bits to be use in the permission check. + * This is normally directly related to the access_type, but + * may be suppressed for debug or AT insns. + */ + uint8_t in_prot_check; bool out_rw; bool out_be; ARMSecuritySpace out_space; @@ -581,6 +587,7 @@ static bool S1_ptw_translate(CPUARMState *env, S1Transl= ate *ptw, .in_ptw_idx =3D ptw_idx_for_stage_2(env, s2_mmu_idx), .in_space =3D s2_space, .in_debug =3D true, + .in_prot_check =3D PAGE_READ, }; GetPhysAddrResult s2 =3D { }; =20 @@ -1089,7 +1096,7 @@ static bool get_phys_addr_v5(CPUARMState *env, S1Tran= slate *ptw, } result->f.prot =3D ap_to_rw_prot(env, ptw->in_mmu_idx, ap, domain_prot= ); result->f.prot |=3D result->f.prot ? PAGE_EXEC : 0; - if (!(result->f.prot & (1 << access_type))) { + if (ptw->in_prot_check & ~result->f.prot) { /* Access permission fault. */ fi->type =3D ARMFault_Permission; goto do_fault; @@ -1243,7 +1250,7 @@ static bool get_phys_addr_v6(CPUARMState *env, S1Tran= slate *ptw, =20 result->f.prot =3D get_S1prot(env, mmu_idx, false, user_rw, prot_r= w, xn, pxn, result->f.attrs.space, out_sp= ace); - if (!(result->f.prot & (1 << access_type))) { + if (ptw->in_prot_check & ~result->f.prot) { /* Access permission fault. */ fi->type =3D ARMFault_Permission; goto do_fault; @@ -2123,7 +2130,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, S1Tr= anslate *ptw, result->f.tlb_fill_flags =3D 0; } =20 - if (!(result->f.prot & (1 << access_type))) { + if (ptw->in_prot_check & ~result->f.prot) { fi->type =3D ARMFault_Permission; goto do_fault; } @@ -2537,7 +2544,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, =20 fi->type =3D ARMFault_Permission; fi->level =3D 1; - return !(result->f.prot & (1 << access_type)); + return (ptw->in_prot_check & ~result->f.prot) !=3D 0; } =20 static uint32_t *regime_rbar(CPUARMState *env, ARMMMUIdx mmu_idx, @@ -2953,7 +2960,7 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, } } =20 - ret =3D pmsav8_mpu_lookup(env, address, access_type, 1 << access_type, + ret =3D pmsav8_mpu_lookup(env, address, access_type, ptw->in_prot_chec= k, mmu_idx, secure, result, fi, NULL); if (sattrs.subpage) { result->f.lg_page_size =3D 0; @@ -3625,6 +3632,7 @@ bool get_phys_addr(CPUARMState *env, vaddr address, S1Translate ptw =3D { .in_mmu_idx =3D mmu_idx, .in_space =3D arm_mmu_idx_to_security_space(env, mmu_idx), + .in_prot_check =3D 1 << access_type, }; =20 return get_phys_addr_gpc(env, &ptw, address, access_type, @@ -3638,6 +3646,7 @@ static hwaddr arm_cpu_get_phys_page(CPUARMState *env,= vaddr addr, .in_mmu_idx =3D mmu_idx, .in_space =3D arm_mmu_idx_to_security_space(env, mmu_idx), .in_debug =3D true, + .in_prot_check =3D PAGE_READ, }; GetPhysAddrResult res =3D {}; ARMMMUFaultInfo fi =3D {}; --=20 2.43.0