From nobody Thu Dec 18 04:17:39 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1754636690; cv=none; d=zohomail.com; s=zohoarc; b=RE87BVcB0dVziwos24zkArVj5aXdL798dYN0FXPO0BcGQTKlK3nfMdZCiFNIBuwEeO1N/iBH/MeKIc5WLuokIJtdvIzUJyiKCu429ZBiHk9KxRBc6w7eWuTPVDnbEeAiwpAuu5ctXalloXuVO7apCYe0YZ3JdoCQI09ecd0tBWU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1754636690; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Y1BLofzvzOyvUyrQGqExglby6i74ucZ7Huh1krTE/9k=; b=UjLsH0hmknb/DbIJ+8tiSQy0gbEuoZVG1W1tv+ECCURPI9wZlB4hwBRUh7cWQKOvWxwdiDACjynzX979n3NcANx68t8NwW3KW/hj41trB9U9hseq6zhMB9z/ZezJNRv4U21iCKIejrmwttCr5Iut7NXXR6iLbeQWsqfyBf9qHns= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1754636690401843.882509926363; Fri, 8 Aug 2025 00:04:50 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ukH7M-0006BR-Oq; Fri, 08 Aug 2025 03:02:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ukH77-000689-3Y for qemu-devel@nongnu.org; Fri, 08 Aug 2025 03:02:05 -0400 Received: from p-east3-cluster5-host4-snip4-10.eps.apple.com ([57.103.86.171] helo=outbound.qs.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ukH75-0005G1-AE for qemu-devel@nongnu.org; Fri, 08 Aug 2025 03:02:04 -0400 Received: from outbound.qs.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-east-2d-100-percent-5 (Postfix) with ESMTPS id 0090C180012E; Fri, 8 Aug 2025 07:01:59 +0000 (UTC) Received: from localhost.localdomain (qs-asmtp-me-k8s.p00.prod.me.com [17.57.155.37]) by p00-icloudmta-asmtp-us-east-2d-100-percent-5 (Postfix) with ESMTPSA id CEDEF18000AC; Fri, 8 Aug 2025 07:01:57 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; bh=Y1BLofzvzOyvUyrQGqExglby6i74ucZ7Huh1krTE/9k=; h=From:To:Subject:Date:Message-Id:MIME-Version:x-icloud-hme; b=FUMeiQjKTE/uB59nIBm/SYmovKV9MfMId8gxKsN1rt9XZ/YDAEO0nf8JX4RTJZ/1HhHpKD94vF9+ULNugrZH4/tkr5roq3wz1MPLpIiO6kzbO6NW3U45/o1To0lQKwEoRgVOARGPbWwwuTAJbFUNf7vP+f0iHMO+GYQcLWfw3BXeUGXNL9pl43/tUPBgiem8E8QuEQSuVCpj5yo/3mWj3ruPBYZS0z1+4hx4o2RpTxIYmqzwVEmPZE2ujp9/ozVGUc+Qxqmn4xspC4KdWdhZiVUeBT8U0jnE6fmQHGoMaCGqwKKQFmHixzqyoa3wPcisvWOtF9yIoLPYC72DM0PVLg== X-Client-IP: 46.189.47.18 From: Mohamed Mediouni To: qemu-devel@nongnu.org Cc: Peter Maydell , Shannon Zhao , "Michael S. Tsirkin" , Ani Sinha , qemu-arm@nongnu.org, Paolo Bonzini , Roman Bolshakov , Igor Mammedov , Phil Dennis-Jordan , Alexander Graf , Mads Ynddal , Cameron Esfahani , Mohamed Mediouni Subject: [PATCH v6 10/13] hvf: sync registers used at EL2 Date: Fri, 8 Aug 2025 09:01:34 +0200 Message-Id: <20250808070137.48716-11-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20250808070137.48716-1-mohamed@unpredictable.fr> References: <20250808070137.48716-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODA4MDA1NyBTYWx0ZWRfXzjWw+Evw2XDI RA7MaKk9nBcHkGkL1/2kPmKeOWluxVyH5zT7+Fw8hzBBhL0i2HBBIzfh6ZAGOmiDxD7qwwjz8+9 qerpdG9rsJ5Qlsq0kSi0nQmQxPM98alkAruHlmwR9s8eB1Ol11kZZTW3eg6zKVlUUWkE0UWrXcP BcP1sIJvLvBH8CiBGLb5YSr7bI34dL6LMhDutJhtFJlN7vl1BZiRpnO95dV+pl+rw5GWWJyy07t OmpoIgWU3pFsiGMh9n5U9NzG5kstBjwT/tYeGuRW2uhrngiR0IFXojEK89PBJF26c8Ijf7peQ= X-Proofpoint-ORIG-GUID: BZ1UfJon9s26B2ofFzJYRy4xDa1qT78i X-Proofpoint-GUID: BZ1UfJon9s26B2ofFzJYRy4xDa1qT78i X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-08_01,2025-08-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 phishscore=0 adultscore=0 mlxlogscore=875 malwarescore=0 suspectscore=0 bulkscore=0 spamscore=0 clxscore=1030 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.22.0-2506270000 definitions=main-2508080057 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.86.171; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1754636692838124100 Content-Type: text/plain; charset="utf-8" When starting up the VM at EL2, more sysregs are available. Sync the state = of those. In addition, sync the state of the EL1 physical timer when the vGIC is used= , even if running at EL1. However, no OS running at EL1 is expected to use those r= egisters. Signed-off-by: Mohamed Mediouni --- target/arm/hvf/hvf.c | 53 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index d8741f942d..41b4321b0b 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -406,6 +406,8 @@ static const struct hvf_reg_match hvf_fpreg_match[] =3D= { struct hvf_sreg_match { int reg; uint32_t key; + bool vgic; + bool el2; uint32_t cp_idx; }; =20 @@ -551,6 +553,41 @@ static struct hvf_sreg_match hvf_sreg_match[] =3D { { HV_SYS_REG_CNTV_CTL_EL0, HVF_SYSREG(14, 3, 3, 3, 1) }, { HV_SYS_REG_CNTV_CVAL_EL0, HVF_SYSREG(14, 3, 3, 3, 2) }, { HV_SYS_REG_SP_EL1, HVF_SYSREG(4, 1, 3, 4, 0) }, + /* vGIC */ + { HV_SYS_REG_CNTP_CTL_EL0, HVF_SYSREG(14, 2, 3, 3, 1), true }, + { HV_SYS_REG_CNTP_CVAL_EL0, HVF_SYSREG(14, 2, 3, 3, 2), true }, +#ifdef SYNC_NO_RAW_REGS + { HV_SYS_REG_CNTP_TVAL_EL0, HVF_SYSREG(14, 2, 3, 3, 0), true}, +#endif + /* vGIC + EL2 */ + { HV_SYS_REG_CNTHCTL_EL2, HVF_SYSREG(14, 1, 3, 4, 0), true, true }, + { HV_SYS_REG_CNTHP_CVAL_EL2, HVF_SYSREG(14, 2, 3, 4, 2), true, true }, + { HV_SYS_REG_CNTHP_CTL_EL2, HVF_SYSREG(14, 2, 3, 4, 1), true, true }, +#ifdef SYNC_NO_RAW_REGS + { HV_SYS_REG_CNTHP_TVAL_EL2, HVF_SYSREG(14, 2, 3, 4, 0), true, true }, +#endif + { HV_SYS_REG_CNTVOFF_EL2, HVF_SYSREG(14, 0, 3, 4, 3), true, true }, + /* EL2 */ + { HV_SYS_REG_CPTR_EL2, HVF_SYSREG(1, 1, 3, 4, 2), .el2 =3D true }, + { HV_SYS_REG_ELR_EL2, HVF_SYSREG(4, 0, 3, 4, 1), .el2 =3D true }, + { HV_SYS_REG_ESR_EL2, HVF_SYSREG(5, 2, 3, 4, 0), .el2 =3D true }, + { HV_SYS_REG_FAR_EL2, HVF_SYSREG(6, 0, 3, 4, 0), .el2 =3D true }, + { HV_SYS_REG_HCR_EL2, HVF_SYSREG(1, 1, 3, 4, 0), .el2 =3D true }, + { HV_SYS_REG_HPFAR_EL2, HVF_SYSREG(6, 0, 3, 4, 4), .el2 =3D true }, + { HV_SYS_REG_MAIR_EL2, HVF_SYSREG(10, 2, 3, 4, 0), .el2 =3D true }, + { HV_SYS_REG_MDCR_EL2, HVF_SYSREG(1, 1, 3, 4, 1), .el2 =3D true }, + { HV_SYS_REG_SCTLR_EL2, HVF_SYSREG(1, 0, 3, 4, 0), .el2 =3D true }, + { HV_SYS_REG_SPSR_EL2, HVF_SYSREG(4, 0, 3, 4, 0), .el2 =3D true }, + { HV_SYS_REG_SP_EL2, HVF_SYSREG(4, 1, 3, 6, 0), .el2 =3D true}, + { HV_SYS_REG_TCR_EL2, HVF_SYSREG(2, 0, 3, 4, 2), .el2 =3D true }, + { HV_SYS_REG_TPIDR_EL2, HVF_SYSREG(13, 0, 3, 4, 2), .el2 =3D true }, + { HV_SYS_REG_TTBR0_EL2, HVF_SYSREG(2, 0, 3, 4, 0), .el2 =3D true }, + { HV_SYS_REG_TTBR1_EL2, HVF_SYSREG(2, 0, 3, 4, 1), .el2 =3D true }, + { HV_SYS_REG_VBAR_EL2, HVF_SYSREG(12, 0, 3, 4, 0), .el2 =3D true }, + { HV_SYS_REG_VMPIDR_EL2, HVF_SYSREG(0, 0, 3, 4, 5), .el2 =3D true }, + { HV_SYS_REG_VPIDR_EL2, HVF_SYSREG(0, 0, 3, 4, 0), .el2 =3D true }, + { HV_SYS_REG_VTCR_EL2, HVF_SYSREG(2, 1, 3, 4, 2), .el2 =3D true }, + { HV_SYS_REG_VTTBR_EL2, HVF_SYSREG(2, 1, 3, 4, 0), .el2 =3D true }, }; =20 int hvf_get_registers(CPUState *cpu) @@ -594,6 +631,14 @@ int hvf_get_registers(CPUState *cpu) continue; } =20 + if (hvf_sreg_match[i].vgic && !hvf_irqchip_in_kernel()) { + continue; + } + + if (hvf_sreg_match[i].el2 && !hvf_arm_el2_enabled()) { + continue; + } + if (cpu->accel->guest_debug_enabled) { /* Handle debug registers */ switch (hvf_sreg_match[i].reg) { @@ -731,6 +776,14 @@ int hvf_put_registers(CPUState *cpu) continue; } =20 + if (hvf_sreg_match[i].vgic && !hvf_irqchip_in_kernel()) { + continue; + } + + if (hvf_sreg_match[i].el2 && !hvf_arm_el2_enabled()) { + continue; + } + if (cpu->accel->guest_debug_enabled) { /* Handle debug registers */ switch (hvf_sreg_match[i].reg) { --=20 2.39.5 (Apple Git-154)