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([172.58.111.133]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-30b8e3c9b32sm71031fac.24.2025.08.02.16.32.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Aug 2025 16:32:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1754177573; x=1754782373; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yW/5iqr1LXzaRcUIZ6o2S3mScJrT5xleYfUADzIzlrM=; b=xQp4M+6t4Ikh+UlnbjUy6+mI2shlKfelr7M2zUWBoQO9HAIStWOEZjJ0w9aixF/hQT 11sH2E2FksxF+gtLDSh4oZ/XkTCFRMfZjJhhwPU1mRO0zjGWmvmZji7b8bmr0iuPX4bF XstVkJIKj8XC50QTamxBpAIk4rBjFPQKePO7WESP9NnHOsPCPUzlqtaAmNZ/3b6OY7BL NzMV4IaabC1ctq1vy+H02ZY8FQsdVNC4onYeUwu9sjPoaavZdkBDgn5bwiKmD4isCQjd eoFp/HTr7+M3hsuVhqxFpicOkmWI5vgolOCA33MqLfsc4wWBhDVZqHqSDETR4PNYASxP aHlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754177573; x=1754782373; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yW/5iqr1LXzaRcUIZ6o2S3mScJrT5xleYfUADzIzlrM=; b=GIm6AXnipKsxJaAI4iI2glPoEM89x8y61lC4t0oXsOeMd4+iuKYHAZrUC9NTVGh4Y6 08cjiQJ/vcj9VsgOAMtDjmDq54MC3QEVJJiIfReMceeu0J8xZW2y8cmVnm81fJw9vYvF jufiXH3RvYOyxpRGfCZ4ZbbzBdjRWfhgql8ozjKpuaUoAYMNhHMG4u4xYyO5QNINk7VB rFinUuji1XgNC7Nfn02I7f2SmspspH03oxoykuNbqlNVob8Z1bvQB48CO38YZbB0e1RN 4YYKJhdwGgcQIUYz3jHzjUerfZT4G6IaZ2mSLLYjO+DSeZgLGTdcYJAWf3xr0cqkFfot tLSg== X-Gm-Message-State: AOJu0Yw+Ls4/U0AGmAOw3QTkkZr7ocO09v5IbTwDf52oqNxsDmcsiLpK RZWAgEVpbLAziipxO6+hXdYuATmrByYZlpJtHq3DDXtCJJLByIMotxnC5QUbFUEg2Yd4a4lIfQy pnhjiYKQ= X-Gm-Gg: ASbGncvzP25PjoOhBOw5awmnRHtQIf1E7+DMn20/lDzaSQ6y34G00BRnauWXPvd1qyL z//RxHuEQwzYK/R0rX5N01QE58CiD+XKPyZXobbIkjzZjLtqTsclRsDDw0q6WahVBuatYxsOp2O AjkiVMyvuFoUMH1kaT9dFxoc1gem3FyLz6zpIUn6nUIRM4O7qOaLlZXj/M5ubgFr611x+GA6SVH tUGyrDH4DHUFCGZ0S+3fb8aa4gkNOFoi8SkQthyiXN5CJ0mSP5LKbGEQGSeG6DXI7IbZqoTSRGs XzbuFuhjFjFMh0RYlhlxHagp7fbjaxBhgNX3AtXdW1awubZzuxqMqwxDJsx9TmacH8arXDIiRXa 7p4twxhcvo7UJsQFo2GC5wizUaxlyMJa374gogKYDB24Zxfg/VbmE X-Google-Smtp-Source: AGHT+IFcSzEPGCpbEr5Y0iXv5s+txrjkDZRxJr3YEFGwVN4/ceycjho10gys7jgnQEOFxvE3L7TTYQ== X-Received: by 2002:a05:6870:df4b:b0:30b:90f4:ca08 with SMTP id 586e51a60fabf-30b90f50bb2mr35511fac.22.1754177573306; Sat, 02 Aug 2025 16:32:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Pierrick Bouvier Subject: [PATCH v2 36/85] target/arm: Convert regime_has_2_ranges from switch to table Date: Sun, 3 Aug 2025 09:29:04 +1000 Message-ID: <20250802232953.413294-37-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250802232953.413294-1-richard.henderson@linaro.org> References: <20250802232953.413294-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c2e; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc2e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1754179282579124100 Content-Type: text/plain; charset="utf-8" Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- target/arm/internals.h | 28 ---------------------------- target/arm/mmuidx-internal.h | 17 +++++++++++++++++ target/arm/mmuidx.c | 19 ++++++++++--------- 3 files changed, 27 insertions(+), 37 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 3b730a5d81..0322646753 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1029,34 +1029,6 @@ static inline void arm_call_el_change_hook(ARMCPU *c= pu) } } =20 -/* - * Return true if this address translation regime has two ranges. - * Note that this will not return the correct answer for AArch32 - * Secure PL1&0 (i.e. mmu indexes E3, E30_0, E30_3_PAN), but it is - * never called from a context where EL3 can be AArch32. (The - * correct return value for ARMMMUIdx_E3 would be different for - * that case, so we can't just make the function return the - * correct value anyway; we would need an extra "bool e3_is_aarch32" - * argument which all the current callsites would pass as 'false'.) - */ -static inline bool regime_has_2_ranges(ARMMMUIdx mmu_idx) -{ - switch (mmu_idx) { - case ARMMMUIdx_Stage1_E0: - case ARMMMUIdx_Stage1_E1: - case ARMMMUIdx_Stage1_E1_PAN: - case ARMMMUIdx_E10_0: - case ARMMMUIdx_E10_1: - case ARMMMUIdx_E10_1_PAN: - case ARMMMUIdx_E20_0: - case ARMMMUIdx_E20_2: - case ARMMMUIdx_E20_2_PAN: - return true; - default: - return false; - } -} - static inline bool regime_is_pan(CPUARMState *env, ARMMMUIdx mmu_idx) { switch (mmu_idx) { diff --git a/target/arm/mmuidx-internal.h b/target/arm/mmuidx-internal.h index d8d64a14d6..f03a2ab94c 100644 --- a/target/arm/mmuidx-internal.h +++ b/target/arm/mmuidx-internal.h @@ -15,6 +15,7 @@ FIELD(MMUIDXINFO, EL, 0, 2) FIELD(MMUIDXINFO, ELVALID, 2, 1) FIELD(MMUIDXINFO, REL, 3, 2) FIELD(MMUIDXINFO, RELVALID, 5, 1) +FIELD(MMUIDXINFO, 2RANGES, 6, 1) =20 extern const uint32_t arm_mmuidx_table[ARM_MMU_IDX_M + 8]; =20 @@ -39,4 +40,20 @@ static inline uint32_t regime_el(ARMMMUIdx idx) return FIELD_EX32(arm_mmuidx_table[idx], MMUIDXINFO, REL); } =20 +/* + * Return true if this address translation regime has two ranges. + * Note that this will not return the correct answer for AArch32 + * Secure PL1&0 (i.e. mmu indexes E3, E30_0, E30_3_PAN), but it is + * never called from a context where EL3 can be AArch32. (The + * correct return value for ARMMMUIdx_E3 would be different for + * that case, so we can't just make the function return the + * correct value anyway; we would need an extra "bool e3_is_aarch32" + * argument which all the current callsites would pass as 'false'.) + */ +static inline bool regime_has_2_ranges(ARMMMUIdx idx) +{ + tcg_debug_assert(arm_mmuidx_is_valid(idx)); + return FIELD_EX32(arm_mmuidx_table[idx], MMUIDXINFO, 2RANGES); +} + #endif /* TARGET_ARM_MMUIDX_INTERNAL_H */ diff --git a/target/arm/mmuidx.c b/target/arm/mmuidx.c index 6dfefa56c2..f880d21606 100644 --- a/target/arm/mmuidx.c +++ b/target/arm/mmuidx.c @@ -9,18 +9,19 @@ =20 #define EL(X) ((X << R_MMUIDXINFO_EL_SHIFT) | R_MMUIDXINFO_ELVALID_MASK) #define REL(X) ((X << R_MMUIDXINFO_REL_SHIFT) | R_MMUIDXINFO_RELVALID_MASK) +#define R2 R_MMUIDXINFO_2RANGES_MASK =20 const uint32_t arm_mmuidx_table[ARM_MMU_IDX_M + 8] =3D { /* * A-profile. */ - [ARMMMUIdx_E10_0] =3D EL(0) | REL(1), - [ARMMMUIdx_E10_1] =3D EL(1) | REL(1), - [ARMMMUIdx_E10_1_PAN] =3D EL(1) | REL(1), + [ARMMMUIdx_E10_0] =3D EL(0) | REL(1) | R2, + [ARMMMUIdx_E10_1] =3D EL(1) | REL(1) | R2, + [ARMMMUIdx_E10_1_PAN] =3D EL(1) | REL(1) | R2, =20 - [ARMMMUIdx_E20_0] =3D EL(0) | REL(2), - [ARMMMUIdx_E20_2] =3D EL(2) | REL(2), - [ARMMMUIdx_E20_2_PAN] =3D EL(2) | REL(2), + [ARMMMUIdx_E20_0] =3D EL(0) | REL(2) | R2, + [ARMMMUIdx_E20_2] =3D EL(2) | REL(2) | R2, + [ARMMMUIdx_E20_2_PAN] =3D EL(2) | REL(2) | R2, =20 [ARMMMUIdx_E2] =3D EL(2) | REL(2), =20 @@ -31,9 +32,9 @@ const uint32_t arm_mmuidx_table[ARM_MMU_IDX_M + 8] =3D { [ARMMMUIdx_Stage2_S] =3D REL(2), [ARMMMUIdx_Stage2] =3D REL(2), =20 - [ARMMMUIdx_Stage1_E0] =3D REL(1), - [ARMMMUIdx_Stage1_E1] =3D REL(1), - [ARMMMUIdx_Stage1_E1_PAN] =3D REL(1), + [ARMMMUIdx_Stage1_E0] =3D REL(1) | R2, + [ARMMMUIdx_Stage1_E1] =3D REL(1) | R2, + [ARMMMUIdx_Stage1_E1_PAN] =3D REL(1) | R2, =20 /* * M-profile. --=20 2.43.0