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Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- linux-user/qemu.h | 1 - linux-user/aarch64/cpu_loop.c | 1 - linux-user/arm/cpu_loop.c | 1 - linux-user/m68k/cpu_loop.c | 1 - linux-user/riscv/cpu_loop.c | 1 - semihosting/arm-compat-semi.c | 6 +++++- 6 files changed, 5 insertions(+), 6 deletions(-) diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 0b19fa43e6..b6621536b3 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -127,7 +127,6 @@ struct TaskState { abi_ulong heap_base; abi_ulong heap_limit; #endif - abi_ulong stack_base; int used; /* non zero if used */ struct image_info *info; struct linux_binprm *bprm; diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index fea43cefa6..b65999a75b 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -168,7 +168,6 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) qemu_guest_getrandom_nofail(&env->keys, sizeof(env->keys)); } =20 - ts->stack_base =3D info->start_stack; ts->heap_base =3D info->brk; /* This will be filled in on the first SYS_HEAPINFO call. */ ts->heap_limit =3D 0; diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index 33f63951a9..e40d6beafa 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -504,7 +504,6 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) arm_rebuild_hflags(env); #endif =20 - ts->stack_base =3D info->start_stack; ts->heap_base =3D info->brk; /* This will be filled in on the first SYS_HEAPINFO call. */ ts->heap_limit =3D 0; diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 5da91b997a..3aaaf02ca4 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -117,7 +117,6 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) env->aregs[7] =3D regs->usp; env->sr =3D regs->sr; =20 - ts->stack_base =3D info->start_stack; ts->heap_base =3D info->brk; /* This will be filled in on the first SYS_HEAPINFO call. */ ts->heap_limit =3D 0; diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 3ac8bbfec1..541de765ff 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -109,7 +109,6 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_= regs *regs) exit(EXIT_FAILURE); } =20 - ts->stack_base =3D info->start_stack; ts->heap_base =3D info->brk; /* This will be filled in on the first SYS_HEAPINFO call. */ ts->heap_limit =3D 0; diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c index 86e5260e50..bc04b02eba 100644 --- a/semihosting/arm-compat-semi.c +++ b/semihosting/arm-compat-semi.c @@ -696,7 +696,11 @@ void do_common_semihosting(CPUState *cs) =20 retvals[0] =3D ts->heap_base; retvals[1] =3D ts->heap_limit; - retvals[2] =3D ts->stack_base; + /* + * Note that semihosting is *not* thread aware. + * Always return the stack base of the main thread. + */ + retvals[2] =3D ts->info->start_stack; retvals[3] =3D 0; /* Stack limit. */ #else retvals[0] =3D info.heapbase; /* Heap Base */ --=20 2.43.0