From nobody Sat Nov 15 07:40:50 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1754055428; cv=none; d=zohomail.com; s=zohoarc; b=U9r7/Jyi+B4rZb19wPX2aqiDd6jIxTJZPwMb2wrCXRfkzt36aeis9G+B9hMNdxKdmKnJxUdDdADt1Im9WQ/pC+NJJMFmGzJMvbneCDclmZO6BIFQfxEGDjJoj9y5+KYD6449+jsnpV+8sO5sXpQ+7y5toEyYhKaLUHCoQJ/8OTU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1754055428; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=McuX8ddB1qy3M8rDtLBmAXapnNFyt1WXwwwCGHWX4bI=; b=mEe26sSxg480Lv6AojfnwpI80PORdPReQr4EWOxDjB/Inzep/g9BauF9nFoot0jLa/4Y2z46rNlkRY7EVZrezgOxjPJ8cLQmLUittj75a1UA0FjSRTebR2iGJL9kdS/2tRougEqg9qO3dL6YRwoEwFJi+g4CG+9qNzlGjtcXLxY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1754055428922805.9601801275716; Fri, 1 Aug 2025 06:37:08 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uhpwQ-0006rm-Pm; Fri, 01 Aug 2025 09:36:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uhkUU-0004x2-0i; Fri, 01 Aug 2025 03:47:46 -0400 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1uhkUS-0007mD-1r; Fri, 01 Aug 2025 03:47:45 -0400 Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-3b785a69454so282335f8f.2; Fri, 01 Aug 2025 00:47:43 -0700 (PDT) Received: from shameer-ubuntu ([195.11.233.227]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-3b79c453ab0sm5049185f8f.44.2025.08.01.00.47.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Aug 2025 00:47:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754034462; x=1754639262; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=McuX8ddB1qy3M8rDtLBmAXapnNFyt1WXwwwCGHWX4bI=; b=faIvZt14Z+CmHUqjTbCK96J2UrQtXzQe4VsfffcuEBKVs3nGBXT+yJAHmuMgo2YXc3 Mxm9XxMogz4speJziNiAZQWBkNPGVTCzddR8/O/TgrxdWlGGFhq9whsjC/LMiE+wvp7j ZdukxBY+urhzaa4et8yYctjxD8Ua88cHlxplf3EVg+1bpXcgoUACjfy9TZgeU+NTwxWd H+2aPoh1X4i7EGtwgOox/EvDRUzn9JZs4xLpj9mCA9qTGohYlSoBARgqi+wb/vOhRjR2 lJBW/Z0+Qcz3WPUhPeUyY6/6RRZuHYUeTtsqQt0IdcYU92PZ35BiS4VbfwwaHoAFlX1i KGlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754034462; x=1754639262; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=McuX8ddB1qy3M8rDtLBmAXapnNFyt1WXwwwCGHWX4bI=; b=fqbk0K/HReaU8MoABpKV6Ga2KFsNDQIeJFzTxsZhwlNiRXTOr7TdBLroc6d490/1eB zPTBGhPf1lLaoSjveoO4J0b8ugwhuBpGQOf/lrO2m28OHJwt9s8+HqzH7JLdkPVOWtQM 22r/SkLU1IY/WxMN70FUmqJpxkZKlKoanj+a1i9mq7zEKGbhKswKHuNxVFbtHcx6kn+J xtKVs+C3TDu0Z8+Rxp0fw5aw9vHBItdoYuhDja/u0clQsSATzYG7/bNe/a2mBydk84o6 XtX5cMudd3JQ0O6saMpoIJu3KXaGsly23JxZKAD4z5VWs812mWcECXqbpIFM6NXiLG7T GMtg== X-Forwarded-Encrypted: i=1; AJvYcCVqYLTvjZ7LfgujPdMWcVrc6CExDk758ocd/glPv8g84RCra+Cs9OX4/xT8WKgoghEfJjGCGlhah/Nv@nongnu.org X-Gm-Message-State: AOJu0Yx26MuP76qX7E2pCZ2nOhdWQ1YSQ7RRJ1u5U/YshC8CsQjkJNWX xjo0FLCbiobzklz9Q7p5LXFBftMVkoUbPVQ/SH7a+WxiPWxRwCaFwF3c/T5Rug== X-Gm-Gg: ASbGncvSQeJlxytWzBmA8SBqu+W89xb5FaeH99NxvomQ7CQRRx2eqWDPY1wvR2vP/D3 Bm4UHL7paJBD+O40BdeP7Q1A7vdujODgqnMv6azvQ3PoO7AeeVCptzp2tVaw6NMmaDZUruXNGeq E8i/jRnNmNf2DcoTxu04CCBy1p7s0dURIcKpFzivp6+swBxdoK64NLI8h96VpQt/xQhZCzWFbPD opRlfYDMRIzBoqtSJJMVejt5pJD3myYsbUL2v+71IRvUg9cPNVr5wRcecwF+IjCkpx3zSwncaqt PboRQL5DirCZKZIAfBX1r5Lg4opW/5JXMTy6xcYjBiO/byyUWMh5U3e0qK4yIlVJM8tfS6imI2x qN3ryzPuabpoWLQLEfe4n1fY+hnbXl8Z8dA== X-Google-Smtp-Source: AGHT+IEBuNTbMQISMk/N4fyUKZXFcqvac6MHhDlVk8lfoOD/EB+WgDT2kLJ8nLpzu3Bnv9gJd84LOQ== X-Received: by 2002:a05:6000:3108:b0:3b8:d115:e6c7 with SMTP id ffacd0b85a97d-3b8d115e95amr2686077f8f.33.1754034461570; Fri, 01 Aug 2025 00:47:41 -0700 (PDT) From: Shameer Kolothum To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: eric.auger@redhat.com, peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, berrange@redhat.com, maz@kernel.org, oliver.upton@linux.dev, armbru@redhat.com, linuxarm@huawei.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, salil.mehta@huawei.com, yangjinqian1@huawei.com, shameerkolothum@gmail.com, shameerali.kolothum.thodi@huawei.com Subject: [RFC PATCH RESEND 1/4] target/arm/kvm: Introduce helper to check target impl CPU support Date: Fri, 1 Aug 2025 08:47:27 +0100 Message-ID: <20250801074730.28329-2-shameerkolothum@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250801074730.28329-1-shameerkolothum@gmail.com> References: <20250801074730.28329-1-shameerkolothum@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=shameerkolothum@gmail.com; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Fri, 01 Aug 2025 09:35:51 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1754055430022116600 From: Shameer Kolothum The helper function will try to set the SMCCC filters=C2=A0for KVM vendor hypercalls related to target implementation=C2=A0CPU support. It also checks the kernel support for writable implementation=C2=A0ID registers (MIDR/REVIDR/AIDR) and enables it. Subsequent patches for Target Impl CPU support will make use of this helper. Signed-off-by: Shameer Kolothum --- target/arm/kvm.c | 72 ++++++++++++++++++++++++++++++++++++++++++++ target/arm/kvm_arm.h | 12 ++++++++ 2 files changed, 84 insertions(+) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 3f41f99e23..eb04640b50 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -2072,6 +2072,78 @@ bool kvm_arm_mte_supported(void) return kvm_check_extension(kvm_state, KVM_CAP_ARM_MTE); } =20 +static bool kvm_arm_set_vm_attr(struct kvm_device_attr *attr, const char *= name) +{ + int err; + + err =3D kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, attr); + if (err !=3D 0) { + error_report("%s: KVM_HAS_DEVICE_ATTR: %s", name, strerror(-err)); + return false; + } + + err =3D kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, attr); + if (err !=3D 0) { + error_report("%s: KVM_SET_DEVICE_ATTR: %s", name, strerror(-err)); + return false; + } + + return true; +} + +static bool kvm_arm_set_smccc_filter(uint64_t func, uint8_t faction) +{ + struct kvm_smccc_filter filter =3D { + .base =3D func, + .nr_functions =3D 1, + .action =3D faction, + }; + struct kvm_device_attr attr =3D { + .group =3D KVM_ARM_VM_SMCCC_CTRL, + .attr =3D KVM_ARM_VM_SMCCC_FILTER, + .flags =3D 0, + .addr =3D (uintptr_t)&filter, + }; + + if (!kvm_arm_set_vm_attr(&attr, "SMCCC Filter")) { + error_report("failed to set SMCCC filter in KVM Host"); + return false; + } + + return true; +} + +bool kvm_arm_target_impl_cpus_supported(void) +{ + if (!kvm_arm_set_smccc_filter( + ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_VER_FUNC_ID, + KVM_SMCCC_FILTER_FWD_TO_USER)) { + error_report("ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_VER fwd filter " + "install failed"); + return false; + } + + if (!kvm_arm_set_smccc_filter( + ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_CPUS_FUNC_ID, + KVM_SMCCC_FILTER_FWD_TO_USER)) { + error_report("ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_CPUS fwd filter " + "install failed"); + return false; + } + + if (!kvm_check_extension(kvm_state, KVM_CAP_ARM_WRITABLE_IMP_ID_REGS))= { + error_report("KVM_CAP_ARM_WRITABLE_IMP_ID_REGS not supported"); + return false; + } + + if (kvm_vm_enable_cap(kvm_state, KVM_CAP_ARM_WRITABLE_IMP_ID_REGS, 0))= { + error_report("Failed to enable KVM_CAP_ARM_WRITABLE_IMP_ID_REGS ca= p"); + return false; + } + + return true; +} + QEMU_BUILD_BUG_ON(KVM_ARM64_SVE_VQ_MIN !=3D 1); =20 uint32_t kvm_arm_sve_get_vls(ARMCPU *cpu) diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index ba5de45f86..3cd6447901 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -207,6 +207,13 @@ bool kvm_arm_sve_supported(void); */ bool kvm_arm_mte_supported(void); =20 +/** + * kvm_arm_target_impl_cpus_supported: + * + * Returns: true if KVM can enable target impl CPUs, and false otherwise. + */ +bool kvm_arm_target_impl_cpus_supported(void); + /** * kvm_arm_get_max_vm_ipa_size: * @ms: Machine state handle @@ -263,6 +270,11 @@ static inline bool kvm_arm_mte_supported(void) return false; } =20 +static inline bool kvm_arm_target_impl_cpus_supported(void) +{ + return false; +} + static inline int kvm_arm_get_writable_id_regs(ARMCPU *cpu, IdRegMap *idre= gmap) { return -ENOSYS; --=20 2.34.1 From nobody Sat Nov 15 07:40:50 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1754055529; cv=none; d=zohomail.com; s=zohoarc; b=K3RlQpTQj5JnDbiwc9sNyFm55EYXH097Jbbdk2/WsFxTHEZ6nKVz2Rl720RCzRP0H7isp3WUXUQjYOIKZBWCH3c2hAd+RAyS6DVEd+/tQmGmZfYX9GD47gb72YdBIpeKjcm+pAkUMLXs323JjT0CYPQa8mkkT6C1WZ3X4v+xTEU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1754055529; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=gOwwy3GLPQ6ST7xJTOCyOyJnsV2gNoteuopM4onEoIE=; b=QPyHtymuRLpRhdkGIgf6btVmBVVo55tXaeQr/5W0mJnnIEvLGm61LR7JukpIFUs9ke60QZt0Rad3RZWu+HPlTQs5l+e9gD9YTUHJP2WprPuYbkNhrDeAmtlqjoW+jY6ttHVozmaeJOkE5XF83ngDXMk44KsK9R6GwwJf5Ar4op8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1754055529507158.64104160285524; Fri, 1 Aug 2025 06:38:49 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uhpwW-0007pe-9A; Fri, 01 Aug 2025 09:37:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uhkUW-0004zU-WF; Fri, 01 Aug 2025 03:47:49 -0400 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1uhkUU-0007mb-SI; Fri, 01 Aug 2025 03:47:48 -0400 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-3b783d851e6so649086f8f.0; Fri, 01 Aug 2025 00:47:46 -0700 (PDT) Received: from shameer-ubuntu ([195.11.233.227]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-3b79c453ab0sm5049185f8f.44.2025.08.01.00.47.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Aug 2025 00:47:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754034464; x=1754639264; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gOwwy3GLPQ6ST7xJTOCyOyJnsV2gNoteuopM4onEoIE=; b=DF7erN5HQ1s6TYlMk6uSUrN6GYri7XrgiLPQbJLaIT+roRPvgjiiCv6EsdOc9tLkSn gUYnLD02lG6fQoYXx2SGyq8bZH4I//4BdaahbedrXsOPdTpfTawtW9FDPLdSgyL6E/9y R6KIGEvCtcgaANtoEfQuzmg6twwc3THpi73bCkiMT92WimvLdyqI548/5MYpTHDNK22F KlKwtPHeiMR5SYiIC7BOz+kOsWxLmDOTfHM29/mfJsTHXYR8J3WunyGERYW0S0c58/qa HtXzjm+c5i8VRuxt+p6sH2XEFZVuTMF1HK3BfUT6njX6Ta+TVSDyzaY+sBjEMq2on0in nEjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754034464; x=1754639264; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gOwwy3GLPQ6ST7xJTOCyOyJnsV2gNoteuopM4onEoIE=; b=biUYbbM7LSP+4qJo/BwG6PDe4me855fXQjg0MGoqm0srL5ciYJ0Izp69tBbaoXAOqp uNzE8W3cnKc7lbSzFpc8wirNzfzkyw3HCOSgdNajCgSxYyaP1D6ylnAqFREe3gynd6O/ MpFfLczDb4GPVh8/JMSdYaAQngFM/bqmF7Elw5nGk8cM1VfA6l0IqUoNA2IRaA/z7mO3 qwFO23fAosX6sFn2yignLj+YtfFqCs1rE7xgA5rxUiL9hJfztlPpKBxbqxzCO4xCDIOY h6gkt0KgKe8peIiEcS2YHujbUD5TfQls0kGV98bIbBrEPfnR2PIBfG6ZSPaEE/fKvELe HBDQ== X-Forwarded-Encrypted: i=1; AJvYcCWGdbnRhrLzqL/1IAcvuxKjqmyeSECE5NMdId14TATPzevSJF+p84pSIAx2pJQWEOYoHxfqhZy6ELVq@nongnu.org X-Gm-Message-State: AOJu0Ywv4SgGLwVKlqYY/kAzosd6KkPsdDGwnasVyQuPAvNtDppIuUbz Jnzp91JkRfgk308L/k7pKh3NjE77CHUtlNWo9fDICWMMsKKIGDIb85+VLWnWLg== X-Gm-Gg: ASbGncvz3djQped6tOzXBtJGajs//K0TVCKrr7DdJxnTyU2yI3fjuuX7zhw2sjRgG6/ GcFwG/H56W93odOREHwzPjsNPZVba9Rcg8/JgwV0Y09ZmLm/5aR4mnchvS/96Y533I2OnV6dIRJ QcGpO4wONQmzVrPKG6mal/ytH7XCkA7mGtpyeAFhzQWANTlIGEb9VxhF9VAKF4Q48ikhksUj9AN eTPpAzwAhAP/p1xB6ajsjazhMihpYT+Hx8/+E7brij9JgBYKief9Me5Fl6JDs3sVc2Y8GB0s/LM 9IJrYsWlLo0S/WDj/wp+nKDUeaiD1PLSl0BR/zwfMg+902Vl6pMPbrrzAreDINUJQolK1QtGJvF Dxkzb7FFMU7A+UGhxcW8y4aGatDonC2C5gw== X-Google-Smtp-Source: AGHT+IE543fvfeJI9GhypQTiBCwSXnt7jJx8MHoitAqUiMxp4JU0t74VjvCQZ6I7aX3quxRWjJBDGg== X-Received: by 2002:a05:6000:144b:b0:3b8:d32e:9231 with SMTP id ffacd0b85a97d-3b8d32e9730mr1358500f8f.29.1754034464033; Fri, 01 Aug 2025 00:47:44 -0700 (PDT) From: Shameer Kolothum To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: eric.auger@redhat.com, peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, berrange@redhat.com, maz@kernel.org, oliver.upton@linux.dev, armbru@redhat.com, linuxarm@huawei.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, salil.mehta@huawei.com, yangjinqian1@huawei.com, shameerkolothum@gmail.com, shameerali.kolothum.thodi@huawei.com Subject: [RFC PATCH RESEND 2/4] target/arm/kvm: Add QAPI struct ArmTargetImplCPU Date: Fri, 1 Aug 2025 08:47:28 +0100 Message-ID: <20250801074730.28329-3-shameerkolothum@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250801074730.28329-1-shameerkolothum@gmail.com> References: <20250801074730.28329-1-shameerkolothum@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=shameerkolothum@gmail.com; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Fri, 01 Aug 2025 09:35:51 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1754055531334116600 From: Shameer Kolothum Introduce a QAPI=E2=80=90defined struct (and its array) for target implemen= tation CPUs. This enables specifying target implementation=C2=A0CPU parameters via -machine, for example: -M virt, \ =C2=A0 impl-cpu.0.midr=3D1,impl-cpu.0.revidr=3D1,impl-cpu.0.aidr=3D1, \ =C2=A0 impl-cpu.1.midr=3D2,impl-cpu.1.revidr=3D2,impl-cpu.1.aidr=3D0 Subsequent patch will make use of this by using object_property_add(), allowing users to configure each target CPU=E2=80=99s midr, revidr, and aidr fields directly from the command line. While at it, also provide=C2=A0a helper function to set the target=C2=A0CPU= s. Signed-off-by: Shameer Kolothum --- qapi/machine.json | 34 ++++++++++++++++++++++++++++++++++ target/arm/kvm.c | 16 ++++++++++++++++ target/arm/kvm_arm.h | 8 ++++++++ 3 files changed, 58 insertions(+) diff --git a/qapi/machine.json b/qapi/machine.json index a6b8795b09..d6e0e3b2e3 100644 --- a/qapi/machine.json +++ b/qapi/machine.json @@ -1898,3 +1898,37 @@ { 'command': 'x-query-interrupt-controllers', 'returns': 'HumanReadableText', 'features': [ 'unstable' ]} + +## +# @ArmTargetImplCPU: +# +# Info for a single target implementation CPU. +# +# @midr: MIDR value +# @revidr: REVIDR value +# @aidr: AIDR value +# +# Since: 10.2 +## +{ 'struct': 'ArmTargetImplCPU', + 'data': { + 'midr': 'uint64', + 'revidr': 'uint64', + 'aidr': 'uint64' + } +} + +## +# @ArmTargetImplCPUs: +# +# List of target implementation CPUs. +# +# @target-cpus: List of ArmTargetImplCPU entries. +# +# Since: 10.2 +## +{ 'struct': 'ArmTargetImplCPUs', + 'data': { + 'target-cpus': ['ArmTargetImplCPU'] + } +} diff --git a/target/arm/kvm.c b/target/arm/kvm.c index eb04640b50..8f325c4ca4 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -66,6 +66,9 @@ typedef struct ARMHostCPUFeatures { =20 static ARMHostCPUFeatures arm_host_cpu_features; =20 +static uint64_t target_impl_cpus_num; +static ArmTargetImplCPU *target_impl_cpus; + /** * kvm_arm_vcpu_init: * @cpu: ARMCPU @@ -2816,3 +2819,16 @@ void kvm_arm_enable_mte(Object *cpuobj, Error **errp) cpu->kvm_mte =3D true; } } + +bool kvm_arm_set_target_impl_cpus(uint64_t num, ArmTargetImplCPU *cpus) +{ + + if (target_impl_cpus_num) { + return false; + } + + target_impl_cpus_num =3D num; + target_impl_cpus =3D cpus; + + return true; +} diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index 3cd6447901..8754302333 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -244,6 +244,8 @@ void kvm_arm_enable_mte(Object *cpuobj, Error **errp); =20 int kvm_arm_get_writable_id_regs(ARMCPU *cpu, IdRegMap *idregmap); =20 +bool kvm_arm_set_target_impl_cpus(uint64_t num, ArmTargetImplCPU *cpus); + #else =20 /* @@ -280,6 +282,12 @@ static inline int kvm_arm_get_writable_id_regs(ARMCPU = *cpu, IdRegMap *idregmap) return -ENOSYS; } =20 +static inline +bool kvm_arm_set_target_impl_cpus(uint64_t num, ArmTargetImplCPU *cpus) +{ + return false; +} + /* * These functions should never actually be called without KVM support. */ --=20 2.34.1 From nobody Sat Nov 15 07:40:50 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1754055424; cv=none; d=zohomail.com; s=zohoarc; b=DkZFZ0B8x5g/QC0dPSaXrlNEfApSIl85UoXKAOIusvd5zH6BygR+5YbNrmuwIkVsZ8VnKyszw6SxJuWmWI44RaIFhjLDjV4+vwh3MGHRHlYPaeYGsBw4FSgqkuBof/8GDdbJKaKuNjucSTiIU7ZI6V8shKrdqfcudq0wrDlxG14= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1754055424; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=dEMsCOYaw6Z6paMzL0qht/X5wur0yQZhbuE80tZXu6E=; b=WSbQmyAoIm7iOUELc4ZkxVim5ML6FkyWQi4gbIKwzTL/4bsOPljmuwvLYWFcdT+JI4g20VkrDNlLNggPGTYf6NCEy/LXYGpWkZLFU3oCQMe/jkw5W3uQ5jHhlDUZwaXJT81f+YlZ1OHZTWFAf+v/WqZdQ6dHgg1NZPFVFAmgv+Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1754055424338831.7299037269271; Fri, 1 Aug 2025 06:37:04 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uhpvb-00052T-S2; Fri, 01 Aug 2025 09:36:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uhkUa-00050u-FY; Fri, 01 Aug 2025 03:47:54 -0400 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1uhkUX-0007nA-Uc; Fri, 01 Aug 2025 03:47:51 -0400 Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-3b786421e36so1032118f8f.3; Fri, 01 Aug 2025 00:47:48 -0700 (PDT) Received: from shameer-ubuntu ([195.11.233.227]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-3b79c453ab0sm5049185f8f.44.2025.08.01.00.47.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Aug 2025 00:47:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754034467; x=1754639267; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dEMsCOYaw6Z6paMzL0qht/X5wur0yQZhbuE80tZXu6E=; b=PzOjulZyBRCUcsGNNtJ+Vl/ESLoZg1tXZcWv4omwuqwugAV+bPXeMIBePeeZzB4tgS 53gure5khbzny/1qMB4zSpmlTNl0gWg1s6lAhTV3C/kceSbrHEysIdUzxtc8H+i4OjBS zbO/I/+sYV/gw9hjimfMDBY4/dZLeHI3PwN4LymNHcYM2Twp88pdBzNaJ8F88k5cLmtE fm93k1FDdaBRunundV9WmfEV0Ae+kgwmgvfWyJO684PAiLaTzbUwOx0QsZ6v3bKSzs8G jJ9tYsgZ7L/TK5kSRexcMk7oetnrgB+VgyUwhTA3hHIdK8y1eGcb9LePLpL+ztWhdlE4 b6yw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754034467; x=1754639267; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dEMsCOYaw6Z6paMzL0qht/X5wur0yQZhbuE80tZXu6E=; b=n57lpfBocHk/KIFKVGBawVxFLI19+lAJX9GjQDdcggBIlWIizHsVJgpGyxklCDcrtQ ujTtWWuQ5wu6JleHIGyGIOFbVF5+kel81Z4u4OLPgM06rOLYQw191sLO21qfnlQvPurC wsIiFjB1qsrYAsP4PGokn03TpixAUv1IJRDwZyX7QhNJoQb41vyQ5XUqMxBm8QBJkaZK i+KJR761ZhftoN0PMf3EgnE0Q973CeLlaEYM5PxITr9mU1755J6NOe9pPGPgGlHyj1Il 47atAwCSAZhd8NhnKC5idIPr5f2ySJ9NnIb1KneWZ4YvFaDWQZAkqgo/iksyd6GvVL1W 7Xqg== X-Forwarded-Encrypted: i=1; AJvYcCWCSF/F+9XcCVnkML27xk/C8MDGTss5Q6Tgcp5csD7AGQMXRPuaSDmkyTwdTbRH1LyuUVhigjd+/yhL@nongnu.org X-Gm-Message-State: AOJu0YzquK7/TUJaVLHKvZk4wAVZrG5ekb/yE0y4uOPUTia/6mFUKom5 CbI3u8aYPrcaJFLgtebZ0sUzDmnMlD7ffyqfNfRiqL9eNjeKeV7AuLJjUQ1PcQ== X-Gm-Gg: ASbGncvith1Y1Lg8OCmAEZs1HUp5kRsTtNY4wAjmvaddwf1NnPfABlBzL+bXZsnVBzd RY5o62ch5NeEFx38X7iZmJA3Qc5xSiowIMTS//4SCga5aKCj4HBBiFDy0RyC+7BflE1LbhfgQSV 4eF6/jvzqpdvcXl9yrVN/+OxcJlweZ6JsrO9SLO/OdvOaP+ka8zTKGNW7KpbTW4WxPvPlf5ymOO dNfnJAomIDDYu5wI5I4r9QGr39J8Ffrca2LqDavVK3x47bAMi268NYwmrPyVQHSjAnhPhqbZWna sdwMqJpAKi7APbMBDNcMMs7+jeqhaz0JDCmyTHOpQziz4lmtTn96ASW+Wjr8wBUJZdVwbV0wvrW ueSaLj9pK14ZHhV3qb0qqYcUsyl0wSQnSSw== X-Google-Smtp-Source: AGHT+IEeT7XDuRqINZgTjeci+11FxwzNyLfURlk68CUh+VNw+VO6ihfpG/dtpQ11HIbuuqEBijB/eA== X-Received: by 2002:a05:6000:40d9:b0:3b8:d15f:1d4a with SMTP id ffacd0b85a97d-3b8d15f1effmr2105331f8f.41.1754034466597; Fri, 01 Aug 2025 00:47:46 -0700 (PDT) From: Shameer Kolothum To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: eric.auger@redhat.com, peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, berrange@redhat.com, maz@kernel.org, oliver.upton@linux.dev, armbru@redhat.com, linuxarm@huawei.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, salil.mehta@huawei.com, yangjinqian1@huawei.com, shameerkolothum@gmail.com, shameerali.kolothum.thodi@huawei.com Subject: [RFC PATCH RESEND 3/4] target/arm/kvm: Handle KVM Target Imp CPU hypercalls Date: Fri, 1 Aug 2025 08:47:29 +0100 Message-ID: <20250801074730.28329-4-shameerkolothum@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250801074730.28329-1-shameerkolothum@gmail.com> References: <20250801074730.28329-1-shameerkolothum@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=shameerkolothum@gmail.com; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Fri, 01 Aug 2025 09:35:51 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1754055426169116600 Content-Type: text/plain; charset="utf-8" From: Shameer Kolothum When target implementation CPUs are set, handle the related hyper calls correctly by returning the information requested. Signed-off-by: Shameer Kolothum --- target/arm/kvm.c | 99 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 99 insertions(+) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 8f325c4ca4..5adecc864e 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -1697,6 +1697,71 @@ static bool kvm_arm_handle_debug(ARMCPU *cpu, return false; } =20 +/* Only supports HYP_KVM_DISCOVER_IMPL_XXX hypercalls */ +static void arm_handle_smccc_kvm_vendor_hypercall(ARMCPU *cpu) +{ + CPUARMState *env =3D &cpu->env; + uint64_t param[4] =3D { }; + uint64_t idx; + + if (!is_a64(env)) { + env->regs[0] =3D SMCCC_RET_NOT_SUPPORTED; + return; + } + + memcpy(param, env->xregs, sizeof(param)); + + switch (param[0]) { + case ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_VER_FUNC_ID: + if (!target_impl_cpus_num) { + env->xregs[0] =3D SMCCC_RET_NOT_SUPPORTED; + return; + } + env->xregs[0] =3D SMCCC_RET_SUCCESS; + env->xregs[1] =3D PSCI_VERSION(1, 0); + env->xregs[2] =3D target_impl_cpus_num; + break; + case ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_CPUS_FUNC_ID: + idx =3D param[1]; + + if (!target_impl_cpus_num || idx >=3D target_impl_cpus_num) { + env->xregs[0] =3D SMCCC_RET_INVALID_PARAMETER; + return; + } + + env->xregs[0] =3D SMCCC_RET_SUCCESS; + env->xregs[1] =3D target_impl_cpus[idx].midr; + env->xregs[2] =3D target_impl_cpus[idx].revidr; + env->xregs[3] =3D target_impl_cpus[idx].aidr; + break; + default: + env->xregs[0] =3D SMCCC_RET_NOT_SUPPORTED; + } +} + +static int kvm_arm_handle_hypercall(CPUState *cs, struct kvm_run *run) +{ + ARMCPU *cpu =3D ARM_CPU(cs); + CPUARMState *env =3D &cpu->env; + + kvm_cpu_synchronize_state(cs); + + if (run->hypercall.flags =3D=3D KVM_HYPERCALL_EXIT_SMC) { + cs->exception_index =3D EXCP_SMC; + env->exception.syndrome =3D syn_aa64_smc(0); + } else { + cs->exception_index =3D EXCP_HVC; + env->exception.syndrome =3D syn_aa64_hvc(0); + } + env->exception.target_el =3D 1; + + bql_lock(); + arm_handle_smccc_kvm_vendor_hypercall(cpu); + bql_unlock(); + + return EXCP_INTERRUPT; +} + int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) { ARMCPU *cpu =3D ARM_CPU(cs); @@ -1713,6 +1778,9 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run= *run) ret =3D kvm_arm_handle_dabt_nisv(cpu, run->arm_nisv.esr_iss, run->arm_nisv.fault_ipa); break; + case KVM_EXIT_HYPERCALL: + ret =3D kvm_arm_handle_hypercall(cs, run); + break; default: qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n", __func__, run->exit_reason); @@ -2212,6 +2280,29 @@ static int kvm_arm_sve_set_vls(ARMCPU *cpu) return kvm_set_one_reg(CPU(cpu), KVM_REG_ARM64_SVE_VLS, &vls[0]); } =20 +/* + * Supported Target Implementation CPU hypercalls: + * KVM_REG_ARM_VENDOR_HYP_BIT_DISCOVER_IMPL_VER =3D 0, + * KVM_REG_ARM_VENDOR_HYP_BIT_DISCOVER_IMPL_CPUS =3D 1 + * + * Setting these bits advertises the availability of the corresponding + * Target Implementation CPU hypercalls to the guest. + */ +#define BMAP_2_DISCOVER_IMPL_BITS 0x3ULL +static int kvm_arm_target_impl_cpus_set_hyp_bmap2(ARMCPU *cpu) +{ + uint64_t bmap2; + int ret; + + ret =3D kvm_get_one_reg(CPU(cpu), KVM_REG_ARM_VENDOR_HYP_BMAP_2, &bmap= 2); + if (ret) { + return ret; + } + + bmap2 |=3D BMAP_2_DISCOVER_IMPL_BITS; + return kvm_set_one_reg(CPU(cpu), KVM_REG_ARM_VENDOR_HYP_BMAP_2, &bmap2= ); +} + #define ARM_CPU_ID_MPIDR 3, 0, 0, 0, 5 =20 int kvm_arch_init_vcpu(CPUState *cs) @@ -2293,6 +2384,14 @@ int kvm_arch_init_vcpu(CPUState *cs) } cpu->mp_affinity =3D mpidr & ARM64_AFFINITY_MASK; =20 + /* Set KVM_REG_ARM_VENDOR_HYP_BMAP_2 if target impl CPUs are required = */ + if (target_impl_cpus_num) { + ret =3D kvm_arm_target_impl_cpus_set_hyp_bmap2(cpu); + if (ret) { + return ret; + } + } + ret =3D kvm_arm_init_cpreg_list(cpu); if (ret) { return ret; --=20 2.34.1 From nobody Sat Nov 15 07:40:50 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1754055406; cv=none; d=zohomail.com; s=zohoarc; b=ki3kK6J/TOi0jwcdaqZNdVyVFZWubB6scbREFTPcix1lACBal4Ny699HtxaqrLJVAdrCBX85suj9NUd2k1FnIqsizja+U44bQalxhN9zEmwyRJljz582w1fANC22mKrTW0BaJ/lQmYMtOrz+ttX/S2JJ0l0QQQtlE8qbCvFLO9Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1754055406; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Ov0CnZ6hllKCqiijw1Ug4lyN3JdBE3w2Bo15YiF82ag=; b=iCfe0CqhvYPizmrRGo0VM8+oSz8z9SV8Gt2hwUsKkuRr4DZZPwF2L8r0MP1s0NeL8Vv5DqwUOaMptzl/CJzWMlVNeK0qnkXDgw4/tRTCEuayri9t4Ak8qHAGXiukkWR1RhrK7VNVrV28JggyZ58STPlQ2hW6N0ffB3eZNeialKo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1754055406230486.9228765319086; Fri, 1 Aug 2025 06:36:46 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uhpvk-0005VR-5o; Fri, 01 Aug 2025 09:36:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uhkUc-00051W-Oy; Fri, 01 Aug 2025 03:47:55 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1uhkUa-0007nu-QK; Fri, 01 Aug 2025 03:47:54 -0400 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-4560cdf235cso9388605e9.1; Fri, 01 Aug 2025 00:47:51 -0700 (PDT) Received: from shameer-ubuntu ([195.11.233.227]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-3b79c453ab0sm5049185f8f.44.2025.08.01.00.47.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Aug 2025 00:47:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1754034470; x=1754639270; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ov0CnZ6hllKCqiijw1Ug4lyN3JdBE3w2Bo15YiF82ag=; b=Iv/JO4yda5/XDvw/zVbC/X9JYvXyAfzu+qc5MTdjEJxrmvlzSCCTn9MGbbyvlCKB+M hMmkRISV3/63v0DTwwkZi4NJaWlP2HpFxC627gLDBDYIlzJ9QY6AJt9y3NS1iQS4SzBx FmOMVUeX6yctlC6Z9gMeqgy7mRAr9DAyn6lVRWdh6UdHd5kR6FYq1T4kDs/MoZF9YraY Q4cJzTULqm19pMl2JPoeMezmpJGmpybPIIjiQHQmlKhQZAR6Wfhko1OnBO/kWyPZ+aNr D38A3i3au344UVCKA3h8U5Wf8yj4AbwM8OclsblDpPO3oWpT6vYJnLDjz6UaYQRIbqjh 14wQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1754034470; x=1754639270; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ov0CnZ6hllKCqiijw1Ug4lyN3JdBE3w2Bo15YiF82ag=; b=sP7xM5+7doS4vbLRMI0jfOHUF5VWOCHswvX7JNY8a//rnuUmRSGcgBDM6b6/mjEe8O 2UNv32J+2WbsMqYV6PK5LrfrBqliY1iDXEj3Yrj+gF4H38V49Wa2mA3X++TSkkCUM+Es zKVyGYzv9WSRpDtFFidcfJJoMzVO1FQajEqllzL7PJstCLg27D7UZxZ4/DXUC7GBtttH fr7zvhhH/2wyPg+SjXQ8+HRnQ0WANSoVSGKuYnSG7oIz24gKAaoEpPuHQU3VuzE3pSLa Yv3UDnRMm3jUzmfx851v0kSJ3wYG0WYZ813hPXnkdpsr2fNx4uWHJ25ZHt5pPvL7zOv4 5s8w== X-Forwarded-Encrypted: i=1; AJvYcCWivgs0LrxMTRB3N8KE0gcdV9XTND76Qhc5w7BveKSL//BV8/AGhBR8cBBbNty138zOX06RNkI5twx+@nongnu.org X-Gm-Message-State: AOJu0YwKtnQa8kuf5VQg6v0h8P3DdYAZyD+YfNagTW04gkjVXfRwAhQl 0P/YjL0Xvca0McqxY/d5pgbVaLc6hIon4puAbPljqitZ2ozH0gMvrwPDziMVug== X-Gm-Gg: ASbGncsQFEU/OGYdtj+WcrEb4cAY4jcSCUaoo9tSYhju12pA8GBpPoJ5gMBvb81nSZJ svOc9sI8nrP1ATRZqacw+Y3asADpzvtwuE89da2SrIwLJnBZsxU5pAHmnzVC0AYbwo+SQJlVZQ8 +6Fhe7lOyQ/mpEggsZyKxp4bPXUJsma46yq3H7ny5IS6a7854NNrPW+KWIUqpHOBjEMGankXS27 VonYfkuWYdOfI14Y7NIbSMmqLz3Vgo9I3jQgeD1FSE6DBDBwoSn6Z8lOpnLM4gNG97DufXrukCA /k4z0Lkq7VQU+eM0RAnQqhf89p8N+mv+izd3VYxLN+37DMOt/cLq+jBG+/tg9tqilr48iOzHkZD gP0x3A2NrMy/8nEfjCRc/38rqEyIxI2Fn/A== X-Google-Smtp-Source: AGHT+IHw0s5vRX9hiKIGqaNMqYOSZM+3EhnTkDB3mYJdCHKjAgVdM5kXkCqL09KKppw3GKkpwu2k8g== X-Received: by 2002:a05:600c:1c92:b0:458:a5f9:aa68 with SMTP id 5b1f17b1804b1-458a9aff5a8mr14716955e9.2.1754034469906; Fri, 01 Aug 2025 00:47:49 -0700 (PDT) From: Shameer Kolothum To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: eric.auger@redhat.com, peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, berrange@redhat.com, maz@kernel.org, oliver.upton@linux.dev, armbru@redhat.com, linuxarm@huawei.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, salil.mehta@huawei.com, yangjinqian1@huawei.com, shameerkolothum@gmail.com, shameerali.kolothum.thodi@huawei.com Subject: [RFC PATCH RESEND 4/4] hw/arm/virt: Add Target Implementation CPU support Date: Fri, 1 Aug 2025 08:47:30 +0100 Message-ID: <20250801074730.28329-5-shameerkolothum@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250801074730.28329-1-shameerkolothum@gmail.com> References: <20250801074730.28329-1-shameerkolothum@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=shameerkolothum@gmail.com; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Fri, 01 Aug 2025 09:35:51 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1754055408925124100 From: Shameer Kolothum Add the impl-cpu property to virt machine. This will enable user to specify the target implementation CPUs as the example below: ... -M impl-cpu.0.midr=3D1,impl-cpu.0.revidr=3D1,impl-cpu.0.aidr=3D1,\ impl-cpu.1.midr=3D2,impl-cpu.1.revidr=3D2,impl-cpu.1.aidr=3D2 \ Make use of helper=C2=A0functions to check the KVM support for target Impl CPUs and if supported set the user specified target CPUs. Signed-off-by: Shameer Kolothum --- hw/arm/virt.c | 66 +++++++++++++++++++++++++++++++++++++++++++ include/hw/arm/virt.h | 3 ++ 2 files changed, 69 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a96452f17a..72a0cd3ea8 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -71,6 +71,7 @@ #include "hw/firmware/smbios.h" #include "qapi/visitor.h" #include "qapi/qapi-visit-common.h" +#include "qapi/qapi-visit-machine.h" #include "qobject/qlist.h" #include "standard-headers/linux/input.h" #include "hw/arm/smmuv3.h" @@ -2232,6 +2233,20 @@ static void machvirt_init(MachineState *machine) exit(1); } =20 + if (vms->target_cpus_num) { + if (!kvm_enabled()) { + error_report("Target Impl CPU requested, but not supported " + "without KVM"); + exit(1); + } + + if (!kvm_arm_target_impl_cpus_supported()) { + error_report("Target Impl CPU requested, but not supported by = KVM"); + exit(1); + } + kvm_arm_set_target_impl_cpus(vms->target_cpus_num, vms->target_cpu= s); + } + create_fdt(vms); =20 assert(possible_cpus->len =3D=3D max_cpus); @@ -2666,6 +2681,45 @@ static void virt_set_oem_table_id(Object *obj, const= char *value, strncpy(vms->oem_table_id, value, 8); } =20 +static void virt_set_target_impl_cpus(Object *obj, Visitor *v, + const char *name, void *opaque, + Error **errp) +{ + VirtMachineState *vms =3D VIRT_MACHINE(obj); + ArmTargetImplCPUList *list =3D NULL; + ArmTargetImplCPUList *iter =3D NULL; + ArmTargetImplCPU *target_cpus; + uint64_t target_num =3D 0; + int i; + + visit_type_ArmTargetImplCPUList(v, name, &list, errp); + if (!list) { + return; + } + + for (iter =3D list; iter; iter =3D iter->next) { + target_num++; + } + + target_cpus =3D g_new0(ArmTargetImplCPU, target_num); + for (i =3D 0, iter =3D list; iter; iter =3D iter->next, i++) { + target_cpus[i].midr =3D iter->value->midr; + target_cpus[i].revidr =3D iter->value->revidr; + target_cpus[i].aidr =3D iter->value->aidr; + } + vms->target_cpus_num =3D target_num; + vms->target_cpus =3D target_cpus; + vms->target_cpus_list =3D list; +} + +static void virt_get_target_impl_cpus(Object *obj, Visitor *v, const char = *name, + void *opaque, Error **errp) +{ + VirtMachineState *vms =3D VIRT_MACHINE(obj); + ArmTargetImplCPUList **list =3D &vms->target_cpus_list; + + visit_type_ArmTargetImplCPUList(v, name, list, errp); +} =20 bool virt_is_acpi_enabled(VirtMachineState *vms) { @@ -3326,6 +3380,18 @@ static void virt_machine_class_init(ObjectClass *oc,= void *data) "Override the default value of f= ield OEM Table ID " "in ACPI table header." "The string may be up to 8 bytes= in size"); + object_class_property_add(oc, "impl-cpu", "ArmTargetImplCPU", + virt_get_target_impl_cpus, + virt_set_target_impl_cpus, + NULL, NULL); + object_class_property_set_description(oc, "impl-cpu", + "Describe target implementation = CPU in the format: " + "impl-cpu.0.midr=3D1," + "impl-cpu.0.revidr=3D1," + "impl-cpu.0.aidr=3D1," + "impl-cpu.1.midr=3D2," + "impl-cpu.1.revidr=3D2," + "impl-cpu.1.aidr=3D2"); =20 } =20 diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index c8e94e6aed..cf462fcb37 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -180,6 +180,9 @@ struct VirtMachineState { char *oem_id; char *oem_table_id; bool ns_el2_virt_timer_irq; + uint64_t target_cpus_num; + ArmTargetImplCPU *target_cpus; + ArmTargetImplCPUList *target_cpus_list; }; =20 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) --=20 2.34.1