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a="59992082" X-IronPort-AV: E=Sophos;i="6.16,350,1744095600"; d="scan'208";a="59992082" X-CSE-ConnectionGUID: cGKLHRV1SXKiFfGFZv1WLA== X-CSE-MsgGUID: 4bYSmVNaSiSIdJk6NiYbqA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,350,1744095600"; d="scan'208";a="162971758" From: Xiaoyao Li To: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Cc: Kirill Martynov , Zhao Liu , Marcelo Tosatti , Richard Henderson , qemu-devel@nongnu.org, Xiaoyao Li Subject: [PATCH v2 2/2] target/i386: Define enum X86ASIdx for x86's address spaces Date: Wed, 30 Jul 2025 17:52:53 +0800 Message-ID: <20250730095253.1833411-3-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250730095253.1833411-1-xiaoyao.li@intel.com> References: <20250730095253.1833411-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.198.163.12; envelope-from=xiaoyao.li@intel.com; helo=mgamail.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.244, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1753870029759116600 Define X86ASIdx as enum, like ARM's ARMASIdx, so that it's clear index 0 is for memory and index 1 is for SMM. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Zhao Liu Tested-By: Kirill Martynov Signed-off-by: Xiaoyao Li --- accel/kvm/kvm-all.c | 2 +- target/i386/cpu.h | 5 +++++ target/i386/kvm/kvm-cpu.c | 2 +- target/i386/kvm/kvm.c | 4 ++-- target/i386/tcg/system/tcg-cpu.c | 4 ++-- 5 files changed, 11 insertions(+), 6 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 890d5ea9f865..e56c217a5a0d 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -2797,7 +2797,7 @@ static int kvm_init(AccelState *as, MachineState *ms) s->memory_listener.listener.coalesced_io_del =3D kvm_uncoalesce_mmio_r= egion; =20 kvm_memory_listener_register(s, &s->memory_listener, - &address_space_memory, 0, "kvm-memory"); + &address_space_memory, X86ASIdx_MEM, "kvm= -memory"); memory_listener_register(&kvm_io_listener, &address_space_io); =20 diff --git a/target/i386/cpu.h b/target/i386/cpu.h index f977fc49a774..e0be7a740685 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2574,6 +2574,11 @@ static inline bool x86_has_cpuid_0x1f(X86CPU *cpu) void x86_cpu_set_a20(X86CPU *cpu, int a20_state); void cpu_sync_avx_hflag(CPUX86State *env); =20 +typedef enum X86ASIdx { + X86ASIdx_MEM =3D 0, + X86ASIdx_SMM =3D 1, +} X86ASIdx; + #ifndef CONFIG_USER_ONLY static inline int x86_asidx_from_attrs(CPUState *cs, MemTxAttrs attrs) { diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index 1dc1ba9b4869..9c25b5583955 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -99,7 +99,7 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) * initialized at register_smram_listener() after machine init done. */ cs->num_ases =3D x86_machine_is_smm_enabled(X86_MACHINE(current_machin= e)) ? 2 : 1; - cpu_address_space_init(cs, 0, "cpu-memory", cs->memory); + cpu_address_space_init(cs, X86ASIdx_MEM, "cpu-memory", cs->memory); =20 return true; } diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 47fb5c673c8e..5621200be0f0 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2728,10 +2728,10 @@ static void register_smram_listener(Notifier *n, vo= id *unused) =20 address_space_init(&smram_address_space, &smram_as_root, "KVM-SMRAM"); kvm_memory_listener_register(kvm_state, &smram_listener, - &smram_address_space, 1, "kvm-smram"); + &smram_address_space, X86ASIdx_SMM, "kvm-= smram"); =20 CPU_FOREACH(cpu) { - cpu_address_space_init(cpu, 1, "cpu-smm", &smram_as_root); + cpu_address_space_init(cpu, X86ASIdx_SMM, "cpu-smm", &smram_as_roo= t); } } =20 diff --git a/target/i386/tcg/system/tcg-cpu.c b/target/i386/tcg/system/tcg-= cpu.c index 0538a4fd51a3..7255862c2449 100644 --- a/target/i386/tcg/system/tcg-cpu.c +++ b/target/i386/tcg/system/tcg-cpu.c @@ -74,8 +74,8 @@ bool tcg_cpu_realizefn(CPUState *cs, Error **errp) memory_region_set_enabled(cpu->cpu_as_mem, true); =20 cs->num_ases =3D 2; - cpu_address_space_init(cs, 0, "cpu-memory", cs->memory); - cpu_address_space_init(cs, 1, "cpu-smm", cpu->cpu_as_root); + cpu_address_space_init(cs, X86ASIdx_MEM, "cpu-memory", cs->memory); + cpu_address_space_init(cs, X86ASIdx_SMM, "cpu-smm", cpu->cpu_as_root); =20 /* ... SMRAM with higher priority, linked from /machine/smram. */ cpu->machine_done.notify =3D tcg_cpu_machine_done; --=20 2.43.0