From nobody Sat Jun 27 07:15:28 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1753844636873716.5495339908464; Tue, 29 Jul 2025 20:03:56 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ugx5A-0003tb-R9; Tue, 29 Jul 2025 23:02:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ugx58-0003qB-Db for qemu-devel@nongnu.org; Tue, 29 Jul 2025 23:02:18 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ugx55-0007HX-Tm for qemu-devel@nongnu.org; Tue, 29 Jul 2025 23:02:18 -0400 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8BxPOI0i4lo47o0AQ--.64535S3; Wed, 30 Jul 2025 11:02:12 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJAxE+Qri4loJ_AsAA--.30108S5; Wed, 30 Jul 2025 11:02:12 +0800 (CST) From: Bibo Mao To: Song Gao , Richard Henderson Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v4 03/19] target/loongarch: Set page size in TLB entry with STLB Date: Wed, 30 Jul 2025 11:01:46 +0800 Message-Id: <20250730030202.3425934-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250730030202.3425934-1-maobibo@loongson.cn> References: <20250730030202.3425934-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJAxE+Qri4loJ_AsAA--.30108S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1753844637471116600 Content-Type: text/plain; charset="utf-8" With VTLB different TLB entry may have different page size, and page size is set in PS field of TLB entry. However with STLB, all the TLB entries have the same page size, page size comes from register CSR_STLBPS, PS field of TLB entry is not used. Here PS field of TLB entry is used with all TLB entries, even with STLB. It is convenient with TLB maintainance operation. Signed-off-by: Bibo Mao --- target/loongarch/tcg/tlb_helper.c | 41 ++++++++----------------------- 1 file changed, 10 insertions(+), 31 deletions(-) diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_h= elper.c index 8872593ff0..3ea0e153b1 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -110,11 +110,8 @@ static void invalidate_tlb_entry(CPULoongArchState *en= v, int index) if (!tlb_e) { return; } - if (index >=3D LOONGARCH_STLB) { - tlb_ps =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); - } else { - tlb_ps =3D FIELD_EX64(env->CSR_STLBPS, CSR_STLBPS, PS); - } + + tlb_ps =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); pagesize =3D MAKE_64BIT_MASK(tlb_ps, 1); mask =3D MAKE_64BIT_MASK(0, tlb_ps + 1); =20 @@ -173,11 +170,8 @@ static void fill_tlb_entry(CPULoongArchState *env, int= index) lo1 =3D env->CSR_TLBELO1; } =20 - /* Only MTLB has the ps fields */ - if (index >=3D LOONGARCH_STLB) { - tlb->tlb_misc =3D FIELD_DP64(tlb->tlb_misc, TLB_MISC, PS, csr_ps); - } - + /* Store page size in field PS */ + tlb->tlb_misc =3D FIELD_DP64(tlb->tlb_misc, TLB_MISC, PS, csr_ps); tlb->tlb_misc =3D FIELD_DP64(tlb->tlb_misc, TLB_MISC, VPPN, csr_vppn); tlb->tlb_misc =3D FIELD_DP64(tlb->tlb_misc, TLB_MISC, E, 1); csr_asid =3D FIELD_EX64(env->CSR_ASID, CSR_ASID, ASID); @@ -283,12 +277,7 @@ void helper_tlbrd(CPULoongArchState *env) =20 index =3D FIELD_EX64(env->CSR_TLBIDX, CSR_TLBIDX, INDEX); tlb =3D &env->tlb[index]; - - if (index >=3D LOONGARCH_STLB) { - tlb_ps =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); - } else { - tlb_ps =3D FIELD_EX64(env->CSR_STLBPS, CSR_STLBPS, PS); - } + tlb_ps =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); tlb_e =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, E); =20 if (!tlb_e) { @@ -476,11 +465,8 @@ void helper_invtlb_page_asid(CPULoongArchState *env, t= arget_ulong info, if (!tlb_e) { continue; } - if (i >=3D LOONGARCH_STLB) { - tlb_ps =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); - } else { - tlb_ps =3D FIELD_EX64(env->CSR_STLBPS, CSR_STLBPS, PS); - } + + tlb_ps =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); tlb_vppn =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, VPPN); vpn =3D (addr & TARGET_VIRT_MASK) >> (tlb_ps + 1); compare_shift =3D tlb_ps + 1 - R_TLB_MISC_VPPN_SHIFT; @@ -509,11 +495,8 @@ void helper_invtlb_page_asid_or_g(CPULoongArchState *e= nv, if (!tlb_e) { continue; } - if (i >=3D LOONGARCH_STLB) { - tlb_ps =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); - } else { - tlb_ps =3D FIELD_EX64(env->CSR_STLBPS, CSR_STLBPS, PS); - } + + tlb_ps =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); tlb_vppn =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, VPPN); vpn =3D (addr & TARGET_VIRT_MASK) >> (tlb_ps + 1); compare_shift =3D tlb_ps + 1 - R_TLB_MISC_VPPN_SHIFT; @@ -673,11 +656,7 @@ static int loongarch_map_tlb_entry(CPULoongArchState *= env, hwaddr *physical, uint64_t tlb_entry, tlb_ppn; uint8_t tlb_ps, n, tlb_v, tlb_d, tlb_plv, tlb_nx, tlb_nr, tlb_rplv; =20 - if (index >=3D LOONGARCH_STLB) { - tlb_ps =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); - } else { - tlb_ps =3D FIELD_EX64(env->CSR_STLBPS, CSR_STLBPS, PS); - } + tlb_ps =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); n =3D (address >> tlb_ps) & 0x1;/* Odd or even */ =20 tlb_entry =3D n ? tlb->tlb_entry1 : tlb->tlb_entry0; --=20 2.39.3