From nobody Sat Nov 15 07:40:55 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1753768218; cv=none; d=zohomail.com; s=zohoarc; b=mW7CSnFW82hc/IHwuSFCpWk499WH3OPeponglinTRLJlUuX4Cv/9T5oCjUVOWGTkivRZMrkrh6HoOFBkR28NG0aPWtTzCQMUC0QLudF1diMt1p0Vku+VLehhcmpX0sIfAHhRv0+AsqSQL3MckPUTFz56yaz/bTKdpJ+g+xBuoZ0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1753768218; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=CvghtrWCZiK8q5AyxxwNyRi9uunbAYtDZBkXNJVeRyQ=; b=WLNeeW0+XXDxWBWaaA57G7KTzodpDyJ6Lf2UIeNOC91yk+UGcMunP6dacKL1YJUZi7t7WacQWKQVnBYNl7eyR3vwAvbKenwBtN9Cj2irrkaojJUtJ8vZUVyofeOOeMJ/LJgpFOwFyex9D8kz4rzl8kX6iuXHxQpAoSleebYh8HY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1753768218477720.5341719624843; Mon, 28 Jul 2025 22:50:18 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ugdDc-0001HW-8S; Tue, 29 Jul 2025 01:49:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ugdDH-00019z-Rg for qemu-devel@nongnu.org; Tue, 29 Jul 2025 01:49:27 -0400 Received: from mgamail.intel.com ([198.175.65.21]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ugdDD-0003Nr-T8 for qemu-devel@nongnu.org; Tue, 29 Jul 2025 01:49:23 -0400 Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jul 2025 22:49:19 -0700 Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by orviesa001.jf.intel.com with ESMTP; 28 Jul 2025 22:49:16 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1753768161; x=1785304161; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GOKCYwx2RCr4doGpQ8AsUnhu6AiGN6L25y/R/eRMdB0=; b=DLSHfjnAsu0KP+zA22Fm75uGJVrkpLKv//QGg8ax8cDyNdwpHEy5rVVk VHFUfBtZ+jiOIUIPKyKGOYXIwRYYgdkBq79P0thsundh3puXNVXT4pQGj djDiEy3cvj2AHsN1Q8LBZZM3RoJ+A9ED5F3sUqHY8p4hmqmdh+pUvrEOP FaElFw+OCBoQb71eoyD48SV24qmW3hHMavwe3W4GhkhJyUEylWhOcDpb1 byAHt7aUeDl8Q3QDQ0iQWaU2AZeiOCKSpy9CQXFTqkEzP44oNPE6YH3kj XA3v0fAok8nzAqJNMI/b2ydoXdSclj2+wbGInOKTwtT5DO6l1eQnXQsJ+ w==; X-CSE-ConnectionGUID: 9k13LGguSEukXtSojEdnuA== X-CSE-MsgGUID: zb5ymlvxSlyIi34BXP2esA== X-IronPort-AV: E=McAfee;i="6800,10657,11505"; a="55907952" X-IronPort-AV: E=Sophos;i="6.16,348,1744095600"; d="scan'208";a="55907952" X-CSE-ConnectionGUID: J+h27KwuSxCo+urtlPbQrA== X-CSE-MsgGUID: /tHy06PwQqmP/Rz1izKTkg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,348,1744095600"; d="scan'208";a="199750964" From: Xiaoyao Li To: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Cc: Kirill Martynov , Zhao Liu , Marcelo Tosatti , Richard Henderson , qemu-devel@nongnu.org, Xiaoyao Li Subject: [PATCH 1/2] i386/cpu: Enable SMM cpu addressspace Date: Tue, 29 Jul 2025 13:40:22 +0800 Message-ID: <20250729054023.1668443-2-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250729054023.1668443-1-xiaoyao.li@intel.com> References: <20250729054023.1668443-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.21; envelope-from=xiaoyao.li@intel.com; helo=mgamail.intel.com X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.299, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1753768220131116600 Content-Type: text/plain; charset="utf-8" Kirill Martynov reported assertation in cpu_asidx_from_attrs() being hit when x86_cpu_dump_state() is called to dump the CPU state[*]. It happens when the CPU is in SMM and KVM emulation failure due to misbehaving guest. The root cause is that QEMU i386 never enables the SMM addressspace for cpu since kvm SMM support has been added. Enable the SMM cpu address space under KVM when the SMM is enabled for the x86machine. [*] https://lore.kernel.org/qemu-devel/20250523154431.506993-1-stdcalllevi@= yandex-team.ru/ Reported-by: Kirill Martynov Signed-off-by: Xiaoyao Li Reviewed-by: Zhao Liu Tested-by: Kirill Martynov > --- system/physmem.c | 5 ----- target/i386/kvm/kvm-cpu.c | 10 ++++++++++ target/i386/kvm/kvm.c | 5 +++++ 3 files changed, 15 insertions(+), 5 deletions(-) diff --git a/system/physmem.c b/system/physmem.c index 130c148ffb5c..76e1c33aab5c 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -795,9 +795,6 @@ void cpu_address_space_init(CPUState *cpu, int asidx, cpu->as =3D as; } =20 - /* KVM cannot currently support multiple address spaces. */ - assert(asidx =3D=3D 0 || !kvm_enabled()); - if (!cpu->cpu_ases) { cpu->cpu_ases =3D g_new0(CPUAddressSpace, cpu->num_ases); cpu->cpu_ases_count =3D cpu->num_ases; @@ -820,8 +817,6 @@ void cpu_address_space_destroy(CPUState *cpu, int asidx) =20 assert(cpu->cpu_ases); assert(asidx >=3D 0 && asidx < cpu->num_ases); - /* KVM cannot currently support multiple address spaces. */ - assert(asidx =3D=3D 0 || !kvm_enabled()); =20 cpuas =3D &cpu->cpu_ases[asidx]; if (tcg_enabled()) { diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index 89a795365945..aa657c2a4627 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -13,6 +13,7 @@ #include "qapi/error.h" #include "system/system.h" #include "hw/boards.h" +#include "hw/i386/x86.h" =20 #include "kvm_i386.h" #include "accel/accel-cpu-target.h" @@ -91,6 +92,15 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) kvm_set_guest_phys_bits(cs); } =20 + /* + * When SMM is enabled, there is 2 address spaces. Otherwise only 1. + * + * Only init address space 0 here, the second one for SMM is initializ= ed at + * register_smram_listener() after machine init done. + */ + cs->num_ases =3D x86_machine_is_smm_enabled(X86_MACHINE(current_machin= e)) ? 2 : 1; + cpu_address_space_init(cs, 0, "cpu-mmeory", cs->memory); + return true; } =20 diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 369626f8c8d7..47fb5c673c8e 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2704,6 +2704,7 @@ static MemoryRegion smram_as_mem; =20 static void register_smram_listener(Notifier *n, void *unused) { + CPUState *cpu; MemoryRegion *smram =3D (MemoryRegion *) object_resolve_path("/machine/smram", NULL); =20 @@ -2728,6 +2729,10 @@ static void register_smram_listener(Notifier *n, voi= d *unused) address_space_init(&smram_address_space, &smram_as_root, "KVM-SMRAM"); kvm_memory_listener_register(kvm_state, &smram_listener, &smram_address_space, 1, "kvm-smram"); + + CPU_FOREACH(cpu) { + cpu_address_space_init(cpu, 1, "cpu-smm", &smram_as_root); + } } =20 static void *kvm_msr_energy_thread(void *data) --=20 2.43.0 From nobody Sat Nov 15 07:40:55 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1753768253; cv=none; d=zohomail.com; s=zohoarc; b=gy+9bfRy3+NxLpKffPdyJJ5V30wjUAfs6DW27ASMwp1NRMnvw2tIizzQ1SGS+JfK3hg1dObz8ZJfKdRzkti/ITuXKG554z4RDajYP6ithLIPi5jMySAA/94jRyRNHAg36Wh6jHFpVGBSrlQPFjDEkPCZiZQTpuocZD/UyoqL8uE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1753768253; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=lpWNFcdLlJNRl9hff5Ufz1NCS7U/yEU8acTBq82QwUw=; b=FPPZ+TnFiXxrEwFXt/d+egX9Zt7NwxD7hX7D2ChIvG+vFy3RmgkHI/zPS2Sx4kmKvY3qe+x5Hey8rEgEghagKWsE77T8ytIxGuEamYiY+D8g3JAMd0bpWGUHzCArzQ4fDp4M6uVaeOVSKteoyhlqrzcef78i6C48oUemiOjvkAc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1753768253543619.5789633250313; Mon, 28 Jul 2025 22:50:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ugdDa-0001Ef-EM; Tue, 29 Jul 2025 01:49:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ugdDH-0001A0-SF for qemu-devel@nongnu.org; Tue, 29 Jul 2025 01:49:27 -0400 Received: from mgamail.intel.com ([198.175.65.21]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ugdDF-0003O2-Mt for qemu-devel@nongnu.org; Tue, 29 Jul 2025 01:49:23 -0400 Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jul 2025 22:49:21 -0700 Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by orviesa001.jf.intel.com with ESMTP; 28 Jul 2025 22:49:18 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1753768162; x=1785304162; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jmBWm4UYQ2MUZHTUtB5Bnn1r1nrxFRr3zI05N00L7cw=; b=hc/jXRSjxyhyGzDz+q9tz6gTlgBji4f390U2TvHR3+DSlXmS2p4YWfrP lZDZPfeJPKsdQYakjcX7Lbhunns+l7CrwufYMMj7B+zVFabTOloZSHlVZ l74dFpgf3sXt5V8Hvn/kt49c6JRZseNDX7Nn6mlIgoE8RzYsJjZijhh6F 8DXgNWrWJUvYcwvp8bKmY2DDSlwd7nzWK34ZlIxKWhiKqvHIm+Obq5SxJ H/1HkIMLtIIrknEq534S9egcL2rbUwy1tnczA+F1nil2NYT7RlQWIrxfw QHEQScJPfwVcNANynDynTJFeykLD8ALPBRss1JT8dv9zG9pHA6Oc/Xg0S g==; X-CSE-ConnectionGUID: bKDFMo4LRZO5Dt8Aos6eSg== X-CSE-MsgGUID: a/et28icTMaTObv1OjHEBA== X-IronPort-AV: E=McAfee;i="6800,10657,11505"; a="55907960" X-IronPort-AV: E=Sophos;i="6.16,348,1744095600"; d="scan'208";a="55907960" X-CSE-ConnectionGUID: sTnBFxWwSMyqZVlt9vbTuw== X-CSE-MsgGUID: iOyoLozTQDCR9mjdXjNLzw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,348,1744095600"; d="scan'208";a="199750970" From: Xiaoyao Li To: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Cc: Kirill Martynov , Zhao Liu , Marcelo Tosatti , Richard Henderson , qemu-devel@nongnu.org, Xiaoyao Li Subject: [PATCH 2/2] target/i386: Define enum X86ASIdx for x86's address spaces Date: Tue, 29 Jul 2025 13:40:23 +0800 Message-ID: <20250729054023.1668443-3-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250729054023.1668443-1-xiaoyao.li@intel.com> References: <20250729054023.1668443-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.21; envelope-from=xiaoyao.li@intel.com; helo=mgamail.intel.com X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.299, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1753768255895116600 Content-Type: text/plain; charset="utf-8" Like ARM defines ARMASIdx, do the same to define X86ASIdx as enum. So that it's more clear what index 0 is for memory and index 1 is for SMM. Signed-off-by: Xiaoyao Li Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Zhao Liu Tested-By: Kirill Martynov > --- accel/kvm/kvm-all.c | 2 +- target/i386/cpu.h | 5 +++++ target/i386/kvm/kvm-cpu.c | 2 +- target/i386/kvm/kvm.c | 4 ++-- target/i386/tcg/system/tcg-cpu.c | 4 ++-- 5 files changed, 11 insertions(+), 6 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 890d5ea9f865..e56c217a5a0d 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -2797,7 +2797,7 @@ static int kvm_init(AccelState *as, MachineState *ms) s->memory_listener.listener.coalesced_io_del =3D kvm_uncoalesce_mmio_r= egion; =20 kvm_memory_listener_register(s, &s->memory_listener, - &address_space_memory, 0, "kvm-memory"); + &address_space_memory, X86ASIdx_MEM, "kvm= -memory"); memory_listener_register(&kvm_io_listener, &address_space_io); =20 diff --git a/target/i386/cpu.h b/target/i386/cpu.h index f977fc49a774..e0be7a740685 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2574,6 +2574,11 @@ static inline bool x86_has_cpuid_0x1f(X86CPU *cpu) void x86_cpu_set_a20(X86CPU *cpu, int a20_state); void cpu_sync_avx_hflag(CPUX86State *env); =20 +typedef enum X86ASIdx { + X86ASIdx_MEM =3D 0, + X86ASIdx_SMM =3D 1, +} X86ASIdx; + #ifndef CONFIG_USER_ONLY static inline int x86_asidx_from_attrs(CPUState *cs, MemTxAttrs attrs) { diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index aa657c2a4627..36f5892d330e 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -99,7 +99,7 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) * register_smram_listener() after machine init done. */ cs->num_ases =3D x86_machine_is_smm_enabled(X86_MACHINE(current_machin= e)) ? 2 : 1; - cpu_address_space_init(cs, 0, "cpu-mmeory", cs->memory); + cpu_address_space_init(cs, X86ASIdx_MEM, "cpu-mmeory", cs->memory); =20 return true; } diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 47fb5c673c8e..5621200be0f0 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2728,10 +2728,10 @@ static void register_smram_listener(Notifier *n, vo= id *unused) =20 address_space_init(&smram_address_space, &smram_as_root, "KVM-SMRAM"); kvm_memory_listener_register(kvm_state, &smram_listener, - &smram_address_space, 1, "kvm-smram"); + &smram_address_space, X86ASIdx_SMM, "kvm-= smram"); =20 CPU_FOREACH(cpu) { - cpu_address_space_init(cpu, 1, "cpu-smm", &smram_as_root); + cpu_address_space_init(cpu, X86ASIdx_SMM, "cpu-smm", &smram_as_roo= t); } } =20 diff --git a/target/i386/tcg/system/tcg-cpu.c b/target/i386/tcg/system/tcg-= cpu.c index 0538a4fd51a3..7255862c2449 100644 --- a/target/i386/tcg/system/tcg-cpu.c +++ b/target/i386/tcg/system/tcg-cpu.c @@ -74,8 +74,8 @@ bool tcg_cpu_realizefn(CPUState *cs, Error **errp) memory_region_set_enabled(cpu->cpu_as_mem, true); =20 cs->num_ases =3D 2; - cpu_address_space_init(cs, 0, "cpu-memory", cs->memory); - cpu_address_space_init(cs, 1, "cpu-smm", cpu->cpu_as_root); + cpu_address_space_init(cs, X86ASIdx_MEM, "cpu-memory", cs->memory); + cpu_address_space_init(cs, X86ASIdx_SMM, "cpu-smm", cpu->cpu_as_root); =20 /* ... SMRAM with higher priority, linked from /machine/smram. */ cpu->machine_done.notify =3D tcg_cpu_machine_done; --=20 2.43.0