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Tsirkin" , Ani Sinha , Cameron Esfahani , Mohamed Mediouni Subject: [PATCH v5 04/13] hw/arm, target/arm: nested virtualisation on HVF Date: Mon, 28 Jul 2025 15:41:05 +0200 Message-Id: <20250728134114.77545-5-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20250728134114.77545-1-mohamed@unpredictable.fr> References: <20250728134114.77545-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: hmJqNe0pQ8U2Vn9W8HMGn4NQKZjNURTK X-Proofpoint-ORIG-GUID: hmJqNe0pQ8U2Vn9W8HMGn4NQKZjNURTK X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzI4MDEwMSBTYWx0ZWRfXwKVI6URmPhdq ZrOsyxt4xqw7mmmVHxUMw2AHCGL6l69Cq8m8Kg4MHKs7X3/dHAb35woAVq2rJYtZg40BOvDusIv qfs8Yz83b0TqO7u7aYDTYjlg+oThZY1+HZmzOup2ztSp+55UAv0/R/O9Y588gruBoGNq4UCzWFf KUo6QTMB+qxgdFAv3fdIs8HRuCdsuo5eJTyZXa8owuKazrz3WHiqcR7M0TWvJD4xPV0gC/gRzm3 i4mlLOk5WU9eTpSwbJRSePyl0DEu7qbE+tH9fWVY6BM5Egq4FEbbFS+ImyIp5rX7sSJUv4BNM= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-28_03,2025-07-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 adultscore=0 phishscore=0 spamscore=0 suspectscore=0 mlxlogscore=999 mlxscore=0 malwarescore=0 bulkscore=0 clxscore=1030 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.22.0-2506270000 definitions=main-2507280101 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.87.48; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1753710168092116600 Content-Type: text/plain; charset="utf-8" Signed-off-by: Mohamed Mediouni --- hw/arm/virt.c | 9 ++++++--- target/arm/hvf-stub.c | 15 +++++++++++++++ target/arm/hvf/hvf.c | 41 +++++++++++++++++++++++++++++++++++++++-- target/arm/hvf_arm.h | 3 +++ 4 files changed, 63 insertions(+), 5 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 7da1176cda..7348d55104 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -817,8 +817,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) g_assert_not_reached(); } =20 - if (kvm_enabled() && vms->virt && - (revision !=3D 3 || !kvm_irqchip_in_kernel())) { + if (kvm_enabled() && vms->virt && (revision !=3D 3 || !kvm_irqchip_in_= kernel())) { error_report("KVM EL2 is only supported with in-kernel GICv3"); exit(1); } @@ -2279,7 +2278,8 @@ static void machvirt_init(MachineState *machine) exit(1); } =20 - if (vms->virt && !kvm_enabled() && !tcg_enabled() && !qtest_enabled())= { + if (vms->virt && !kvm_enabled() && !tcg_enabled() + && !hvf_enabled() && !qtest_enabled()) { error_report("mach-virt: %s does not support providing " "Virtualization extensions to the guest CPU", current_accel_name()); @@ -2549,6 +2549,9 @@ static void virt_set_virt(Object *obj, bool value, Er= ror **errp) VirtMachineState *vms =3D VIRT_MACHINE(obj); =20 vms->virt =3D value; +#if defined(CONFIG_HVF) && defined(__aarch64__) + hvf_arm_el2_enable(value); +#endif } =20 static bool virt_get_highmem(Object *obj, Error **errp) diff --git a/target/arm/hvf-stub.c b/target/arm/hvf-stub.c index ff137267a0..95ec4ea62f 100644 --- a/target/arm/hvf-stub.c +++ b/target/arm/hvf-stub.c @@ -18,3 +18,18 @@ uint32_t hvf_arm_get_max_ipa_bit_size(void) { g_assert_not_reached(); } + +bool hvf_arm_el2_supported(void) +{ + g_assert_not_reached(); +} + +bool hvf_arm_el2_enabled(void) +{ + g_assert_not_reached(); +} + +void hvf_arm_el2_enable(bool) +{ + g_assert_not_reached(); +} diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 5ee0df17e3..4ac42bda32 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -26,6 +26,7 @@ #include "system/address-spaces.h" #include "system/memory.h" #include "hw/boards.h" +#include "hw/arm/virt.h" #include "hw/irq.h" #include "qemu/main-loop.h" #include "system/cpus.h" @@ -891,6 +892,10 @@ static bool hvf_arm_get_host_cpu_features(ARMHostCPUFe= atures *ahcf) (1ULL << ARM_FEATURE_PMU) | (1ULL << ARM_FEATURE_GENERIC_TIMER); =20 + if (hvf_arm_el2_enabled()) { + ahcf->features |=3D 1ULL << ARM_FEATURE_EL2; + } + for (i =3D 0; i < ARRAY_SIZE(regs); i++) { r |=3D hv_vcpu_config_get_feature_reg(hv_vcpu_config, regs[i].reg,= regs[i].val); } @@ -957,6 +962,25 @@ uint32_t hvf_arm_get_max_ipa_bit_size(void) return round_down_to_parange_bit_size(max_ipa_size); } =20 +bool hvf_arm_el2_supported(void) +{ + bool is_nested_virt_supported; + hv_return_t ret =3D hv_vm_config_get_el2_supported(&is_nested_virt_sup= ported); + assert_hvf_ok(ret); + return is_nested_virt_supported; +} + +static bool is_nested_virt_enabled =3D false; +bool hvf_arm_el2_enabled(void) +{ + return is_nested_virt_enabled; +} + +void hvf_arm_el2_enable(bool enable) +{ + is_nested_virt_enabled =3D enable; +} + void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu) { if (!arm_host_cpu_features.dtb_compatible) { @@ -993,6 +1017,13 @@ hv_return_t hvf_arch_vm_create(MachineState *ms, uint= 32_t pa_range) } chosen_ipa_bit_size =3D pa_range; =20 + if (hvf_arm_el2_enabled()) { + ret =3D hv_vm_config_set_el2_enabled(config, true); + if (ret !=3D HV_SUCCESS) { + goto cleanup; + } + } + ret =3D hv_vm_create(config); =20 cleanup: @@ -1100,6 +1131,13 @@ static void hvf_psci_cpu_off(ARMCPU *arm_cpu) assert(ret =3D=3D QEMU_ARM_POWERCTL_RET_SUCCESS); } =20 +static int hvf_psci_get_target_el(void) +{ + if (hvf_arm_el2_enabled()) { + return 2; + } + return 1; +} /* * Handle a PSCI call. * @@ -1121,7 +1159,6 @@ static bool hvf_handle_psci_call(CPUState *cpu) CPUState *target_cpu_state; ARMCPU *target_cpu; target_ulong entry; - int target_el =3D 1; int32_t ret =3D 0; =20 trace_hvf_psci_call(param[0], param[1], param[2], param[3], @@ -1175,7 +1212,7 @@ static bool hvf_handle_psci_call(CPUState *cpu) entry =3D param[2]; context_id =3D param[3]; ret =3D arm_set_cpu_on(mpidr, entry, context_id, - target_el, target_aarch64); + hvf_psci_get_target_el(), target_aarch64); break; case QEMU_PSCI_0_1_FN_CPU_OFF: case QEMU_PSCI_0_2_FN_CPU_OFF: diff --git a/target/arm/hvf_arm.h b/target/arm/hvf_arm.h index ea82f2691d..bf55e7ae28 100644 --- a/target/arm/hvf_arm.h +++ b/target/arm/hvf_arm.h @@ -24,5 +24,8 @@ void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu); =20 uint32_t hvf_arm_get_default_ipa_bit_size(void); uint32_t hvf_arm_get_max_ipa_bit_size(void); +bool hvf_arm_el2_supported(void); +bool hvf_arm_el2_enabled(void); +void hvf_arm_el2_enable(bool); =20 #endif --=20 2.39.5 (Apple Git-154)