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Sun, 27 Jul 2025 01:07:15 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH 65/82] target/arm: Add gcs record for BLR with PAuth Date: Sat, 26 Jul 2025 22:02:37 -1000 Message-ID: <20250727080254.83840-66-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250727080254.83840-1-richard.henderson@linaro.org> References: <20250727080254.83840-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1753604471629116600 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- target/arm/tcg/translate-a64.c | 31 ++++++++++++++++--------------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 4c3cc3d943..a945fd3b33 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -1831,20 +1831,20 @@ static bool trans_BRAZ(DisasContext *s, arg_braz *a) =20 static bool trans_BLRAZ(DisasContext *s, arg_braz *a) { - TCGv_i64 dst, lr; + TCGv_i64 dst, link; =20 if (!dc_isar_feature(aa64_pauth, s)) { return false; } - dst =3D auth_branch_target(s, cpu_reg(s, a->rn), tcg_constant_i64(0), = !a->m); - lr =3D cpu_reg(s, 30); - if (dst =3D=3D lr) { - TCGv_i64 tmp =3D tcg_temp_new_i64(); - tcg_gen_mov_i64(tmp, dst); - dst =3D tmp; + + link =3D tcg_temp_new_i64(); + gen_pc_plus_diff(s, link, 4); + if (s->gcs_en) { + gen_add_gcs_record(s, link); } - gen_pc_plus_diff(s, lr, curr_insn_len(s)); + tcg_gen_mov_i64(cpu_reg(s, 30), link); + gen_a64_set_pc(s, dst); set_btype_for_blr(s); s->base.is_jmp =3D DISAS_JUMP; @@ -1881,19 +1881,20 @@ static bool trans_BRA(DisasContext *s, arg_bra *a) =20 static bool trans_BLRA(DisasContext *s, arg_bra *a) { - TCGv_i64 dst, lr; + TCGv_i64 dst, link; =20 if (!dc_isar_feature(aa64_pauth, s)) { return false; } dst =3D auth_branch_target(s, cpu_reg(s, a->rn), cpu_reg_sp(s, a->rm),= !a->m); - lr =3D cpu_reg(s, 30); - if (dst =3D=3D lr) { - TCGv_i64 tmp =3D tcg_temp_new_i64(); - tcg_gen_mov_i64(tmp, dst); - dst =3D tmp; + + link =3D tcg_temp_new_i64(); + gen_pc_plus_diff(s, link, 4); + if (s->gcs_en) { + gen_add_gcs_record(s, link); } - gen_pc_plus_diff(s, lr, curr_insn_len(s)); + tcg_gen_mov_i64(cpu_reg(s, 30), link); + gen_a64_set_pc(s, dst); set_btype_for_blr(s); s->base.is_jmp =3D DISAS_JUMP; --=20 2.43.0