From nobody Sat Nov 15 12:30:55 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1753407607786250.51624016696485; Thu, 24 Jul 2025 18:40:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uf7Pc-00028i-UI; Thu, 24 Jul 2025 21:39:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uf7Nq-0000rG-HB for qemu-devel@nongnu.org; Thu, 24 Jul 2025 21:38:09 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uf7Nm-0002bV-3Q for qemu-devel@nongnu.org; Thu, 24 Jul 2025 21:38:01 -0400 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxbKzq34JomJAxAQ--.35109S3; Fri, 25 Jul 2025 09:37:46 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJCxdOTk34Joz5wlAA--.62171S15; Fri, 25 Jul 2025 09:37:45 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 13/17] target/loongarch: Use correct address when flush tlb Date: Fri, 25 Jul 2025 09:37:35 +0800 Message-Id: <20250725013739.994437-14-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250725013739.994437-1-maobibo@loongson.cn> References: <20250725013739.994437-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJCxdOTk34Joz5wlAA--.62171S15 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1753407609573116600 Content-Type: text/plain; charset="utf-8" With tlb_flush_range_by_mmuidx(), the virtual address is 64 bit. However on LoongArch TLB emulation system, virtual address is 48 bit. It is necessary to convert 48 bit address to 64 bit when flush tlb, also fix address calculation issue with odd page. Signed-off-by: Bibo Mao --- target/loongarch/tcg/tlb_helper.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_h= elper.c index 715c5a20da..61cc19610e 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -96,6 +96,15 @@ static void raise_mmu_exception(CPULoongArchState *env, = target_ulong address, } } =20 +/* Convert 48 bit virtual address from LoongArch TLB to 64 bit VA */ +static inline target_ulong __vaddr(target_ulong addr) +{ + target_ulong high; + + high =3D -(addr >> (TARGET_VIRT_ADDR_SPACE_BITS - 1)); + return addr + (high << TARGET_VIRT_ADDR_SPACE_BITS); +} + static void invalidate_tlb_entry(CPULoongArchState *env, int index) { target_ulong addr, mask, pagesize; @@ -115,16 +124,15 @@ static void invalidate_tlb_entry(CPULoongArchState *e= nv, int index) tlb_ps =3D FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); pagesize =3D MAKE_64BIT_MASK(tlb_ps, 1); mask =3D MAKE_64BIT_MASK(0, tlb_ps + 1); + addr =3D __vaddr((tlb_vppn << R_TLB_MISC_VPPN_SHIFT) & ~mask); =20 if (tlb_v0) { - addr =3D (tlb_vppn << R_TLB_MISC_VPPN_SHIFT) & ~mask; /* even */ tlb_flush_range_by_mmuidx(env_cpu(env), addr, pagesize, mmu_idx, TARGET_LONG_BITS); } =20 if (tlb_v1) { - addr =3D (tlb_vppn << R_TLB_MISC_VPPN_SHIFT) & pagesize; /* odd= */ - tlb_flush_range_by_mmuidx(env_cpu(env), addr, pagesize, + tlb_flush_range_by_mmuidx(env_cpu(env), addr + pagesize, pagesize, mmu_idx, TARGET_LONG_BITS); } } --=20 2.39.3