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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1753114980; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=G+vpGBIdAyFmIOhIassfZzr92Quav/tsXT1F0h3i0Ho=; b=Sdg8O8GcfIeEZR+jBPROMyYPs/GD8uznkfxwbCZBEa6EcTzx5EJ/i8eNvu1Coo1gZRORb0 LfQWE316FG9TzEQUSakLSnQon8I+4xmiheK+ZOBl5t803PZenlbE8Ma8gnJx0k9lWWdLsL 4EgvCjJG0KilCpjpLEq292Y9PHUUCUc= X-MC-Unique: V34ETTSfMfuFxk_jYGTe2Q-1 X-Mimecast-MFC-AGG-ID: V34ETTSfMfuFxk_jYGTe2Q_1753114975 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-devel@nongnu.org Cc: Nicholas Piggin , Daniel Henrique Barboza , Glenn Miles , Michael Kowal , Caleb Schlossin , Gautam Menghani , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 06/50] ppc/xive: Fix PHYS NSR ring matching Date: Mon, 21 Jul 2025 18:21:49 +0200 Message-ID: <20250721162233.686837-7-clg@redhat.com> In-Reply-To: <20250721162233.686837-1-clg@redhat.com> References: <20250721162233.686837-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -29 X-Spam_score: -3.0 X-Spam_bar: --- X-Spam_report: (-3.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.926, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1753115046496116600 From: Nicholas Piggin Test that the NSR exception bit field is equal to the pool ring value, rather than any common bits set, which is more correct (although there is no practical bug because the LSI NSR type is not implemented and POOL/PHYS NSR are encoded with exclusive bits). Fixes: 4c3ccac636 ("pnv/xive: Add special handling for pool targets") Signed-off-by: Nicholas Piggin Reviewed-by: Glenn Miles Reviewed-by: Michael Kowal Reviewed-by: Caleb Schlossin Tested-by: Gautam Menghani Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-7-npiggin@gm= ail.com Signed-off-by: C=C3=A9dric Le Goater --- hw/intc/xive.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 120376fb6b6d..bc829bebe9d0 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -54,7 +54,8 @@ static uint64_t xive_tctx_accept(XiveTCTX *tctx, uint8_t = ring) uint8_t *alt_regs; =20 /* POOL interrupt uses IPB in QW2, POOL ring */ - if ((ring =3D=3D TM_QW3_HV_PHYS) && (nsr & (TM_QW3_NSR_HE_POOL << = 6))) { + if ((ring =3D=3D TM_QW3_HV_PHYS) && + ((nsr & TM_QW3_NSR_HE) =3D=3D (TM_QW3_NSR_HE_POOL << 6))) { alt_ring =3D TM_QW2_HV_POOL; } else { alt_ring =3D ring; --=20 2.50.1