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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1753115053; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bMh+LdQrAb64bov6H42Yd32t7AMR09/gX5XqffGEYdg=; b=bKgtcl+Q3sxikBWPNFdzdSJp5v27g/P0oVu5Ee8bfrgHe+68WO4AJD4UuWG91mMBlu9Tiw is5tpWC7rimJOxrACV5qu4DLkT1g4SLv33xCe+0EpMHjyDTBcNemfuWlWgtIw8AgpCqwA/ GwXEoTLZV0nOqohxL2T7SL+1i2l3gXc= X-MC-Unique: uYMmAyBROFy33agyJskrSA-1 X-Mimecast-MFC-AGG-ID: uYMmAyBROFy33agyJskrSA_1753115049 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-devel@nongnu.org Cc: Nicholas Piggin , Daniel Henrique Barboza , Glenn Miles , Michael Kowal , Gautam Menghani , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 32/50] ppc/xive: Split xive recompute from IPB function Date: Mon, 21 Jul 2025 18:22:15 +0200 Message-ID: <20250721162233.686837-33-clg@redhat.com> In-Reply-To: <20250721162233.686837-1-clg@redhat.com> References: <20250721162233.686837-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -29 X-Spam_score: -3.0 X-Spam_bar: --- X-Spam_report: (-3.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.926, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1753115479507116600 From: Nicholas Piggin Further split xive_tctx_pipr_update() by splitting out a new function that is used to re-compute the PIPR from IPB. This is generally only used with XIVE1, because group interrputs require more logic. Signed-off-by: Nicholas Piggin Reviewed-by: Glenn Miles Reviewed-by: Michael Kowal Tested-by: Gautam Menghani Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-33-npiggin@g= mail.com Signed-off-by: C=C3=A9dric Le Goater --- hw/intc/xive.c | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 7110cf45d74f..5deb2f478fcb 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -225,6 +225,20 @@ void xive_tctx_pipr_update(XiveTCTX *tctx, uint8_t rin= g, uint8_t priority, xive_tctx_notify(tctx, ring, group_level); } =20 +static void xive_tctx_pipr_recompute_from_ipb(XiveTCTX *tctx, uint8_t ring) +{ + /* HV_POOL ring uses HV_PHYS NSR, CPPR and PIPR registers */ + uint8_t alt_ring =3D (ring =3D=3D TM_QW2_HV_POOL) ? TM_QW3_HV_PHYS : r= ing; + uint8_t *aregs =3D &tctx->regs[alt_ring]; + uint8_t *regs =3D &tctx->regs[ring]; + + /* Does not support a presented group interrupt */ + g_assert(!xive_nsr_indicates_group_exception(alt_ring, aregs[TM_NSR])); + + aregs[TM_PIPR] =3D xive_ipb_to_pipr(regs[TM_IPB]); + xive_tctx_notify(tctx, ring, 0); +} + void xive_tctx_pipr_present(XiveTCTX *tctx, uint8_t ring, uint8_t priority, uint8_t group_level) { @@ -517,7 +531,12 @@ static void xive_tm_set_os_lgs(XivePresenter *xptr, Xi= veTCTX *tctx, static void xive_tm_set_os_pending(XivePresenter *xptr, XiveTCTX *tctx, hwaddr offset, uint64_t value, unsigned= size) { - xive_tctx_pipr_update(tctx, TM_QW1_OS, value & 0xff, 0); + uint8_t ring =3D TM_QW1_OS; + uint8_t *regs =3D &tctx->regs[ring]; + + /* XXX: how should this work exactly? */ + regs[TM_IPB] |=3D xive_priority_to_ipb(value & 0xff); + xive_tctx_pipr_recompute_from_ipb(tctx, ring); } =20 static void xive_os_cam_decode(uint32_t cam, uint8_t *nvt_blk, @@ -601,14 +620,14 @@ static void xive_tctx_need_resend(XiveRouter *xrtr, X= iveTCTX *tctx, } =20 /* - * Always call xive_tctx_pipr_update(). Even if there were no + * Always call xive_tctx_recompute_from_ipb(). Even if there were no * escalation triggered, there could be a pending interrupt which * was saved when the context was pulled and that we need to take * into account by recalculating the PIPR (which is not * saved/restored). * It will also raise the External interrupt signal if needed. */ - xive_tctx_pipr_update(tctx, TM_QW1_OS, 0xFF, 0); /* fxb */ + xive_tctx_pipr_recompute_from_ipb(tctx, TM_QW1_OS); /* fxb */ } =20 /* --=20 2.50.1