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charset="utf-8" If we fail migration because of a mismatch of some registers between source and destination, the error message is not very informative: qemu-system-aarch64: error while loading state for instance 0x0 ofdevice 'c= pu' qemu-system-aarch64: Failed to put registers after init: Invalid argument At least try to give the user a hint which registers had a problem, even if they cannot really do anything about it right now. Sample output: Could not set register op0:3 op1:0 crn:0 crm:0 op2:0 to c00fac31 (is 413fd0= c1) We could be even more helpful once we support writable ID registers, at which point the user might actually be able to configure something that is migratable. Suggested-by: Eric Auger Signed-off-by: Cornelia Huck --- Notes: - This currently prints the list of failing registers for every call to write_list_to_kvmstate(), in particular for every cpu -- we might want to reduce that. - If the macros aren't too ugly (or we manage to improve them), there might be other places where they could be useful. --- target/arm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 667234485547..ac6502e0c78f 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -900,6 +900,24 @@ bool write_kvmstate_to_list(ARMCPU *cpu) return ok; } =20 +/* pretty-print a KVM register */ +#define CP_REG_ARM64_SYSREG_OP(_reg, _op) \ + ((uint8_t)((_reg & CP_REG_ARM64_SYSREG_ ## _op ## _MASK) >> \ + CP_REG_ARM64_SYSREG_ ## _op ## _SHIFT)) + +#define PRI_CP_REG_ARM64_SYSREG(_reg) \ + ({ \ + char _out[32]; \ + snprintf(_out, sizeof(_out), \ + "op0:%d op1:%d crn:%d crm:%d op2:%d", \ + CP_REG_ARM64_SYSREG_OP(_reg, OP0), \ + CP_REG_ARM64_SYSREG_OP(_reg, OP1), \ + CP_REG_ARM64_SYSREG_OP(_reg, CRN), \ + CP_REG_ARM64_SYSREG_OP(_reg, CRM), \ + CP_REG_ARM64_SYSREG_OP(_reg, OP2)); \ + _out; \ + }) + bool write_list_to_kvmstate(ARMCPU *cpu, int level) { CPUState *cs =3D CPU(cpu); @@ -932,6 +950,41 @@ bool write_list_to_kvmstate(ARMCPU *cpu, int level) * a different value from what it actually contains". */ ok =3D false; + switch (ret) { + case -ENOENT: + error_report("Could not set register %s: unknown to KVM", + PRI_CP_REG_ARM64_SYSREG(regidx)); + break; + case -EINVAL: + if ((regidx & KVM_REG_SIZE_MASK) =3D=3D KVM_REG_SIZE_U32) { + if (!kvm_get_one_reg(cs, regidx, &v32)) { + error_report("Could not set register %s to %x (is = %x)", + PRI_CP_REG_ARM64_SYSREG(regidx), + (uint32_t)cpu->cpreg_values[i], v32); + } else { + error_report("Could not set register %s to %x", + PRI_CP_REG_ARM64_SYSREG(regidx), + (uint32_t)cpu->cpreg_values[i]); + } + } else /* U64 */ { + uint64_t v64; + + if (!kvm_get_one_reg(cs, regidx, &v64)) { + error_report("Could not set register %s to %lx (is= %lx)", + PRI_CP_REG_ARM64_SYSREG(regidx), + cpu->cpreg_values[i], v64); + } else { + error_report("Could not set register %s to %lx", + PRI_CP_REG_ARM64_SYSREG(regidx), + cpu->cpreg_values[i]); + } + } + break; + default: + error_report("Could not set register %s: %s", + PRI_CP_REG_ARM64_SYSREG(regidx), + strerror(-ret)); + } } } return ok; --=20 2.50.0