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Thu, 17 Jul 2025 11:41:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout3.samsung.com 20250718081912epoutp037c6d28e046929076f1ff79a99069596f~TSqUJs4O-0973009730epoutp03d DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1752826752; bh=q8mgLEDBBtLwWuVqQ1Q1XlIqR7uiPwGux7yAlfkaMvg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FJs0AFf1l9UESrP1Ru4cuhi0k6VDxxBMlSUTz/ZFY3edvRp1sFzf1/Dt1T1yoaloi Bx+8QUMNCi21jyE2mDGbLpwCaGO/0MsOcWVI53KAPBb8OxKZuIxukcQZPyPp2Hy1Jj rEfvz9DFWv8z1GVtBo0zdm/9p04/OYctIHQ2WoAE= From: Ayush Mishra To: qemu-devel@nongnu.org Cc: kbusch@kernel.org, its@irrelevant.dk, foss@defmacro.it, Ayush Mishra Subject: [PATCH 1/2] hw/nvme: Adding support for LID 0x00- Supported Log Pages Date: Thu, 17 Jul 2025 16:50:28 +0530 Message-ID: <20250717112029.28242-2-ayush.m55@samsung.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250717112029.28242-1-ayush.m55@samsung.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250717114157epcas5p230c17abfb2d0e9f83258b90187eaf9b1 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250717114157epcas5p230c17abfb2d0e9f83258b90187eaf9b1 References: <20250717112029.28242-1-ayush.m55@samsung.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=203.254.224.33; envelope-from=ayush.m55@samsung.com; helo=mailout3.samsung.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @samsung.com) X-ZM-MESSAGEID: 1752826811708116600 Signed-off-by: Ayush Mishra --- hw/nvme/ctrl.c | 32 ++++++++++++++++++++++++++++++++ hw/nvme/nvme.h | 2 ++ include/block/nvme.h | 11 +++++++++++ 3 files changed, 45 insertions(+) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index e62c6a3588..93c950b5b2 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -5105,6 +5105,22 @@ static uint16_t nvme_fw_log_info(NvmeCtrl *n, uint32= _t buf_len, uint64_t off, return nvme_c2h(n, (uint8_t *) &fw_log + off, trans_len, req); } =20 +static uint16_t nvme_supp_log_page(NvmeCtrl *n, uint8_t rae, uint32_t buf_= len, + uint64_t off, NvmeRequest *req) +{ + uint32_t supplogpagesize =3D sizeof(n->supplogpage); + uint32_t trans_len; + + if (off >=3D supplogpagesize) { + trace_pci_nvme_err_invalid_log_page_offset(off, supplogpagesize); + return NVME_INVALID_FIELD | NVME_DNR; + } + + trans_len =3D MIN(supplogpagesize - off, buf_len); + + return nvme_c2h(n, ((uint8_t *)n->supplogpage) + off, trans_len, req); +} + static uint16_t nvme_error_info(NvmeCtrl *n, uint8_t rae, uint32_t buf_len, uint64_t off, NvmeRequest *req) { @@ -5474,6 +5490,8 @@ static uint16_t nvme_get_log(NvmeCtrl *n, NvmeRequest= *req) } =20 switch (lid) { + case NVME_SUPP_LOG_PAGE: + return nvme_supp_log_page(n, rae, len, off, req); case NVME_LOG_ERROR_INFO: return nvme_error_info(n, rae, len, off, req); case NVME_LOG_SMART_INFO: @@ -8904,6 +8922,20 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *p= ci_dev) if (pci_is_vf(pci_dev) && !sctrl->scs) { stl_le_p(&n->bar.csts, NVME_CSTS_FAILED); } + + n->supplogpage[NVME_SUPP_LOG_PAGE].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_ERROR_INFO].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_SMART_INFO].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_FW_SLOT_INFO].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_CHANGED_NSLIST].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_CMD_EFFECTS].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_ENDGRP].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_FDP_CONFS].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_FDP_RUH_USAGE].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_FDP_STATS].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_FDP_EVENTS].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_VENDOR_START].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_VENDOR_END].lsupp_ios =3D NVME_LID_SUPP; } =20 static int nvme_init_subsys(NvmeCtrl *n, Error **errp) diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h index 6f782ba188..660420c95a 100644 --- a/hw/nvme/nvme.h +++ b/hw/nvme/nvme.h @@ -26,6 +26,7 @@ =20 #define NVME_MAX_CONTROLLERS 256 #define NVME_MAX_NAMESPACES 256 +#define NVME_MAX_LOG_PAGES 256 #define NVME_EUI64_DEFAULT ((uint64_t)0x5254000000000000) #define NVME_FDP_MAX_EVENTS 63 #define NVME_FDP_MAXPIDS 128 @@ -625,6 +626,7 @@ typedef struct NvmeCtrl { NvmeSQueue admin_sq; NvmeCQueue admin_cq; NvmeIdCtrl id_ctrl; + NvmeSuppLogpage supplogpage[NVME_MAX_LOG_PAGES]; =20 struct { struct { diff --git a/include/block/nvme.h b/include/block/nvme.h index 358e516e38..c38422b38d 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -1079,6 +1079,7 @@ enum { }; =20 enum NvmeLogIdentifier { + NVME_SUPP_LOG_PAGE =3D 0x00, NVME_LOG_ERROR_INFO =3D 0x01, NVME_LOG_SMART_INFO =3D 0x02, NVME_LOG_FW_SLOT_INFO =3D 0x03, @@ -1705,6 +1706,16 @@ typedef enum NvmeZoneState { NVME_ZONE_STATE_OFFLINE =3D 0x0f, } NvmeZoneState; =20 +enum { + NVME_LID_SUPP =3D 1 << 0, + NVME_INDEX_OFF_SUPP =3D 1 << 1, +}; + +typedef struct QEMU_PACKED NvmeSuppLogpage { + uint16_t lsupp_ios; + uint16_t lidspec; +} NvmeSuppLogpage; + typedef struct QEMU_PACKED NvmePriCtrlCap { uint16_t cntlid; uint16_t portid; --=20 2.43.0 From nobody Sat Nov 15 10:42:24 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1752826831303463.09306745163485; Fri, 18 Jul 2025 01:20:31 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ucgJY-00082i-57; Fri, 18 Jul 2025 04:19:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ucgJT-00080L-N2 for qemu-devel@nongnu.org; Fri, 18 Jul 2025 04:19:27 -0400 Received: from mailout1.samsung.com ([203.254.224.24]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ucgJQ-0001Xs-Nq for qemu-devel@nongnu.org; Fri, 18 Jul 2025 04:19:27 -0400 Received: from epcas5p2.samsung.com (unknown [182.195.41.40]) by mailout1.samsung.com (KnoxPortal) with ESMTP id 20250718081918epoutp016c88d6a94be698780273a8416b888938~TSqZZpJbJ2589525895epoutp019 for ; Fri, 18 Jul 2025 08:19:18 +0000 (GMT) Received: from epsnrtp03.localdomain (unknown [182.195.42.155]) by epcas5p2.samsung.com (KnoxPortal) with ESMTPS id 20250718081917epcas5p28734c00465365253f9ff7cf3593a5194~TSqY5vU761086610866epcas5p2A; Fri, 18 Jul 2025 08:19:17 +0000 (GMT) Received: from epcas5p3.samsung.com (unknown [182.195.38.91]) by epsnrtp03.localdomain (Postfix) with ESMTP id 4bk2ks0b33z3hhT3; Fri, 18 Jul 2025 08:19:17 +0000 (GMT) Received: from epsmtip2.samsung.com (unknown [182.195.34.31]) by epcas5p1.samsung.com (KnoxPortal) with ESMTPA id 20250717114200epcas5p1324853eb5e30cbcf38b6bfb4defe597b~TByGcLGB23025730257epcas5p1w; Thu, 17 Jul 2025 11:42:00 +0000 (GMT) Received: from test-X570-AORUS-ULTRA.samsungds.net (unknown [107.99.41.42]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20250717114159epsmtip2b697ba2b971f3087466414db218f318c~TByFiwJna1309013090epsmtip2Z; Thu, 17 Jul 2025 11:41:59 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.samsung.com 20250718081918epoutp016c88d6a94be698780273a8416b888938~TSqZZpJbJ2589525895epoutp019 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1752826758; bh=Gkbrm8sGB+prOA674568G6OepPeer9uYT3iqQ6wN8tY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ya53r+CMrLybkIkEUvBCpaDmy6yE2ROzTBWFe+hWZ/Xs23Aff5KYABskF7xeNzArI o8n3B0ZB0mykPWAINPaX1CCl428z8q3AYqn2s4OG2E9KnqI+l6vcMSfEpKP0pON75L ds57D2DRyFlklEkHM+AQyDGAUNNal7Bp8sjGBjM8= From: Ayush Mishra To: qemu-devel@nongnu.org Cc: kbusch@kernel.org, its@irrelevant.dk, foss@defmacro.it, Ayush Mishra Subject: [PATCH 2/2] hw/nvme: Adding Support for Feature Identifiers Supported and Effects (Log Identifier 12h) Date: Thu, 17 Jul 2025 16:50:29 +0530 Message-ID: <20250717112029.28242-3-ayush.m55@samsung.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250717112029.28242-1-ayush.m55@samsung.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250717114200epcas5p1324853eb5e30cbcf38b6bfb4defe597b X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250717114200epcas5p1324853eb5e30cbcf38b6bfb4defe597b References: <20250717112029.28242-1-ayush.m55@samsung.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=203.254.224.24; envelope-from=ayush.m55@samsung.com; helo=mailout1.samsung.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @samsung.com) X-ZM-MESSAGEID: 1752826833094116600 Signed-off-by: Ayush Mishra --- hw/nvme/ctrl.c | 63 ++++++++++++++++++++++++++++++++++++++++++++ include/block/nvme.h | 21 +++++++++++++++ 2 files changed, 84 insertions(+) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 93c950b5b2..5ef2282fd2 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -252,6 +252,24 @@ static const bool nvme_feature_support[NVME_FID_MAX] = =3D { [NVME_FDP_EVENTS] =3D true, }; =20 +static const uint32_t nvme_fid_supp_effects[NVME_FID_MAX] =3D { + [NVME_ARBITRATION] =3D NVME_EFFECTS_CSUPP | NVME_CTRL_SCOP= E, + [NVME_POWER_MANAGEMENT] =3D NVME_EFFECTS_CSUPP | NVME_CTRL_SCOP= E, + [NVME_TEMPERATURE_THRESHOLD] =3D NVME_EFFECTS_CSUPP | NVME_CTRL_SCOP= E, + [NVME_ERROR_RECOVERY] =3D NVME_EFFECTS_CSUPP | NVME_NMSP_SCOP= E, + [NVME_VOLATILE_WRITE_CACHE] =3D NVME_EFFECTS_CSUPP | NVME_CTRL_SCOP= E, + [NVME_NUMBER_OF_QUEUES] =3D NVME_EFFECTS_CSUPP | NVME_CTRL_SCOP= E, + [NVME_INTERRUPT_COALESCING] =3D NVME_EFFECTS_CSUPP | NVME_CTRL_SCOP= E, + [NVME_INTERRUPT_VECTOR_CONF] =3D NVME_EFFECTS_CSUPP | NVME_CTRL_SCOP= E, + [NVME_WRITE_ATOMICITY] =3D NVME_EFFECTS_CSUPP | NVME_CTRL_SCOP= E, + [NVME_ASYNCHRONOUS_EVENT_CONF] =3D NVME_EFFECTS_CSUPP | NVME_CTRL_SCOP= E, + [NVME_TIMESTAMP] =3D NVME_EFFECTS_CSUPP | NVME_CTRL_SCOP= E, + [NVME_HOST_BEHAVIOR_SUPPORT] =3D NVME_EFFECTS_CSUPP | NVME_CTRL_SCOP= E, + [NVME_COMMAND_SET_PROFILE] =3D NVME_EFFECTS_CSUPP | NVME_CTRL_SCOP= E, + [NVME_FDP_MODE] =3D NVME_EFFECTS_CSUPP | NVME_ENDURANCE= _SCOPE, + [NVME_FDP_EVENTS] =3D NVME_EFFECTS_CSUPP, +}; + static const uint32_t nvme_feature_cap[NVME_FID_MAX] =3D { [NVME_TEMPERATURE_THRESHOLD] =3D NVME_FEAT_CAP_CHANGE, [NVME_ERROR_RECOVERY] =3D NVME_FEAT_CAP_CHANGE | NVME_FEAT_C= AP_NS, @@ -5086,6 +5104,47 @@ static uint16_t nvme_endgrp_info(NvmeCtrl *n, uint8= _t rae, uint32_t buf_len, return nvme_c2h(n, (uint8_t *)&info + off, buf_len, req); } =20 +static uint16_t nvme_log_fid_supp_effects_log(NvmeCtrl *n, uint8_t csi, + uint32_t buf_len, uint64_t off, NvmeRequest *req) +{ + NvmeFidSuppLog log =3D {}; + const uint32_t *supp_fid =3D NULL; + uint32_t trans_len; + bool ot =3D le32_to_cpu(req->cmd.cdw14) >> 23; + + if (off >=3D sizeof(log) || (ot =3D=3D 1 && (off * 4 >=3D sizeof(log))= )) { + trace_pci_nvme_err_invalid_log_page_offset(off, sizeof(log)); + return NVME_INVALID_FIELD | NVME_DNR; + } + + switch (NVME_CC_CSS(ldl_le_p(&n->bar.cc))) { + case NVME_CC_CSS_NVM: + supp_fid =3D nvme_fid_supp_effects; + /* fall through */ + case NVME_CC_CSS_ADMIN_ONLY: + break; + case NVME_CC_CSS_ALL: + switch (csi) { + case NVME_CSI_NVM: + supp_fid =3D nvme_fid_supp_effects; + break; + case NVME_CSI_ZONED: + break; + } + } + + if (ot =3D=3D 1) { + off *=3D 4; + } + + if (supp_fid) { + memcpy(log.fis, supp_fid, sizeof(log.fis)); + } + + trans_len =3D MIN(sizeof(log) - off, buf_len); + + return nvme_c2h(n, ((uint8_t *)&log) + off, trans_len, req); +} =20 static uint16_t nvme_fw_log_info(NvmeCtrl *n, uint32_t buf_len, uint64_t o= ff, NvmeRequest *req) @@ -5506,6 +5565,8 @@ static uint16_t nvme_get_log(NvmeCtrl *n, NvmeRequest= *req) return nvme_cmd_effects(n, csi, len, off, req); case NVME_LOG_ENDGRP: return nvme_endgrp_info(n, rae, len, off, req); + case NVME_LOG_FID_SUPP_EFFECTS: + return nvme_log_fid_supp_effects_log(n, csi, len, off, req); case NVME_LOG_FDP_CONFS: return nvme_fdp_confs(n, lspi, len, off, req); case NVME_LOG_FDP_RUH_USAGE: @@ -8930,6 +8991,8 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pc= i_dev) n->supplogpage[NVME_LOG_CHANGED_NSLIST].lsupp_ios =3D NVME_LID_SUPP; n->supplogpage[NVME_LOG_CMD_EFFECTS].lsupp_ios =3D NVME_LID_SUPP; n->supplogpage[NVME_LOG_ENDGRP].lsupp_ios =3D NVME_LID_SUPP; + n->supplogpage[NVME_LOG_FID_SUPP_EFFECTS].lsupp_ios =3D NVME_LID_SUPP + | NVME_INDEX_OFF_S= UPP; n->supplogpage[NVME_LOG_FDP_CONFS].lsupp_ios =3D NVME_LID_SUPP; n->supplogpage[NVME_LOG_FDP_RUH_USAGE].lsupp_ios =3D NVME_LID_SUPP; n->supplogpage[NVME_LOG_FDP_STATS].lsupp_ios =3D NVME_LID_SUPP; diff --git a/include/block/nvme.h b/include/block/nvme.h index c38422b38d..0ba69477a0 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -1068,6 +1068,10 @@ typedef struct NvmeEffectsLog { uint8_t resv[2048]; } NvmeEffectsLog; =20 +typedef struct NvmeFidSuppLog { + uint32_t fis[256]; +} NvmeFidSuppLog; + enum { NVME_CMD_EFF_CSUPP =3D 1 << 0, NVME_CMD_EFF_LBCC =3D 1 << 1, @@ -1086,6 +1090,7 @@ enum NvmeLogIdentifier { NVME_LOG_CHANGED_NSLIST =3D 0x04, NVME_LOG_CMD_EFFECTS =3D 0x05, NVME_LOG_ENDGRP =3D 0x09, + NVME_LOG_FID_SUPP_EFFECTS =3D 0x12, NVME_LOG_FDP_CONFS =3D 0x20, NVME_LOG_FDP_RUH_USAGE =3D 0x21, NVME_LOG_FDP_STATS =3D 0x22, @@ -1364,6 +1369,22 @@ typedef enum NvmeFeatureCap { NVME_FEAT_CAP_CHANGE =3D 1 << 2, } NvmeFeatureCap; =20 +typedef enum NvmeFidSuppEffects { + NVME_EFFECTS_CSUPP =3D 1 << 0, + NVME_EFFECTS_UDCC =3D 1 << 1, + NVME_EFFECTS_NCC =3D 1 << 2, + NVME_EFFECTS_NIC =3D 1 << 3, + NVME_EFFECTS_CCC =3D 1 << 4, + NVME_EFFECTS_UUID_SEL =3D 1 << 19, + NVME_NMSP_SCOPE =3D 1 << 20, + NVME_CTRL_SCOPE =3D 1 << 21, + NVME_NVM_SET_SCOPE =3D 1 << 22, + NVME_ENDURANCE_SCOPE =3D 1 << 23, + NVME_DOMAIN_SCOPE =3D 1 << 24, + NVME_SUBSYSTEM_SCOPE =3D 1 << 25, + NVME_CTRL_DATA_QUEUE =3D 1 << 26, +} NvmeFidSuppEffects; + typedef enum NvmeGetFeatureSelect { NVME_GETFEAT_SELECT_CURRENT =3D 0x0, NVME_GETFEAT_SELECT_DEFAULT =3D 0x1, --=20 2.43.0