From nobody Sat Nov 15 12:50:01 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1752519532; cv=none; d=zohomail.com; s=zohoarc; b=P49ygu57Yxhpo3acDhjOQQN7aKwoabTuzNAyArjofbIOcA2XhV9AenUdeO5fWGW47XkUxH4MFQCkwNwz5TvJllHDG50/Du2iOhDTe5edyWO4ykskc7xjOW/W82koPSD1F4s1csFlt43l6TJ139LvHX0gcICh9oBz05R7eK9+CsI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1752519532; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=bMpr+itRqfQGXPrG9/PsKWlUBLVFHANkBKmkB5eyFFI=; b=f+lp6+3+zVi1jwgC5fWKiatDEwNOBNhPhrs7mUmbxpxbLfoNgWBqgM3ymUEeDi1/S8PomrCTd4lCyYjN4iWKm7eNXid9arClN4xVdr0vcN0LaCaWZYOKaZlcdW9flqlFPfTwvRrZcgBuw/5+MybIGu9EAqypCpug11VtkX47hKk= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1752519532330897.3140163616634; Mon, 14 Jul 2025 11:58:52 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ubONg-0007nc-DI; Mon, 14 Jul 2025 14:58:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ubNFo-00010l-K3 for qemu-devel@nongnu.org; Mon, 14 Jul 2025 13:46:20 -0400 Received: from [185.176.79.56] (helo=frasgout.his.huawei.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ubNFl-0007ji-SG for qemu-devel@nongnu.org; Mon, 14 Jul 2025 13:46:16 -0400 Received: from mail.maildlp.com (unknown [172.18.186.31]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4bgqTR2tg6z6M4K7; Tue, 15 Jul 2025 01:44:59 +0800 (CST) Received: from frapeml500008.china.huawei.com (unknown [7.182.85.71]) by mail.maildlp.com (Postfix) with ESMTPS id 286FE140142; Tue, 15 Jul 2025 01:46:12 +0800 (CST) Received: from SecurePC-101-06.china.huawei.com (10.122.19.247) by frapeml500008.china.huawei.com (7.182.85.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Mon, 14 Jul 2025 19:46:11 +0200 To: , Michael Tsirkin , Fan Ni , Anisa Su , Anisa Su CC: , Subject: [PATCH qemu v2 02/11] hw/cxl: mailbox-utils: 0x5600 - FMAPI Get DCD Info Date: Mon, 14 Jul 2025 18:44:58 +0100 Message-ID: <20250714174509.1984430-3-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250714174509.1984430-1-Jonathan.Cameron@huawei.com> References: <20250714174509.1984430-1-Jonathan.Cameron@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.122.19.247] X-ClientProxiedBy: lhrpeml100011.china.huawei.com (7.191.174.247) To frapeml500008.china.huawei.com (7.182.85.71) X-Host-Lookup-Failed: Reverse DNS lookup failed for 185.176.79.56 (deferred) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -33 X-Spam_score: -3.4 X-Spam_bar: --- X-Spam_report: (-3.4 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron From: Jonathan Cameron via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1752519534405116600 Content-Type: text/plain; charset="utf-8" From: Anisa Su FM DCD Management command 0x5600 implemented per CXL 3.2 Spec Section 7.6.7= .6.1. Reviewed-by: Fan Ni Signed-off-by: Anisa Su Signed-off-by: Jonathan Cameron --- v2 series for merge. - Modify the code that fills in the support blk sizes to not do effectively 2**log2(x) when we know x is a power of 2. Similar to what Michael reported later in the series. --- include/hw/cxl/cxl_device.h | 1 + hw/cxl/cxl-mailbox-utils.c | 59 +++++++++++++++++++++++++++++++++++++ hw/mem/cxl_type3.c | 4 +++ 3 files changed, 64 insertions(+) diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index a151e19da8..7eade9cf8a 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -530,6 +530,7 @@ typedef struct CXLDCRegion { uint32_t dsmadhandle; uint8_t flags; unsigned long *blk_bitmap; + uint64_t supported_blk_size_bitmask; } CXLDCRegion; =20 typedef struct CXLSetFeatureInfo { diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index 0b615ea37a..3304048922 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -23,6 +23,7 @@ #include "qemu/uuid.h" #include "system/hostmem.h" #include "qemu/range.h" +#include "qapi/qapi-types-cxl.h" =20 #define CXL_CAPACITY_MULTIPLIER (256 * MiB) #define CXL_DC_EVENT_LOG_SIZE 8 @@ -117,6 +118,8 @@ enum { #define GET_PHYSICAL_PORT_STATE 0x1 TUNNEL =3D 0x53, #define MANAGEMENT_COMMAND 0x0 + FMAPI_DCD_MGMT =3D 0x56, + #define GET_DCD_INFO 0x0 }; =20 /* CCI Message Format CXL r3.1 Figure 7-19 */ @@ -3237,6 +3240,52 @@ static CXLRetCode cmd_dcd_release_dyn_cap(const stru= ct cxl_cmd *cmd, return CXL_MBOX_SUCCESS; } =20 +/* CXL r3.2 section 7.6.7.6.1: Get DCD Info (Opcode 5600h) */ +static CXLRetCode cmd_fm_get_dcd_info(const struct cxl_cmd *cmd, + uint8_t *payload_in, + size_t len_in, + uint8_t *payload_out, + size_t *len_out, + CXLCCI *cci) +{ + struct { + uint8_t num_hosts; + uint8_t num_regions_supported; + uint8_t rsvd1[2]; + uint16_t supported_add_sel_policy_bitmask; + uint8_t rsvd2[2]; + uint16_t supported_removal_policy_bitmask; + uint8_t sanitize_on_release_bitmask; + uint8_t rsvd3; + uint64_t total_dynamic_capacity; + uint64_t region_blk_size_bitmasks[8]; + } QEMU_PACKED *out =3D (void *)payload_out; + CXLType3Dev *ct3d =3D CXL_TYPE3(cci->d); + CXLDCRegion *region; + int i; + + out->num_hosts =3D 1; + out->num_regions_supported =3D ct3d->dc.num_regions; + stw_le_p(&out->supported_add_sel_policy_bitmask, + BIT(CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE)); + stw_le_p(&out->supported_removal_policy_bitmask, + BIT(CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE)); + out->sanitize_on_release_bitmask =3D 0; + + stq_le_p(&out->total_dynamic_capacity, + ct3d->dc.total_capacity / CXL_CAPACITY_MULTIPLIER); + + for (i =3D 0; i < ct3d->dc.num_regions; i++) { + region =3D &ct3d->dc.regions[i]; + memcpy(&out->region_blk_size_bitmasks[i], + ®ion->supported_blk_size_bitmask, + sizeof(out->region_blk_size_bitmasks[i])); + } + + *len_out =3D sizeof(*out); + return CXL_MBOX_SUCCESS; +} + static const struct cxl_cmd cxl_cmd_set[256][256] =3D { [INFOSTAT][BACKGROUND_OPERATION_ABORT] =3D { "BACKGROUND_OPERATION_ABO= RT", cmd_infostat_bg_op_abort, 0, 0 }, @@ -3350,6 +3399,11 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256]= =3D { cmd_tunnel_management_cmd, ~0, 0 }, }; =20 +static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] =3D { + [FMAPI_DCD_MGMT][GET_DCD_INFO] =3D { "GET_DCD_INFO", + cmd_fm_get_dcd_info, 0, 0 }, +}; + /* * While the command is executing in the background, the device should * update the percentage complete in the Background Command Status Register @@ -3624,7 +3678,12 @@ void cxl_initialize_t3_fm_owned_ld_mctpcci(CXLCCI *c= ci, DeviceState *d, DeviceState *intf, size_t payload_max) { + CXLType3Dev *ct3d =3D CXL_TYPE3(d); + cxl_copy_cci_commands(cci, cxl_cmd_set_t3_fm_owned_ld_mctp); + if (ct3d->dc.num_regions) { + cxl_copy_cci_commands(cci, cxl_cmd_set_fm_dcd); + } cci->d =3D d; cci->intf =3D intf; cxl_init_cci(cci, payload_max); diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index f283178d88..d898cfd617 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -8,6 +8,7 @@ * * SPDX-License-Identifier: GPL-v2-only */ +#include =20 #include "qemu/osdep.h" #include "qemu/units.h" @@ -634,6 +635,8 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Er= ror **errp) uint64_t region_len; uint64_t decode_len; uint64_t blk_size =3D 2 * MiB; + /* Only 1 block size is supported for now. */ + uint64_t supported_blk_size_bitmask =3D blk_size; CXLDCRegion *region; MemoryRegion *mr; uint64_t dc_size; @@ -679,6 +682,7 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Er= ror **errp) .block_size =3D blk_size, /* dsmad_handle set when creating CDAT table entries */ .flags =3D 0, + .supported_blk_size_bitmask =3D supported_blk_size_bitmask, }; ct3d->dc.total_capacity +=3D region->len; region->blk_bitmap =3D bitmap_new(region->len / region->block_size= ); --=20 2.48.1