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Tue, 15 Jul 2025 01:49:07 +0800 (CST) Received: from frapeml500008.china.huawei.com (unknown [7.182.85.71]) by mail.maildlp.com (Postfix) with ESMTPS id EDA82140142; Tue, 15 Jul 2025 01:50:19 +0800 (CST) Received: from SecurePC-101-06.china.huawei.com (10.122.19.247) by frapeml500008.china.huawei.com (7.182.85.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Mon, 14 Jul 2025 19:50:19 +0200 To: , Michael Tsirkin , Fan Ni , Anisa Su , Anisa Su CC: , Subject: [PATCH qemu v2 10/11] hw/cxl: mailbox-utils: 0x5604 - FMAPI Initiate DC Add Date: Mon, 14 Jul 2025 18:45:06 +0100 Message-ID: <20250714174509.1984430-11-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250714174509.1984430-1-Jonathan.Cameron@huawei.com> References: <20250714174509.1984430-1-Jonathan.Cameron@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.122.19.247] X-ClientProxiedBy: lhrpeml100011.china.huawei.com (7.191.174.247) To frapeml500008.china.huawei.com (7.182.85.71) X-Host-Lookup-Failed: Reverse DNS lookup failed for 185.176.79.56 (deferred) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -33 X-Spam_score: -3.4 X-Spam_bar: --- X-Spam_report: (-3.4 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron From: Jonathan Cameron via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1752519903336116600 Content-Type: text/plain; charset="utf-8" From: Anisa Su FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.= 7.6.5 Reviewed-by: Fan Ni Signed-off-by: Anisa Su Signed-off-by: Jonathan Cameron --- include/hw/cxl/cxl_device.h | 4 ++ hw/cxl/cxl-mailbox-utils.c | 109 ++++++++++++++++++++++++++++++++++++ hw/mem/cxl_type3.c | 8 +-- 3 files changed, 117 insertions(+), 4 deletions(-) diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index 71a5834c3d..89411c8093 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -728,4 +728,8 @@ void cxl_create_dc_event_records_for_extents(CXLType3De= v *ct3d, CXLDCEventType type, CXLDCExtentRaw extents[], uint32_t ext_count); +bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list, + uint64_t dpa, uint64_t len); +bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list, + uint64_t dpa, uint64_t len); #endif diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index b6f30e8689..5d08525529 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -123,6 +123,7 @@ enum { #define GET_HOST_DC_REGION_CONFIG 0x1 #define SET_DC_REGION_CONFIG 0x2 #define GET_DC_REGION_EXTENT_LIST 0x3 + #define INITIATE_DC_ADD 0x4 }; =20 /* CCI Message Format CXL r3.1 Figure 7-19 */ @@ -3543,6 +3544,107 @@ static CXLRetCode cmd_fm_get_dc_region_extent_list(= const struct cxl_cmd *cmd, return CXL_MBOX_SUCCESS; } =20 +/* + * Helper function to convert CXLDCExtentRaw to CXLUpdateDCExtentListInPl + * in order to reuse cxl_detect_malformed_extent_list() function which acc= epts + * CXLUpdateDCExtentListInPl as a parameter. + */ +static void convert_raw_extents(CXLDCExtentRaw raw_extents[], + CXLUpdateDCExtentListInPl *extent_list, + int count) +{ + int i; + + extent_list->num_entries_updated =3D count; + + for (i =3D 0; i < count; i++) { + extent_list->updated_entries[i].start_dpa =3D raw_extents[i].start= _dpa; + extent_list->updated_entries[i].len =3D raw_extents[i].len; + } +} + +/* CXL r3.2 Section 7.6.7.6.5: Initiate Dynamic Capacity Add (Opcode 5604h= ) */ +static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd, + uint8_t *payload_in, + size_t len_in, + uint8_t *payload_out, + size_t *len_out, + CXLCCI *cci) +{ + struct { + uint16_t host_id; + uint8_t selection_policy; + uint8_t reg_num; + uint64_t length; + uint8_t tag[0x10]; + uint32_t ext_count; + CXLDCExtentRaw extents[]; + } QEMU_PACKED *in =3D (void *)payload_in; + CXLType3Dev *ct3d =3D CXL_TYPE3(cci->d); + int i, rc; + + switch (in->selection_policy) { + case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE: { + /* Adding extents exceeds device's extent tracking ability. */ + if (in->ext_count + ct3d->dc.total_extent_count > + CXL_NUM_EXTENTS_SUPPORTED) { + return CXL_MBOX_RESOURCES_EXHAUSTED; + } + + g_autofree CXLUpdateDCExtentListInPl *list =3D + g_malloc0(sizeof(*list) + + in->ext_count * sizeof(*list->updated_entries)); + + convert_raw_extents(in->extents, list, in->ext_count); + rc =3D cxl_detect_malformed_extent_list(ct3d, list); + + for (i =3D 0; i < in->ext_count; i++) { + CXLDCExtentRaw *ext =3D &in->extents[i]; + + /* Check requested extents do not overlap with pending one= s. */ + if (cxl_extent_groups_overlaps_dpa_range(&ct3d->dc.extents= _pending, + ext->start_dpa, + ext->len)) { + return CXL_MBOX_INVALID_EXTENT_LIST; + } + /* Check requested extents do not overlap with existing on= es. */ + if (cxl_extents_overlaps_dpa_range(&ct3d->dc.extents, + ext->start_dpa, + ext->len)) { + return CXL_MBOX_INVALID_EXTENT_LIST; + } + } + + if (rc) { + return rc; + } + + CXLDCExtentGroup *group =3D NULL; + for (i =3D 0; i < in->ext_count; i++) { + CXLDCExtentRaw *ext =3D &in->extents[i]; + + group =3D cxl_insert_extent_to_extent_group(group, ext->st= art_dpa, + ext->len, ext->t= ag, + ext->shared_seq); + } + + cxl_extent_group_list_insert_tail(&ct3d->dc.extents_pending, g= roup); + ct3d->dc.total_extent_count +=3D in->ext_count; + cxl_create_dc_event_records_for_extents(ct3d, + DC_EVENT_ADD_CAPACITY, + in->extents, + in->ext_count); + + return CXL_MBOX_SUCCESS; + } + default: { + qemu_log_mask(LOG_UNIMP, + "CXL extent selection policy not supported.\n"); + return CXL_MBOX_INVALID_INPUT; + } + } +} + static const struct cxl_cmd cxl_cmd_set[256][256] =3D { [INFOSTAT][BACKGROUND_OPERATION_ABORT] =3D { "BACKGROUND_OPERATION_ABO= RT", cmd_infostat_bg_op_abort, 0, 0 }, @@ -3670,6 +3772,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][= 256] =3D { CXL_MBOX_IMMEDIATE_DATA_CHANGE) }, [FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] =3D { "GET_DC_REGION_EXTEN= T_LIST", cmd_fm_get_dc_region_extent_list, 12, 0 }, + [FMAPI_DCD_MGMT][INITIATE_DC_ADD] =3D { "INIT_DC_ADD", + cmd_fm_initiate_dc_add, ~0, + (CXL_MBOX_CONFIG_CHANGE_COLD_RESET | + CXL_MBOX_CONFIG_CHANGE_CONV_RESET | + CXL_MBOX_CONFIG_CHANGE_CXL_RESET | + CXL_MBOX_IMMEDIATE_CONFIG_CHANGE | + CXL_MBOX_IMMEDIATE_DATA_CHANGE) }, }; =20 /* diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 4e975b1a42..be609ff9d0 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -1885,8 +1885,8 @@ void qmp_cxl_inject_memory_module_event(const char *p= ath, CxlEventLog log, * the list. * Return value: return true if has overlaps; otherwise, return false */ -static bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list, - uint64_t dpa, uint64_t len) +bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list, + uint64_t dpa, uint64_t len) { CXLDCExtent *ent; Range range1, range2; @@ -1931,8 +1931,8 @@ bool cxl_extents_contains_dpa_range(CXLDCExtentList *= list, return false; } =20 -static bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *lis= t, - uint64_t dpa, uint64_t le= n) +bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list, + uint64_t dpa, uint64_t len) { CXLDCExtentGroup *group; =20 --=20 2.48.1