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Mon, 14 Jul 2025 04:04:32 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEmxXO4/G4BUjMNpGvCBwoYe32V7chip4duu+HFBVzVwgbIm8LyAaG3gSLmRm6maIg0ch2rnw== X-Received: by 2002:adf:e18c:0:b0:3a5:2cb5:642f with SMTP id ffacd0b85a97d-3b5f18dc494mr11353809f8f.34.1752491072103; Mon, 14 Jul 2025 04:04:32 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 08/77] target/i386: nvmm, whpx: add accel/CPU class that sets host vendor Date: Mon, 14 Jul 2025 13:02:57 +0200 Message-ID: <20250714110406.117772-9-pbonzini@redhat.com> X-Mailer: git-send-email 2.50.0 In-Reply-To: <20250714110406.117772-1-pbonzini@redhat.com> References: <20250714110406.117772-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1752492050943116600 Content-Type: text/plain; charset="utf-8" NVMM and WHPX are virtualizers, and therefore they need to use (at least by default) the host vendor for the guest CPUID. Add a cpu_instance_init implementation to these accelerators. Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 3 ++- target/i386/nvmm/nvmm-all.c | 25 +++++++++++++++++++++++++ target/i386/whpx/whpx-all.c | 25 +++++++++++++++++++++++++ target/i386/meson.build | 2 ++ 4 files changed, 54 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 4d4e5234246..8fb74b56ddd 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -44,6 +44,7 @@ #include "hw/boards.h" #include "hw/i386/sgx-epc.h" #endif +#include "system/qtest.h" #include "tcg/tcg-cpu.h" =20 #include "disas/capstone.h" @@ -1943,7 +1944,7 @@ uint32_t xsave_area_size(uint64_t mask, bool compacte= d) =20 static inline bool accel_uses_host_cpuid(void) { - return kvm_enabled() || hvf_enabled(); + return !tcg_enabled() && !qtest_enabled(); } =20 static inline uint64_t x86_cpu_xsave_xcr0_components(X86CPU *cpu) diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c index b4a4d50e860..11c263004d5 100644 --- a/target/i386/nvmm/nvmm-all.c +++ b/target/i386/nvmm/nvmm-all.c @@ -19,6 +19,8 @@ #include "qemu/error-report.h" #include "qapi/error.h" #include "qemu/queue.h" +#include "accel/accel-cpu-target.h" +#include "host-cpu.h" #include "migration/blocker.h" #include "strings.h" =20 @@ -1207,10 +1209,33 @@ static const TypeInfo nvmm_accel_type =3D { .class_init =3D nvmm_accel_class_init, }; =20 +static void nvmm_cpu_instance_init(CPUState *cs) +{ + X86CPU *cpu =3D X86_CPU(cs); + + host_cpu_instance_init(cpu); +} + +static void nvmm_cpu_accel_class_init(ObjectClass *oc, const void *data) +{ + AccelCPUClass *acc =3D ACCEL_CPU_CLASS(oc); + + acc->cpu_instance_init =3D nvmm_cpu_instance_init; +} + +static const TypeInfo nvmm_cpu_accel_type =3D { + .name =3D ACCEL_CPU_NAME("nvmm"), + + .parent =3D TYPE_ACCEL_CPU, + .class_init =3D nvmm_cpu_accel_class_init, + .abstract =3D true, +}; + static void nvmm_type_init(void) { type_register_static(&nvmm_accel_type); + type_register_static(&nvmm_cpu_accel_type); } =20 type_init(nvmm_type_init); diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index faf56e19722..22ac609070d 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -26,6 +26,8 @@ #include "qapi/qapi-types-common.h" #include "qapi/qapi-visit-common.h" #include "migration/blocker.h" +#include "host-cpu.h" +#include "accel/accel-cpu-target.h" #include =20 #include "whpx-internal.h" @@ -2500,6 +2502,28 @@ static void whpx_set_kernel_irqchip(Object *obj, Vis= itor *v, } } =20 +static void whpx_cpu_instance_init(CPUState *cs) +{ + X86CPU *cpu =3D X86_CPU(cs); + + host_cpu_instance_init(cpu); +} + +static void whpx_cpu_accel_class_init(ObjectClass *oc, const void *data) +{ + AccelCPUClass *acc =3D ACCEL_CPU_CLASS(oc); + + acc->cpu_instance_init =3D whpx_cpu_instance_init; +} + +static const TypeInfo whpx_cpu_accel_type =3D { + .name =3D ACCEL_CPU_NAME("whpx"), + + .parent =3D TYPE_ACCEL_CPU, + .class_init =3D whpx_cpu_accel_class_init, + .abstract =3D true, +}; + /* * Partition support */ @@ -2726,6 +2750,7 @@ static const TypeInfo whpx_accel_type =3D { static void whpx_type_init(void) { type_register_static(&whpx_accel_type); + type_register_static(&whpx_cpu_accel_type); } =20 bool init_whp_dispatch(void) diff --git a/target/i386/meson.build b/target/i386/meson.build index c1aacea6135..092af34e2d8 100644 --- a/target/i386/meson.build +++ b/target/i386/meson.build @@ -11,6 +11,8 @@ i386_ss.add(when: 'CONFIG_SEV', if_true: files('host-cpu.= c', 'confidential-guest # x86 cpu type i386_ss.add(when: 'CONFIG_KVM', if_true: files('host-cpu.c')) i386_ss.add(when: 'CONFIG_HVF', if_true: files('host-cpu.c')) +i386_ss.add(when: 'CONFIG_WHPX', if_true: files('host-cpu.c')) +i386_ss.add(when: 'CONFIG_NVMM', if_true: files('host-cpu.c')) =20 i386_system_ss =3D ss.source_set() i386_system_ss.add(files( --=20 2.50.0