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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-454d50df0cdsm89734145e9.25.2025.07.11.06.34.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jul 2025 06:34:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1752240888; x=1752845688; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=Z/tqj/ko8WEeVpxtCck+nDGeWxY6ZT+VKsk2/PDMd8Q=; b=gMJl0g4Qa7wFlp20dwQzq6+oE37XbmPyuhMQJWBQ4T7T4o1KPg/guh8my4iSAEj4x3 3c1U9Tw2n/p2FBGu/VYsw3gHuGhR5WfNdyF8ougwriyOpLOKeRZwbJhIrm9BuR/qgh3L oADPqnH92aeL3v+hcmcFa219bmGbggu/7FiFtPUGbbVjl2H2W+qP5GvM9vb3fPbHh5xR ud+gosHISKxq5i/26TmlI1HSr8Veu+ojlBEL30FZgyVGwAgyyKW6aHNEJSlMQ0hHc0Ri tPWfIXR6qSYPzdTScrN0amYG6amppWcwcDM4JynhAqAh0hVT0ryO8XrxhNBIynEEwmVH pkPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1752240888; x=1752845688; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Z/tqj/ko8WEeVpxtCck+nDGeWxY6ZT+VKsk2/PDMd8Q=; b=ZK2qNzGcaFNNr28cdT+xiOOwdis1qoizje2Wb36i0E/tyqYSU0ASRTgIaQhzbrWj7+ 2kPgjdcFmpHNdnkrV461+I2mFIZz9/+axeykBhSdu/7wA4vyvhzXOoLktOwrASNryJwq /HdouDQbPBwu5MZ8HkUSmWz47gRsvHKHEKkKjDWZN3u0D+AlvbXXe33tAng+tKztIeWt 2bR7vgeF3xO75fiYT4vrBoHHdlA+/j033BN7MqCP2JpMCZ1UhjUwylUbeUS1Nk4wcmUj YQz9MdJzo71+WJN+n2Tvi8eP4WZSNp1QtWXGXKMIzTfv1IVOMINpr662tiUjMAUT2C1Q xHEg== X-Gm-Message-State: AOJu0Ywp4X+OVyz2qeyk+TTJaud04ssJNkvIGPxB2rLmf3jr6qMvzyrs 3OiP9Xjq8Hz4gGuMZ534YWuIrQFA7om3i5tdVS/XmpzU01HsvwZf7nKrk3q16qI7kNFx5T3lnj4 huwuW X-Gm-Gg: ASbGncsiGQZQsCU4Fnd6v+5HGjVin2R0pJEmK5q6qSvLVHrnDGP6gzn1ikSmxwv493r 2i+sk/IJeITEOltqHHKoiuFDdNFnKP7qc7SNrOBjb6QrIIBZvVHtB9yKP+7yNuOztJX3AEPye3B fWs0JYqiLGCvF5BAUcxMCuEhzggr53dwPJYDjbJBWLEhfl5KCqyRVDfLVXq71MN5U2AhaIKbm2m MI1aHD3DYe7ljASjOpI4W8qYo9B7g1ruF5KeKt/TUseObg6deWEq7N3G52DjKpvlKpaS98Xp+Oy av+4kQwzz2KjBEYkYlCgZH5DIRAMEwQbYqk5fjZPtyZkC2Ea52RF4JOfqubXMwIU3BKFHayyRoe NATjyZbQGTnmWBVijpOYkASss7iGW X-Google-Smtp-Source: AGHT+IH1VaYSUQnz3XrsTenMXkbJsXMHztbZz2iPD5JrG4OHiJBcycGhoVBo5LoYYWNg0aIop/4Wow== X-Received: by 2002:a05:600c:c11c:b0:453:66f:b96e with SMTP id 5b1f17b1804b1-454ec146a71mr22329455e9.11.1752240888576; Fri, 11 Jul 2025 06:34:48 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 16/36] qtest/cxl: Add aarch64 virt test for CXL Date: Fri, 11 Jul 2025 14:34:09 +0100 Message-ID: <20250711133429.1423030-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250711133429.1423030-1-peter.maydell@linaro.org> References: <20250711133429.1423030-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1752240993839116600 Content-Type: text/plain; charset="utf-8" From: Jonathan Cameron Add a single complex case for aarch64 virt machine. Given existing much more comprehensive tests for x86 cover the common functionality, a single test should be enough to verify that the aarch64 part continues to work. Tested-by: Itaru Kitayama Reviewed-by: Eric Auger Signed-off-by: Jonathan Cameron Tested-by: Li Zhijian Message-id: 20250703104110.992379-6-Jonathan.Cameron@huawei.com Signed-off-by: Peter Maydell --- tests/qtest/cxl-test.c | 58 ++++++++++++++++++++++++++++++++--------- tests/qtest/meson.build | 1 + 2 files changed, 46 insertions(+), 13 deletions(-) diff --git a/tests/qtest/cxl-test.c b/tests/qtest/cxl-test.c index a6003318439..8fb7e58d4f1 100644 --- a/tests/qtest/cxl-test.c +++ b/tests/qtest/cxl-test.c @@ -19,6 +19,12 @@ "-device pxb-cxl,id=3Dcxl.1,bus=3Dpcie.0,bus_nr=3D53 " \ "-M cxl-fmw.0.targets.0=3Dcxl.0,cxl-fmw.0.targets.1=3Dcxl.1,cxl-fmw.0.= size=3D4G " =20 +#define QEMU_VIRT_2PXB_CMD \ + "-machine virt,cxl=3Don -cpu max " \ + "-device pxb-cxl,id=3Dcxl.0,bus=3Dpcie.0,bus_nr=3D52 " \ + "-device pxb-cxl,id=3Dcxl.1,bus=3Dpcie.0,bus_nr=3D53 " \ + "-M cxl-fmw.0.targets.0=3Dcxl.0,cxl-fmw.0.targets.1=3Dcxl.1,cxl-fmw.0.= size=3D4G " + #define QEMU_RP \ "-device cxl-rp,id=3Drp0,bus=3Dcxl.0,chassis=3D0,slot=3D0 " =20 @@ -197,25 +203,51 @@ static void cxl_2pxb_4rp_4t3d(void) qtest_end(); rmdir(tmpfs); } + +static void cxl_virt_2pxb_4rp_4t3d(void) +{ + g_autoptr(GString) cmdline =3D g_string_new(NULL); + g_autofree const char *tmpfs =3D NULL; + + tmpfs =3D g_dir_make_tmp("cxl-test-XXXXXX", NULL); + + g_string_printf(cmdline, QEMU_VIRT_2PXB_CMD QEMU_4RP QEMU_4T3D, + tmpfs, tmpfs, tmpfs, tmpfs, tmpfs, tmpfs, + tmpfs, tmpfs); + + qtest_start(cmdline->str); + qtest_end(); + rmdir(tmpfs); +} #endif /* CONFIG_POSIX */ =20 int main(int argc, char **argv) { - g_test_init(&argc, &argv, NULL); + const char *arch =3D qtest_get_arch(); =20 - qtest_add_func("/pci/cxl/basic_hostbridge", cxl_basic_hb); - qtest_add_func("/pci/cxl/basic_pxb", cxl_basic_pxb); - qtest_add_func("/pci/cxl/pxb_with_window", cxl_pxb_with_window); - qtest_add_func("/pci/cxl/pxb_x2_with_window", cxl_2pxb_with_window); - qtest_add_func("/pci/cxl/rp", cxl_root_port); - qtest_add_func("/pci/cxl/rp_x2", cxl_2root_port); + g_test_init(&argc, &argv, NULL); + if (strcmp(arch, "i386") =3D=3D 0 || strcmp(arch, "x86_64") =3D=3D 0) { + qtest_add_func("/pci/cxl/basic_hostbridge", cxl_basic_hb); + qtest_add_func("/pci/cxl/basic_pxb", cxl_basic_pxb); + qtest_add_func("/pci/cxl/pxb_with_window", cxl_pxb_with_window); + qtest_add_func("/pci/cxl/pxb_x2_with_window", cxl_2pxb_with_window= ); + qtest_add_func("/pci/cxl/rp", cxl_root_port); + qtest_add_func("/pci/cxl/rp_x2", cxl_2root_port); #ifdef CONFIG_POSIX - qtest_add_func("/pci/cxl/type3_device", cxl_t3d_deprecated); - qtest_add_func("/pci/cxl/type3_device_pmem", cxl_t3d_persistent); - qtest_add_func("/pci/cxl/type3_device_vmem", cxl_t3d_volatile); - qtest_add_func("/pci/cxl/type3_device_vmem_lsa", cxl_t3d_volatile_lsa); - qtest_add_func("/pci/cxl/rp_x2_type3_x2", cxl_1pxb_2rp_2t3d); - qtest_add_func("/pci/cxl/pxb_x2_root_port_x4_type3_x4", cxl_2pxb_4rp_4= t3d); + qtest_add_func("/pci/cxl/type3_device", cxl_t3d_deprecated); + qtest_add_func("/pci/cxl/type3_device_pmem", cxl_t3d_persistent); + qtest_add_func("/pci/cxl/type3_device_vmem", cxl_t3d_volatile); + qtest_add_func("/pci/cxl/type3_device_vmem_lsa", cxl_t3d_volatile_= lsa); + qtest_add_func("/pci/cxl/rp_x2_type3_x2", cxl_1pxb_2rp_2t3d); + qtest_add_func("/pci/cxl/pxb_x2_root_port_x4_type3_x4", + cxl_2pxb_4rp_4t3d); #endif + } else if (strcmp(arch, "aarch64") =3D=3D 0) { +#ifdef CONFIG_POSIX + qtest_add_func("/pci/cxl/virt/pxb_x2_root_port_x4_type3_x4", + cxl_virt_2pxb_4rp_4t3d); +#endif + } + return g_test_run(); } diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 91b4a71a186..5ad969f6165 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -262,6 +262,7 @@ qtests_aarch64 =3D \ config_all_devices.has_key('CONFIG_TPM_TIS_I2C') ? ['tpm-tis-i2c-test']= : []) + \ (config_all_devices.has_key('CONFIG_ASPEED_SOC') ? qtests_aspeed64 : [])= + \ (config_all_devices.has_key('CONFIG_NPCM8XX') ? qtests_npcm8xx : []) + \ + qtests_cxl + = \ ['arm-cpu-features', 'numa-test', 'boot-serial-test', --=20 2.43.0