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Thu, 10 Jul 2025 17:06:16 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH+/T1OnB8IvOBYkpp76pElaF0Nz3/XEzCi3Q0BfqeJntjn+ksixk15n+UWeqJzBUAhHjIEtQ== X-Received: by 2002:a05:600c:4444:b0:453:6ca:16b1 with SMTP id 5b1f17b1804b1-454ec2726c9mr5489065e9.26.1752192375680; Thu, 10 Jul 2025 17:06:15 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: xiaoyao.li@intel.com, zhao1.liu@intel.com Subject: [PATCH 1/4] target/i386: move max_features to class Date: Fri, 11 Jul 2025 02:06:00 +0200 Message-ID: <20250711000603.438312-2-pbonzini@redhat.com> X-Mailer: git-send-email 2.50.0 In-Reply-To: <20250711000603.438312-1-pbonzini@redhat.com> References: <20250711000603.438312-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1752192435916116600 Content-Type: text/plain; charset="utf-8" max_features is always set to true for instances created by -cpu max or -cpu host; it's always false for other classes. Therefore it can be turned into a field in the X86CPUClass. Signed-off-by: Paolo Bonzini Reviewed-by: Xiaoyao Li Reviewed-by: Zhao Liu --- target/i386/cpu.h | 2 +- target/i386/cpu.c | 5 +++-- target/i386/hvf/hvf-cpu.c | 3 ++- target/i386/kvm/kvm-cpu.c | 5 +++-- 4 files changed, 9 insertions(+), 6 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 51e10139dfd..be3ae6d546e 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2196,7 +2196,6 @@ struct ArchCPU { bool expose_tcg; bool migratable; bool migrate_smi_count; - bool max_features; /* Enable all supported features automatically */ uint32_t apic_id; =20 /* Enables publishing of TSC increment and Local APIC bus frequencies = to @@ -2349,6 +2348,7 @@ struct X86CPUClass { */ const X86CPUModel *model; =20 + bool max_features; /* Enable all supported features automatically */ bool host_cpuid_required; int ordering; bool migration_safe; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 0d35e95430f..624cebc3ff7 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6187,6 +6187,7 @@ static void max_x86_cpu_class_init(ObjectClass *oc, c= onst void *data) =20 xcc->ordering =3D 9; =20 + xcc->max_features =3D true; xcc->model_description =3D "Enables all features supported by the accelerator in the current = host"; =20 @@ -6201,7 +6202,6 @@ static void max_x86_cpu_initfn(Object *obj) /* We can't fill the features array here because we don't know yet if * "migratable" is true or false. */ - cpu->max_features =3D true; object_property_set_bool(OBJECT(cpu), "pmu", true, &error_abort); =20 /* @@ -8282,6 +8282,7 @@ static void x86_cpu_enable_xsave_components(X86CPU *c= pu) */ void x86_cpu_expand_features(X86CPU *cpu, Error **errp) { + X86CPUClass *xcc =3D X86_CPU_GET_CLASS(cpu); CPUX86State *env =3D &cpu->env; FeatureWord w; int i; @@ -8306,7 +8307,7 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **err= p) * plus_features & minus_features to global properties * inside x86_cpu_parse_featurestr() too. */ - if (cpu->max_features) { + if (xcc->max_features) { for (w =3D 0; w < FEATURE_WORDS; w++) { /* Override only features that weren't set explicitly * by the user. diff --git a/target/i386/hvf/hvf-cpu.c b/target/i386/hvf/hvf-cpu.c index dfdda701268..2b991f2fc8e 100644 --- a/target/i386/hvf/hvf-cpu.c +++ b/target/i386/hvf/hvf-cpu.c @@ -61,13 +61,14 @@ static void hvf_cpu_xsave_init(void) static void hvf_cpu_instance_init(CPUState *cs) { X86CPU *cpu =3D X86_CPU(cs); + X86CPUClass *xcc =3D X86_CPU_GET_CLASS(cpu); =20 host_cpu_instance_init(cpu); =20 /* Special cases not set in the X86CPUDefinition structs: */ /* TODO: in-kernel irqchip for hvf */ =20 - if (cpu->max_features) { + if (xcc->max_features) { hvf_cpu_max_instance_init(cpu); } =20 diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index 16bde4de01e..0fb88a239d4 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -41,6 +41,7 @@ static void kvm_set_guest_phys_bits(CPUState *cs) static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) { X86CPU *cpu =3D X86_CPU(cs); + X86CPUClass *xcc =3D X86_CPU_GET_CLASS(cpu); CPUX86State *env =3D &cpu->env; bool ret; =20 @@ -63,7 +64,7 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) * check/update ucode_rev, phys_bits, guest_phys_bits, mwait * cpu_common_realizefn() (via xcc->parent_realize) */ - if (cpu->max_features) { + if (xcc->max_features) { if (enable_cpu_pm) { if (kvm_has_waitpkg()) { env->features[FEAT_7_0_ECX] |=3D CPUID_7_0_ECX_WAITPKG; @@ -216,7 +217,7 @@ static void kvm_cpu_instance_init(CPUState *cs) x86_cpu_apply_props(cpu, kvm_default_props); } =20 - if (cpu->max_features) { + if (xcc->max_features) { kvm_cpu_max_instance_init(cpu); } =20 --=20 2.50.0