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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-454cd7e2f5dsm16264625e9.6.2025.07.08.02.57.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 08 Jul 2025 02:57:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1752000792; x=1752605592; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vzMk4UkL9eAVR/vohhIY8W6V8rBUqTGnnCp6qj1rt4I=; b=WVwzVda+0O28zYWGIYe/tlWu3bAW5AWJrlG4JyJ2zpo2+fuIYE82mBy+rsb/isrBKg er0zMiDuS5V8p61LX95GY6N5sn11jvUXql8EqpPWwFBoZwPb5przyE3IkIK7U6RIJCkP DvRURcaw/ap9BiKDf/F8NYlS1i86JSZEjdNWMq66nej24IRr92V4wq+7hYQWeM6Sdp6Z otfuglvf4oC6KYrKDpJUDDjRU0VoGSMQdccXthlCjushMRbB2W5YvksdDDqA7KM+IFxm 2fKUS25XL4NJN4b9I+XIqG+2bIoFjrWWWjO5h410ovCbYMboZZH3pHZm0vGYvgz7U1PJ yOsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1752000792; x=1752605592; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vzMk4UkL9eAVR/vohhIY8W6V8rBUqTGnnCp6qj1rt4I=; b=QRj/Q+5zviEByERjTB1mC2hEHUjYCvKvkqJ1FNQuD0YnzNZeTBbSspnrrMvQbCF8Lc tjLk4tIaNURtnmFlgAFsIAbEqJjksCNvJ7u13zmcWIi0EbgujZoDaLW5/13p2zegFzfD uhnXoAjy20ziJt+KOCVnEAqQpnq43SfgHhdliQmVj/qsbZuiJSO8UE51NXjm4Uu10QxS dUtvkHSp107aY6C2DUAlK6Qn0swJX8tNiafIp7FQCnqfG8UPl6dEtPdIOj+ss819l766 Qg+GG7qQDoTpa0DTRgIuSRWDeXZGQKASQf8mUZf9ikdFuGnRwJa2Oh+EJkVt44ewCcJi hLWQ== X-Gm-Message-State: AOJu0Yysg0NUsS+BROEDQwm+nIxD6awvbHsmVtCAZUrcN8PDB8OnDOZw kaMYPnIVcFjhiX95roxNWOFvZvlXKjq+0BPC6e9CNdlOibNQIuCR8f4EsUs3iwuoH67wIp+VJL6 lBKmDuBA= X-Gm-Gg: ASbGncugTkFRNuEXsXyod7SlaltcspagiWyNBCp9ktBNWsMjt6yHN2muSrA8Oe5r80X JQUWxrylC7HhtGUjp6Yi/bD+FBhg5V1qsg9aRx62REU/hWjWKNnnJT9upOXOxKUBGFFuzb9dRcK CdxJaC5HEM2gcqH1feOHmlF4KiJ/sDrXiLIOHy5lLXhMuf6ShFkznRfyKy+oXZZ06D0tAE1l39o SkwdlhuVJIYPcqQ0NS/KNKgSJdLXphSnpYYuBM3+c8TDCT4j5BfX1DhZjwurEbyBvpLPEQb1u6G xAoJI2pTunIl4lWm7JUqJnt47RN3rRIJxSbqyYBKYh8jAljbulsFsZDXR8/c21dbFfDoNQz5cZh tNP0dJUDZ+H+LUtMw6hspRj0rKsbSzzlqIj66 X-Google-Smtp-Source: AGHT+IH9Eb2xgLOM5u41cB8jhtceXkQMJqP5FOYGPVh9MDn7UCU3+96j99E25Ti0s3sN3hniFvGY6A== X-Received: by 2002:a05:6000:2187:b0:3b3:a6c2:1a10 with SMTP id ffacd0b85a97d-3b5dde3f94fmr1899037f8f.12.1751968673235; Tue, 08 Jul 2025 02:57:53 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , David Hildenbrand , Ilya Leoshkevich , Richard Henderson , qemu-s390x@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 1/4] target/s390x: Remove unused s390_cpu_[un]halt() user stubs Date: Tue, 8 Jul 2025 11:57:43 +0200 Message-ID: <20250708095746.12697-2-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250708095746.12697-1-philmd@linaro.org> References: <20250708095746.12697-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1752007487602116600 Since commit da944885469 ("target/s390x: make helper.c sysemu-only") target/s390x/helper.c is only built for system mode, so s390_cpu_halt() and s390_cpu_unhalt() are never called from user mode. Fixes: da944885469 ("target/s390x: make helper.c sysemu-only") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: David Hildenbrand Reviewed-by: Thomas Huth --- target/s390x/s390x-internal.h | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index a4ba6227ab4..6894f0a2569 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -246,16 +246,6 @@ void s390_cpu_finalize(Object *obj); void s390_cpu_system_class_init(CPUClass *cc); void s390_cpu_machine_reset_cb(void *opaque); bool s390_cpu_has_work(CPUState *cs); - -#else -static inline unsigned int s390_cpu_halt(S390CPU *cpu) -{ - return 0; -} - -static inline void s390_cpu_unhalt(S390CPU *cpu) -{ -} #endif /* CONFIG_USER_ONLY */ =20 =20 --=20 2.49.0 From nobody Sat Nov 15 12:14:53 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1752009870; cv=none; d=zohomail.com; s=zohoarc; b=fHwHGqu0cdw92Pb51jBNp3jhOWwjl42yA9eQLbLH6bR0/E+WN/iyMgdSVLjFVY6SWPGoOvRN37QgNXCFimF27EK90BFEK6Ptd8SjtErXMiK31yqImsAN6yrOtiNzPCWKNDi2Y1iQWYqMJKqzGP1RSeOtQLvsnCNUB2BJ7l22ZcU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1752009870; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=LWuEN0hS2XdfQkxKVaw5JgDv90FSfB0Ty4N9QjBE+jg=; b=mPnH+iZjmcnmAz850exqck64gpwdpvKlZLU6ta+IOPeCwjF5jNcahy+HvpdPNfkCCtF8pxG0kFmpXacTjvoW71JXKEEAc4u44GZ+yxxS5EVx+r0bh3NuIjRooiiHdI+yl28aAAbjoBCtoY0eJLGDzIzD/zPStUDokXMVf+BCSgM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1752009870398297.44850401416704; Tue, 8 Jul 2025 14:24:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uZFF4-0000ud-92; Tue, 08 Jul 2025 16:48:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uZE1P-0002Ae-T9 for qemu-devel@nongnu.org; Tue, 08 Jul 2025 15:30:42 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1uZE1L-0003Bu-II for qemu-devel@nongnu.org; Tue, 08 Jul 2025 15:30:30 -0400 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-3b45edf2303so4517602f8f.2 for ; Tue, 08 Jul 2025 12:30:25 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: David Hildenbrand Reviewed-by: Thomas Huth --- target/s390x/s390x-internal.h | 1 + target/s390x/cpu-system.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index 6894f0a2569..145e472edf0 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -238,6 +238,7 @@ uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, ui= nt64_t src, uint64_t dst, =20 /* cpu.c */ #ifndef CONFIG_USER_ONLY +unsigned int s390_count_running_cpus(void); unsigned int s390_cpu_halt(S390CPU *cpu); void s390_cpu_unhalt(S390CPU *cpu); void s390_cpu_system_init(Object *obj); diff --git a/target/s390x/cpu-system.c b/target/s390x/cpu-system.c index 9b380e343c2..2fa8c4d75db 100644 --- a/target/s390x/cpu-system.c +++ b/target/s390x/cpu-system.c @@ -196,7 +196,7 @@ static bool disabled_wait(CPUState *cpu) (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK)= ); } =20 -static unsigned s390_count_running_cpus(void) +unsigned s390_count_running_cpus(void) { CPUState *cpu; int nr_running =3D 0; --=20 2.49.0 From nobody Sat Nov 15 12:14:53 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1752009694; cv=none; d=zohomail.com; s=zohoarc; b=LUf8e26pDOz+NZ3zqEGpRXy+lMyDDOmG6akzQU71FlPtH9JNZkyupZ/2ZXhVkODuQ4jnhLG8nWpVXEXJcJuSJCJGHKS++p1+ZsoQELrswf5S0tXH+ch6f6N8UISRIxyxbaOsfKvEWqphO3IK0tLqXH09ZB1RARk9yhT9yduS2L4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1752009694; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ycwknzCngZdet5bhLiVa2iCoPjVKd86Y64oKSJ8ora0=; b=VQSyI5Y9DGO7Ws8aLJ+06jG65y3VxOoNKVrT2tKwBuG3bIsHYWSVavBm4/hBh66oD4S9Zp6zo0853Wwp31e0qR3hb6dxbeFo2ixx98Uagr0ixjM3EXM63oY17UvlO8SYXP1t+jMKDuBTRbPT9Qdb7rlcLsM96AErKSoMMhwkYNY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1752009694788510.47868409928776; Tue, 8 Jul 2025 14:21:34 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uZFK7-0002df-C0; Tue, 08 Jul 2025 16:53:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uZEJb-0000oy-Jj for qemu-devel@nongnu.org; Tue, 08 Jul 2025 15:49:21 -0400 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1uZEJY-0007e2-8a for qemu-devel@nongnu.org; Tue, 08 Jul 2025 15:49:18 -0400 Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-3a57c8e247cso3608178f8f.1 for ; Tue, 08 Jul 2025 12:49:14 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-454cd38eef3sm17502655e9.2.2025.07.08.02.58.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 08 Jul 2025 02:58:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1752004153; x=1752608953; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ycwknzCngZdet5bhLiVa2iCoPjVKd86Y64oKSJ8ora0=; b=EjsdhzBH6qiQCPf4ILRISiJR5lPSbyxPGNaVFPLhv+xLpbCWxap8APmDOaiBFrZ/RJ Sw/Ae4eKYqbn0HbZtt1gnRR6uaOiteG/0IFhu1GS233aNztFBdr9KkEWde250ew+/L17 Rx9WCpZav6w2mvif0kuXAVAeGL92h0be8n3gNVgrYrQX24Em+6nZdAxDqwHEzFQrdS+B 829Tymv9L/I2SwulPvteBKPKolHTyQqQsXgSXGHWc1kPLyhXGcD/BP25bdk/NyYnVa30 OoOWRJZQyEmdoCPFr77la0YqnXHkPfebnfP65/uDTMr8pI4G2yZtmlcjgHuWtIa0JMMe DDVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1752004153; x=1752608953; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ycwknzCngZdet5bhLiVa2iCoPjVKd86Y64oKSJ8ora0=; b=DGTm9W/u2/cKdNBuq43dH9780+45ZDI4vv5iwrYWLmDLmRaUi6SalLImeO78yxcben tYJOctuNXKlol1EwdcPnYNf51OeFYLJXSsm/xCanqrcvlaCrddIi2gcrt6ahICaMJ+m/ 2zapi/hkJIUUmLCBLsyL+GJslB2ZQCHUJTSGDkEVj3sDaKlCjFSRgC/QAD/J8PYu29jI O5C2TbvoOFDqDOekGRFkaAFeVqglO/uXcPr8HuVKkijnPotxUSIA+LxNSQVy0J3WNbyD PnCyM/8cw2Hx7CH17NgN1FdF3BMLHR9pLLwNafcIX2qJb8HRVVQbmd6I8i64KxdvPi0E jbsg== X-Gm-Message-State: AOJu0YyAffWugPc6rHovmYSeowV6NhFu+0tvT9HMYo4AkcgFxHQT1xcJ 2mmMwtCfG7HcG565RpDNIQk4LpgqNpTDGNk4Fu9fRjz+A0S5d6Liu8Jol/vsTVK4P0qiVgy/pwu SJkF33Zk= X-Gm-Gg: ASbGncux3UzbIJqxSKAIJ2o9TlGLHOl9uioY0lLPYoUPglN2aD/sgyWgxfHxMS147wG 1gR7NFkfeZqkoiTc1smZuALKBMwgW9spwCGlHH459zqgRzBhu0HuRPSrBq1X4BYKjG+j4US8+ST rAriPK/FW3fQ9AvkH1DcCEF+yuz0GetVlauBBjDiKion7brvexVhyMl1yejoxKa9QXVetOTvJJ6 4ZJ8po0/0A8FxWqfujuQz8DYNKKZVBzyjPbWg4kaoFqrTTwdhec6878gY93MbnRbBRI7xVqjBBs xJVJnR9dOshoNE2lzZ2L9jIv5oZQySVt3L1ZWbDFXl2tEg6rXwKdJwlTgp06T2EfizcqPrPZ8KE vOu1xW/FhVWtSomO4/2npX9VRpsqjVy+2n/GA X-Google-Smtp-Source: AGHT+IEPDjL2hmy7kOoBvtLFEqJEwL31ue01+/iFCZqr/1aIiZstTgRh9S43FxBZoXmNZSFZ+V6Leg== X-Received: by 2002:a05:600c:540f:b0:441:b076:fce8 with SMTP id 5b1f17b1804b1-454b4e85deemr154571915e9.14.1751968682660; Tue, 08 Jul 2025 02:58:02 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , David Hildenbrand , Ilya Leoshkevich , Richard Henderson , qemu-s390x@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 3/4] target/s390x: Have s390_cpu_halt() not return anything Date: Tue, 8 Jul 2025 11:57:45 +0200 Message-ID: <20250708095746.12697-4-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250708095746.12697-1-philmd@linaro.org> References: <20250708095746.12697-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1752009697069116600 Since halting a vCPU and how many left running do not need to be tied together, split the s390_count_running_cpus() call out of s390_cpu_halt() to the single caller using it: s390_handle_wait(). Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: David Hildenbrand Reviewed-by: Thomas Huth --- target/s390x/s390x-internal.h | 2 +- target/s390x/cpu-system.c | 4 +--- target/s390x/helper.c | 4 +++- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index 145e472edf0..56cce2e7f50 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -239,7 +239,7 @@ uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, ui= nt64_t src, uint64_t dst, /* cpu.c */ #ifndef CONFIG_USER_ONLY unsigned int s390_count_running_cpus(void); -unsigned int s390_cpu_halt(S390CPU *cpu); +void s390_cpu_halt(S390CPU *cpu); void s390_cpu_unhalt(S390CPU *cpu); void s390_cpu_system_init(Object *obj); bool s390_cpu_system_realize(DeviceState *dev, Error **errp); diff --git a/target/s390x/cpu-system.c b/target/s390x/cpu-system.c index 2fa8c4d75db..709ccd52992 100644 --- a/target/s390x/cpu-system.c +++ b/target/s390x/cpu-system.c @@ -214,7 +214,7 @@ unsigned s390_count_running_cpus(void) return nr_running; } =20 -unsigned int s390_cpu_halt(S390CPU *cpu) +void s390_cpu_halt(S390CPU *cpu) { CPUState *cs =3D CPU(cpu); trace_cpu_halt(cs->cpu_index); @@ -223,8 +223,6 @@ unsigned int s390_cpu_halt(S390CPU *cpu) cs->halted =3D 1; cs->exception_index =3D EXCP_HLT; } - - return s390_count_running_cpus(); } =20 void s390_cpu_unhalt(S390CPU *cpu) diff --git a/target/s390x/helper.c b/target/s390x/helper.c index 3c57c32e479..5c127da1a6a 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -91,7 +91,9 @@ void s390_handle_wait(S390CPU *cpu) { CPUState *cs =3D CPU(cpu); =20 - if (s390_cpu_halt(cpu) =3D=3D 0) { + s390_cpu_halt(cpu); + + if (s390_count_running_cpus() =3D=3D 0) { if (is_special_wait_psw(cpu->env.psw.addr)) { qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); } else { --=20 2.49.0 From nobody Sat Nov 15 12:14:53 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1752007805; cv=none; d=zohomail.com; s=zohoarc; b=gmFOfIcr2yRkgoFqs0tN5AbXpZvYsxo/vIGK+hiPO4AA3qspu6bLWmTAQ9v55vSGR5auOJy8NrPJqFltXL+sp7xyDDrOECjVXcCLJKKgKjqRMfp3kl5M/g4+RUmRgGa23H6FTuhyZ12rQOYMfqCCXrQ5AIhBlFS7zfjAMUDCtNg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1752007805; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=0gtjLUYRZC3tiIyt5N+e81IMf+FihJ1F/GhQqo/oKqE=; b=EyDDcSHUQL5y2QnHZjAC5e4tisfq3tgDP48wnYHtKgvhsqqGPLda90Qy4RE9D2h0weJDUcphuNbiH6TNxff2umDDjJMzA985X+Frk1zkL4KIrdCYDKHYxxAMK5T1WbnbDI7o6rUDRKirN7DrpFeYLde+cvfmWDTNaOwsT6CBYNw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17520078053371002.8802677863107; Tue, 8 Jul 2025 13:50:05 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uZFAk-00041P-2x; Tue, 08 Jul 2025 16:44:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uZDmy-0003zz-Jq for qemu-devel@nongnu.org; Tue, 08 Jul 2025 15:15:40 -0400 Received: from mail-ej1-x629.google.com ([2a00:1450:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1uZDmq-00075R-Hz for qemu-devel@nongnu.org; Tue, 08 Jul 2025 15:15:35 -0400 Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-ae361e8ec32so947455666b.3 for ; Tue, 08 Jul 2025 12:15:27 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: David Hildenbrand --- target/s390x/s390x-internal.h | 222 +--------------------------------- target/s390x/s390x-system.h | 215 ++++++++++++++++++++++++++++++++ 2 files changed, 217 insertions(+), 220 deletions(-) create mode 100644 target/s390x/s390x-system.h diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index 56cce2e7f50..dddd4460400 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -14,89 +14,8 @@ #include "fpu/softfloat.h" =20 #ifndef CONFIG_USER_ONLY -typedef struct LowCore { - /* prefix area: defined by architecture */ - uint32_t ccw1[2]; /* 0x000 */ - uint32_t ccw2[4]; /* 0x008 */ - uint8_t pad1[0x80 - 0x18]; /* 0x018 */ - uint32_t ext_params; /* 0x080 */ - uint16_t cpu_addr; /* 0x084 */ - uint16_t ext_int_code; /* 0x086 */ - uint16_t svc_ilen; /* 0x088 */ - uint16_t svc_code; /* 0x08a */ - uint16_t pgm_ilen; /* 0x08c */ - uint16_t pgm_code; /* 0x08e */ - uint32_t data_exc_code; /* 0x090 */ - uint16_t mon_class_num; /* 0x094 */ - uint16_t per_perc_atmid; /* 0x096 */ - uint64_t per_address; /* 0x098 */ - uint8_t exc_access_id; /* 0x0a0 */ - uint8_t per_access_id; /* 0x0a1 */ - uint8_t op_access_id; /* 0x0a2 */ - uint8_t ar_access_id; /* 0x0a3 */ - uint8_t pad2[0xA8 - 0xA4]; /* 0x0a4 */ - uint64_t trans_exc_code; /* 0x0a8 */ - uint64_t monitor_code; /* 0x0b0 */ - uint16_t subchannel_id; /* 0x0b8 */ - uint16_t subchannel_nr; /* 0x0ba */ - uint32_t io_int_parm; /* 0x0bc */ - uint32_t io_int_word; /* 0x0c0 */ - uint8_t pad3[0xc8 - 0xc4]; /* 0x0c4 */ - uint32_t stfl_fac_list; /* 0x0c8 */ - uint8_t pad4[0xe8 - 0xcc]; /* 0x0cc */ - uint64_t mcic; /* 0x0e8 */ - uint8_t pad5[0xf4 - 0xf0]; /* 0x0f0 */ - uint32_t external_damage_code; /* 0x0f4 */ - uint64_t failing_storage_address; /* 0x0f8 */ - uint8_t pad6[0x110 - 0x100]; /* 0x100 */ - uint64_t per_breaking_event_addr; /* 0x110 */ - uint8_t pad7[0x120 - 0x118]; /* 0x118 */ - PSW restart_old_psw; /* 0x120 */ - PSW external_old_psw; /* 0x130 */ - PSW svc_old_psw; /* 0x140 */ - PSW program_old_psw; /* 0x150 */ - PSW mcck_old_psw; /* 0x160 */ - PSW io_old_psw; /* 0x170 */ - uint8_t pad8[0x1a0 - 0x180]; /* 0x180 */ - PSW restart_new_psw; /* 0x1a0 */ - PSW external_new_psw; /* 0x1b0 */ - PSW svc_new_psw; /* 0x1c0 */ - PSW program_new_psw; /* 0x1d0 */ - PSW mcck_new_psw; /* 0x1e0 */ - PSW io_new_psw; /* 0x1f0 */ - uint8_t pad13[0x11b0 - 0x200]; /* 0x200 */ - - uint64_t mcesad; /* 0x11B0 */ - - /* 64 bit extparam used for pfault, diag 250 etc */ - uint64_t ext_params2; /* 0x11B8 */ - - uint8_t pad14[0x1200 - 0x11C0]; /* 0x11C0 */ - - /* System info area */ - - uint64_t floating_pt_save_area[16]; /* 0x1200 */ - uint64_t gpregs_save_area[16]; /* 0x1280 */ - uint32_t st_status_fixed_logout[4]; /* 0x1300 */ - uint8_t pad15[0x1318 - 0x1310]; /* 0x1310 */ - uint32_t prefixreg_save_area; /* 0x1318 */ - uint32_t fpt_creg_save_area; /* 0x131c */ - uint8_t pad16[0x1324 - 0x1320]; /* 0x1320 */ - uint32_t tod_progreg_save_area; /* 0x1324 */ - uint64_t cpu_timer_save_area; /* 0x1328 */ - uint64_t clock_comp_save_area; /* 0x1330 */ - uint8_t pad17[0x1340 - 0x1338]; /* 0x1338 */ - uint32_t access_regs_save_area[16]; /* 0x1340 */ - uint64_t cregs_save_area[16]; /* 0x1380 */ - - /* align to the top of the prefix area */ - - uint8_t pad18[0x2000 - 0x1400]; /* 0x1400 */ -} QEMU_PACKED LowCore; -QEMU_BUILD_BUG_ON(sizeof(LowCore) !=3D 8192); -#endif /* CONFIG_USER_ONLY */ - -#define MAX_ILEN 6 +#include "s390x-system.h" +#endif =20 /* While the PoO talks about ILC (a number between 1-3) what is actually stored in LowCore is shifted left one bit (an even between 2-6). As @@ -116,18 +35,6 @@ static inline int get_ilen(uint8_t opc) } } =20 -/* Compute the ATMID field that is stored in the per_perc_atmid lowcore - entry when a PER exception is triggered. */ -static inline uint8_t get_per_atmid(CPUS390XState *env) -{ - return ((env->psw.mask & PSW_MASK_64) ? (1 << 7) : 0) | - (1 << 6) | - ((env->psw.mask & PSW_MASK_32) ? (1 << 5) : 0) | - ((env->psw.mask & PSW_MASK_DAT) ? (1 << 4) : 0) | - ((env->psw.mask & PSW_ASC_SECONDARY) ? (1 << 3) : 0) | - ((env->psw.mask & PSW_ASC_ACCREG) ? (1 << 2) : 0); -} - static inline uint64_t wrap_address(CPUS390XState *env, uint64_t a) { if (!(env->psw.mask & PSW_MASK_64)) { @@ -201,55 +108,11 @@ enum cc_op { CC_OP_MAX }; =20 -#ifndef CONFIG_USER_ONLY - -static inline hwaddr decode_basedisp_s(CPUS390XState *env, uint32_t ipb, - uint8_t *ar) -{ - hwaddr addr =3D 0; - uint8_t reg; - - reg =3D ipb >> 28; - if (reg > 0) { - addr =3D env->regs[reg]; - } - addr +=3D (ipb >> 16) & 0xfff; - if (ar) { - *ar =3D reg; - } - - return addr; -} - -/* Base/displacement are at the same locations. */ -#define decode_basedisp_rs decode_basedisp_s - -#endif /* CONFIG_USER_ONLY */ - -/* arch_dump.c */ -int s390_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, - int cpuid, DumpState *s); - - /* cc_helper.c */ const char *cc_name(enum cc_op cc_op); uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, uint64_t src, uint64_= t dst, uint64_t vr); =20 -/* cpu.c */ -#ifndef CONFIG_USER_ONLY -unsigned int s390_count_running_cpus(void); -void s390_cpu_halt(S390CPU *cpu); -void s390_cpu_unhalt(S390CPU *cpu); -void s390_cpu_system_init(Object *obj); -bool s390_cpu_system_realize(DeviceState *dev, Error **errp); -void s390_cpu_finalize(Object *obj); -void s390_cpu_system_class_init(CPUClass *cc); -void s390_cpu_machine_reset_cb(void *opaque); -bool s390_cpu_has_work(CPUState *cs); -#endif /* CONFIG_USER_ONLY */ - - /* cpu_models.c */ void s390_cpu_model_class_register_props(ObjectClass *oc); void s390_realize_cpu_model(CPUState *cs, Error **errp); @@ -257,11 +120,7 @@ S390CPUModel *get_max_cpu_model(Error **errp); void apply_cpu_model(const S390CPUModel *model, Error **errp); ObjectClass *s390_cpu_class_by_name(const char *name); =20 - -/* excp_helper.c */ -void s390x_cpu_debug_excp_handler(CPUState *cs); void s390_cpu_do_interrupt(CPUState *cpu); -bool s390_cpu_exec_interrupt(CPUState *cpu, int int_req); =20 #ifdef CONFIG_USER_ONLY void s390_cpu_record_sigsegv(CPUState *cs, vaddr address, @@ -312,87 +171,14 @@ int s390_cpu_gdb_read_register(CPUState *cpu, GByteAr= ray *buf, int reg); int s390_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void s390_cpu_gdb_init(CPUState *cs); =20 - -/* helper.c */ void s390_cpu_dump_state(CPUState *cpu, FILE *f, int flags); -void do_restart_interrupt(CPUS390XState *env); -#ifndef CONFIG_USER_ONLY -void s390_cpu_recompute_watchpoints(CPUState *cs); -void s390x_tod_timer(void *opaque); -void s390x_cpu_timer(void *opaque); -void s390_handle_wait(S390CPU *cpu); -hwaddr s390_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); -hwaddr s390_cpu_get_phys_addr_debug(CPUState *cpu, vaddr addr); -#define S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) -int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch); -int s390_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len); -LowCore *cpu_map_lowcore(CPUS390XState *env); -void cpu_unmap_lowcore(LowCore *lowcore); -#endif /* CONFIG_USER_ONLY */ - =20 /* interrupt.c */ void trigger_pgm_exception(CPUS390XState *env, uint32_t code); -#ifndef CONFIG_USER_ONLY -void cpu_inject_clock_comparator(S390CPU *cpu); -void cpu_inject_cpu_timer(S390CPU *cpu); -void cpu_inject_emergency_signal(S390CPU *cpu, uint16_t src_cpu_addr); -int cpu_inject_external_call(S390CPU *cpu, uint16_t src_cpu_addr); -bool s390_cpu_has_io_int(S390CPU *cpu); -bool s390_cpu_has_ext_int(S390CPU *cpu); -bool s390_cpu_has_mcck_int(S390CPU *cpu); -bool s390_cpu_has_int(S390CPU *cpu); -bool s390_cpu_has_restart_int(S390CPU *cpu); -bool s390_cpu_has_stop_int(S390CPU *cpu); -void cpu_inject_restart(S390CPU *cpu); -void cpu_inject_stop(S390CPU *cpu); -#endif /* CONFIG_USER_ONLY */ =20 - -/* ioinst.c */ -#ifndef CONFIG_USER_ONLY -void ioinst_handle_xsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra); -void ioinst_handle_csch(S390CPU *cpu, uint64_t reg1, uintptr_t ra); -void ioinst_handle_hsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra); -void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, - uintptr_t ra); -void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, - uintptr_t ra); -void ioinst_handle_stcrw(S390CPU *cpu, uint32_t ipb, uintptr_t ra); -void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, - uintptr_t ra); -int ioinst_handle_tsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_= t ra); -void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb, uintptr_t ra); -void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2, - uint32_t ipb, uintptr_t ra); -void ioinst_handle_rsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra); -void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, uintptr_t ra); -void ioinst_handle_sal(S390CPU *cpu, uint64_t reg1, uintptr_t ra); -#endif /* CONFIG_USER_ONLY */ - - -/* mem_helper.c */ -target_ulong mmu_real2abs(CPUS390XState *env, target_ulong raddr); void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len, uintptr_t ra); =20 - -/* mmu_helper.c */ -bool mmu_absolute_addr_valid(target_ulong addr, bool is_write); -/* Special access mode only valid for mmu_translate() */ -#define MMU_S390_LRA -1 -int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t= asc, - target_ulong *raddr, int *flags, uint64_t *tec); -int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags, uint64_t *tec); - - -/* misc_helper.c */ -int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3); -void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, - uintptr_t ra); - - /* translate.c */ void s390x_translate_init(void); void s390x_translate_code(CPUState *cs, TranslationBlock *tb, @@ -401,8 +187,4 @@ void s390x_restore_state_to_opc(CPUState *cs, const TranslationBlock *tb, const uint64_t *data); =20 -/* sigp.c */ -int handle_sigp(CPUS390XState *env, uint8_t order, uint64_t r1, uint64_t r= 3); -void do_stop_interrupt(CPUS390XState *env); - #endif /* S390X_INTERNAL_H */ diff --git a/target/s390x/s390x-system.h b/target/s390x/s390x-system.h new file mode 100644 index 00000000000..9c7958742d3 --- /dev/null +++ b/target/s390x/s390x-system.h @@ -0,0 +1,215 @@ +/* + * s390x system internal definitions and helpers + * + * Copyright (c) 2009 Ulrich Hecht + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#ifndef S390X_SYSTEM_H +#define S390X_SYSTEM_H + +typedef struct LowCore { + /* prefix area: defined by architecture */ + uint32_t ccw1[2]; /* 0x000 */ + uint32_t ccw2[4]; /* 0x008 */ + uint8_t pad1[0x80 - 0x18]; /* 0x018 */ + uint32_t ext_params; /* 0x080 */ + uint16_t cpu_addr; /* 0x084 */ + uint16_t ext_int_code; /* 0x086 */ + uint16_t svc_ilen; /* 0x088 */ + uint16_t svc_code; /* 0x08a */ + uint16_t pgm_ilen; /* 0x08c */ + uint16_t pgm_code; /* 0x08e */ + uint32_t data_exc_code; /* 0x090 */ + uint16_t mon_class_num; /* 0x094 */ + uint16_t per_perc_atmid; /* 0x096 */ + uint64_t per_address; /* 0x098 */ + uint8_t exc_access_id; /* 0x0a0 */ + uint8_t per_access_id; /* 0x0a1 */ + uint8_t op_access_id; /* 0x0a2 */ + uint8_t ar_access_id; /* 0x0a3 */ + uint8_t pad2[0xA8 - 0xA4]; /* 0x0a4 */ + uint64_t trans_exc_code; /* 0x0a8 */ + uint64_t monitor_code; /* 0x0b0 */ + uint16_t subchannel_id; /* 0x0b8 */ + uint16_t subchannel_nr; /* 0x0ba */ + uint32_t io_int_parm; /* 0x0bc */ + uint32_t io_int_word; /* 0x0c0 */ + uint8_t pad3[0xc8 - 0xc4]; /* 0x0c4 */ + uint32_t stfl_fac_list; /* 0x0c8 */ + uint8_t pad4[0xe8 - 0xcc]; /* 0x0cc */ + uint64_t mcic; /* 0x0e8 */ + uint8_t pad5[0xf4 - 0xf0]; /* 0x0f0 */ + uint32_t external_damage_code; /* 0x0f4 */ + uint64_t failing_storage_address; /* 0x0f8 */ + uint8_t pad6[0x110 - 0x100]; /* 0x100 */ + uint64_t per_breaking_event_addr; /* 0x110 */ + uint8_t pad7[0x120 - 0x118]; /* 0x118 */ + PSW restart_old_psw; /* 0x120 */ + PSW external_old_psw; /* 0x130 */ + PSW svc_old_psw; /* 0x140 */ + PSW program_old_psw; /* 0x150 */ + PSW mcck_old_psw; /* 0x160 */ + PSW io_old_psw; /* 0x170 */ + uint8_t pad8[0x1a0 - 0x180]; /* 0x180 */ + PSW restart_new_psw; /* 0x1a0 */ + PSW external_new_psw; /* 0x1b0 */ + PSW svc_new_psw; /* 0x1c0 */ + PSW program_new_psw; /* 0x1d0 */ + PSW mcck_new_psw; /* 0x1e0 */ + PSW io_new_psw; /* 0x1f0 */ + uint8_t pad13[0x11b0 - 0x200]; /* 0x200 */ + + uint64_t mcesad; /* 0x11B0 */ + + /* 64 bit extparam used for pfault, diag 250 etc */ + uint64_t ext_params2; /* 0x11B8 */ + + uint8_t pad14[0x1200 - 0x11C0]; /* 0x11C0 */ + + /* System info area */ + + uint64_t floating_pt_save_area[16]; /* 0x1200 */ + uint64_t gpregs_save_area[16]; /* 0x1280 */ + uint32_t st_status_fixed_logout[4]; /* 0x1300 */ + uint8_t pad15[0x1318 - 0x1310]; /* 0x1310 */ + uint32_t prefixreg_save_area; /* 0x1318 */ + uint32_t fpt_creg_save_area; /* 0x131c */ + uint8_t pad16[0x1324 - 0x1320]; /* 0x1320 */ + uint32_t tod_progreg_save_area; /* 0x1324 */ + uint64_t cpu_timer_save_area; /* 0x1328 */ + uint64_t clock_comp_save_area; /* 0x1330 */ + uint8_t pad17[0x1340 - 0x1338]; /* 0x1338 */ + uint32_t access_regs_save_area[16]; /* 0x1340 */ + uint64_t cregs_save_area[16]; /* 0x1380 */ + + /* align to the top of the prefix area */ + + uint8_t pad18[0x2000 - 0x1400]; /* 0x1400 */ +} QEMU_PACKED LowCore; +QEMU_BUILD_BUG_ON(sizeof(LowCore) !=3D 8192); + +#define MAX_ILEN 6 + +/* Compute the ATMID field that is stored in the per_perc_atmid lowcore + entry when a PER exception is triggered. */ +static inline uint8_t get_per_atmid(CPUS390XState *env) +{ + return ((env->psw.mask & PSW_MASK_64) ? (1 << 7) : 0) | + (1 << 6) | + ((env->psw.mask & PSW_MASK_32) ? (1 << 5) : 0) | + ((env->psw.mask & PSW_MASK_DAT) ? (1 << 4) : 0) | + ((env->psw.mask & PSW_ASC_SECONDARY) ? (1 << 3) : 0) | + ((env->psw.mask & PSW_ASC_ACCREG) ? (1 << 2) : 0); +} + +static inline hwaddr decode_basedisp_s(CPUS390XState *env, uint32_t ipb, + uint8_t *ar) +{ + hwaddr addr =3D 0; + uint8_t reg; + + reg =3D ipb >> 28; + if (reg > 0) { + addr =3D env->regs[reg]; + } + addr +=3D (ipb >> 16) & 0xfff; + if (ar) { + *ar =3D reg; + } + + return addr; +} + +/* Base/displacement are at the same locations. */ +#define decode_basedisp_rs decode_basedisp_s + +/* arch_dump.c */ +int s390_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, + int cpuid, DumpState *s); + +/* cpu.c */ +unsigned int s390_count_running_cpus(void); +void s390_cpu_halt(S390CPU *cpu); +void s390_cpu_unhalt(S390CPU *cpu); +void s390_cpu_system_init(Object *obj); +bool s390_cpu_system_realize(DeviceState *dev, Error **errp); +void s390_cpu_finalize(Object *obj); +void s390_cpu_system_class_init(CPUClass *cc); +void s390_cpu_machine_reset_cb(void *opaque); +bool s390_cpu_has_work(CPUState *cs); + +/* excp_helper.c */ +void s390x_cpu_debug_excp_handler(CPUState *cs); +bool s390_cpu_exec_interrupt(CPUState *cpu, int int_req); + +/* helper.c */ +void do_restart_interrupt(CPUS390XState *env); +void s390_cpu_recompute_watchpoints(CPUState *cs); +void s390x_tod_timer(void *opaque); +void s390x_cpu_timer(void *opaque); +void s390_handle_wait(S390CPU *cpu); +hwaddr s390_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +hwaddr s390_cpu_get_phys_addr_debug(CPUState *cpu, vaddr addr); +#define S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) +int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch); +int s390_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len); +LowCore *cpu_map_lowcore(CPUS390XState *env); +void cpu_unmap_lowcore(LowCore *lowcore); + +void cpu_inject_clock_comparator(S390CPU *cpu); +void cpu_inject_cpu_timer(S390CPU *cpu); +void cpu_inject_emergency_signal(S390CPU *cpu, uint16_t src_cpu_addr); +int cpu_inject_external_call(S390CPU *cpu, uint16_t src_cpu_addr); +bool s390_cpu_has_io_int(S390CPU *cpu); +bool s390_cpu_has_ext_int(S390CPU *cpu); +bool s390_cpu_has_mcck_int(S390CPU *cpu); +bool s390_cpu_has_int(S390CPU *cpu); +bool s390_cpu_has_restart_int(S390CPU *cpu); +bool s390_cpu_has_stop_int(S390CPU *cpu); +void cpu_inject_restart(S390CPU *cpu); +void cpu_inject_stop(S390CPU *cpu); + +/* ioinst.c */ +void ioinst_handle_xsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra); +void ioinst_handle_csch(S390CPU *cpu, uint64_t reg1, uintptr_t ra); +void ioinst_handle_hsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra); +void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, + uintptr_t ra); +void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, + uintptr_t ra); +void ioinst_handle_stcrw(S390CPU *cpu, uint32_t ipb, uintptr_t ra); +void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, + uintptr_t ra); +int ioinst_handle_tsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_= t ra); +void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb, uintptr_t ra); +void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2, + uint32_t ipb, uintptr_t ra); +void ioinst_handle_rsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra); +void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, uintptr_t ra); +void ioinst_handle_sal(S390CPU *cpu, uint64_t reg1, uintptr_t ra); + +/* mem_helper.c */ +target_ulong mmu_real2abs(CPUS390XState *env, target_ulong raddr); + +/* mmu_helper.c */ +bool mmu_absolute_addr_valid(target_ulong addr, bool is_write); +/* Special access mode only valid for mmu_translate() */ +#define MMU_S390_LRA -1 +int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t= asc, + target_ulong *raddr, int *flags, uint64_t *tec); +int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, + target_ulong *addr, int *flags, uint64_t *tec); + +/* misc_helper.c */ +int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3); +void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, + uintptr_t ra); + +/* sigp.c */ +int handle_sigp(CPUS390XState *env, uint8_t order, uint64_t r1, uint64_t r= 3); +void do_stop_interrupt(CPUS390XState *env); + +#endif --=20 2.49.0