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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1751638786; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=foOnlwyv8QrsQ+dZSOjXJBg+bfwZx1Nn38s3GMRWlXU=; b=PPrlszPJWyvmibQhQn7bmyTwT+y1F/6Sp40NGSl8dNf2CwZagpwayw9VozA0ihEDX+eEY+ lkctv7c/ZleU6S9qAwDP4oVYNqpVz4AUF2OnQxjUnQxU6CxqXAAX4uWfOx+hKVsjfOJb+x 75XFgyGT/YxK3KXSETM/o/4aYINSpnE= X-MC-Unique: ks_vVw6fMvezY3SJ0inyyg-1 X-Mimecast-MFC-AGG-ID: ks_vVw6fMvezY3SJ0inyyg_1751638782 From: Cornelia Huck To: Peter Maydell Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, Eric Auger , Sebastian Ott , Cornelia Huck Subject: [PATCH 3/5] arm/cpu: fix trailing ',' for SET_IDREG Date: Fri, 4 Jul 2025 16:19:25 +0200 Message-ID: <20250704141927.38963-4-cohuck@redhat.com> In-Reply-To: <20250704141927.38963-1-cohuck@redhat.com> References: <20250704141927.38963-1-cohuck@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" While a trailing comma is not broken for SET_IDREG invocations, it does look odd; use a semicolon instead. Fixes: f1fd81291c91 ("arm/cpu: Store aa64mmfr0-3 into the idregs array") Fixes: def3f1c1026a ("arm/cpu: Store aa64dfr0/1 into the idregs array") Signed-off-by: Cornelia Huck Reviewed-by: Eric Auger Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/tcg/cpu64.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c index 00e12ed44ae8..d2f743fb3913 100644 --- a/target/arm/tcg/cpu64.c +++ b/target/arm/tcg/cpu64.c @@ -352,7 +352,7 @@ static void aarch64_a76_initfn(Object *obj) cpu->clidr =3D 0x82000023; cpu->ctr =3D 0x8444C004; cpu->dcz_blocksize =3D 4; - SET_IDREG(isar, ID_AA64DFR0, 0x0000000010305408ull), + SET_IDREG(isar, ID_AA64DFR0, 0x0000000010305408ull); SET_IDREG(isar, ID_AA64ISAR0, 0x0000100010211120ull); SET_IDREG(isar, ID_AA64ISAR1, 0x0000000000100001ull); SET_IDREG(isar, ID_AA64MMFR0, 0x0000000000101122ull); @@ -426,8 +426,8 @@ static void aarch64_a64fx_initfn(Object *obj) cpu->reset_sctlr =3D 0x30000180; SET_IDREG(isar, ID_AA64PFR0, 0x0000000101111111); /* No RAS Extensions= */ SET_IDREG(isar, ID_AA64PFR1, 0x0000000000000000); - SET_IDREG(isar, ID_AA64DFR0, 0x0000000010305408), - SET_IDREG(isar, ID_AA64DFR1, 0x0000000000000000), + SET_IDREG(isar, ID_AA64DFR0, 0x0000000010305408); + SET_IDREG(isar, ID_AA64DFR1, 0x0000000000000000); SET_IDREG(isar, ID_AA64AFR0, 0x0000000000000000); SET_IDREG(isar, ID_AA64AFR1, 0x0000000000000000); SET_IDREG(isar, ID_AA64MMFR0, 0x0000000000001122); @@ -678,13 +678,13 @@ static void aarch64_neoverse_v1_initfn(Object *obj) cpu->dcz_blocksize =3D 4; SET_IDREG(isar, ID_AA64AFR0, 0x00000000); SET_IDREG(isar, ID_AA64AFR1, 0x00000000); - SET_IDREG(isar, ID_AA64DFR0, 0x000001f210305519ull), - SET_IDREG(isar, ID_AA64DFR1, 0x00000000), + SET_IDREG(isar, ID_AA64DFR0, 0x000001f210305519ull); + SET_IDREG(isar, ID_AA64DFR1, 0x00000000); SET_IDREG(isar, ID_AA64ISAR0, 0x1011111110212120ull); /* with FEAT_RNG= */ SET_IDREG(isar, ID_AA64ISAR1, 0x0011000001211032ull); SET_IDREG(isar, ID_AA64MMFR0, 0x0000000000101125ull); - SET_IDREG(isar, ID_AA64MMFR1, 0x0000000010212122ull), - SET_IDREG(isar, ID_AA64MMFR2, 0x0220011102101011ull), + SET_IDREG(isar, ID_AA64MMFR1, 0x0000000010212122ull); + SET_IDREG(isar, ID_AA64MMFR2, 0x0220011102101011ull); SET_IDREG(isar, ID_AA64PFR0, 0x1101110120111112ull); /* GIC filled in = later */ SET_IDREG(isar, ID_AA64PFR1, 0x0000000000000020ull); SET_IDREG(isar, ID_AFR0, 0x00000000); --=20 2.50.0