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Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/tcg/helper-sme.h | 19 +++++ target/arm/tcg/vec_internal.h | 5 ++ target/arm/tcg/sme_helper.c | 141 +++++++++++++++++++++++++++------ target/arm/tcg/translate-sme.c | 27 ++++--- 4 files changed, 160 insertions(+), 32 deletions(-) diff --git a/target/arm/tcg/helper-sme.h b/target/arm/tcg/helper-sme.h index 16083660e2..2b22c6aee5 100644 --- a/target/arm/tcg/helper-sme.h +++ b/target/arm/tcg/helper-sme.h @@ -143,6 +143,25 @@ DEF_HELPER_FLAGS_7(sme_fmopa_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, ptr, fpst, i32) DEF_HELPER_FLAGS_7(sme_bfmopa_w, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, ptr, env, i32) + +DEF_HELPER_FLAGS_7(sme_fmops_w_h, TCG_CALL_NO_RWG, + void, ptr, ptr, ptr, ptr, ptr, env, i32) +DEF_HELPER_FLAGS_7(sme_fmops_s, TCG_CALL_NO_RWG, + void, ptr, ptr, ptr, ptr, ptr, fpst, i32) +DEF_HELPER_FLAGS_7(sme_fmops_d, TCG_CALL_NO_RWG, + void, ptr, ptr, ptr, ptr, ptr, fpst, i32) +DEF_HELPER_FLAGS_7(sme_bfmops_w, TCG_CALL_NO_RWG, + void, ptr, ptr, ptr, ptr, ptr, env, i32) + +DEF_HELPER_FLAGS_7(sme_ah_fmops_w_h, TCG_CALL_NO_RWG, + void, ptr, ptr, ptr, ptr, ptr, env, i32) +DEF_HELPER_FLAGS_7(sme_ah_fmops_s, TCG_CALL_NO_RWG, + void, ptr, ptr, ptr, ptr, ptr, fpst, i32) +DEF_HELPER_FLAGS_7(sme_ah_fmops_d, TCG_CALL_NO_RWG, + void, ptr, ptr, ptr, ptr, ptr, fpst, i32) +DEF_HELPER_FLAGS_7(sme_ah_bfmops_w, TCG_CALL_NO_RWG, + void, ptr, ptr, ptr, ptr, ptr, env, i32) + DEF_HELPER_FLAGS_6(sme_smopa_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_6(sme_umopa_s, TCG_CALL_NO_RWG, diff --git a/target/arm/tcg/vec_internal.h b/target/arm/tcg/vec_internal.h index ad3bfabc34..609ec09062 100644 --- a/target/arm/tcg/vec_internal.h +++ b/target/arm/tcg/vec_internal.h @@ -300,6 +300,11 @@ bool is_ebf(CPUARMState *env, float_status *statusp, f= loat_status *oddstatusp); /* * Negate as for FPCR.AH=3D1 -- do not negate NaNs. */ +static inline float16 bfloat16_ah_chs(float16 a) +{ + return bfloat16_is_any_nan(a) ? a : bfloat16_chs(a); +} + static inline float16 float16_ah_chs(float16 a) { return float16_is_any_nan(a) ? a : float16_chs(a); diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c index b6d1adbbf2..cf7ac3eda0 100644 --- a/target/arm/tcg/sme_helper.c +++ b/target/arm/tcg/sme_helper.c @@ -995,19 +995,18 @@ void HELPER(sme_addva_d)(void *vzda, void *vzn, void = *vpn, } } =20 -void HELPER(sme_fmopa_s)(void *vza, void *vzn, void *vzm, void *vpn, - void *vpm, float_status *fpst, uint32_t desc) +static void do_fmopa_s(void *vza, void *vzn, void *vzm, uint16_t *pn, + uint16_t *pm, float_status *fpst, uint32_t desc, + uint32_t negx, int negf) { intptr_t row, col, oprsz =3D simd_maxsz(desc); - uint32_t neg =3D simd_data(desc) << 31; - uint16_t *pn =3D vpn, *pm =3D vpm; =20 for (row =3D 0; row < oprsz; ) { uint16_t pa =3D pn[H2(row >> 4)]; do { if (pa & 1) { void *vza_row =3D vza + tile_vslice_offset(row); - uint32_t n =3D *(uint32_t *)(vzn + H1_4(row)) ^ neg; + uint32_t n =3D *(uint32_t *)(vzn + H1_4(row)) ^ negx; =20 for (col =3D 0; col < oprsz; ) { uint16_t pb =3D pm[H2(col >> 4)]; @@ -1015,7 +1014,7 @@ void HELPER(sme_fmopa_s)(void *vza, void *vzn, void *= vzm, void *vpn, if (pb & 1) { uint32_t *a =3D vza_row + H1_4(col); uint32_t *m =3D vzm + H1_4(col); - *a =3D float32_muladd(n, *m, *a, 0, fpst); + *a =3D float32_muladd(n, *m, *a, negf, fpst); } col +=3D 4; pb >>=3D 4; @@ -1028,29 +1027,65 @@ void HELPER(sme_fmopa_s)(void *vza, void *vzn, void= *vzm, void *vpn, } } =20 -void HELPER(sme_fmopa_d)(void *vza, void *vzn, void *vzm, void *vpn, +void HELPER(sme_fmopa_s)(void *vza, void *vzn, void *vzm, void *vpn, void *vpm, float_status *fpst, uint32_t desc) +{ + do_fmopa_s(vza, vzn, vzm, vpn, vpm, fpst, desc, 0, 0); +} + +void HELPER(sme_fmops_s)(void *vza, void *vzn, void *vzm, void *vpn, + void *vpm, float_status *fpst, uint32_t desc) +{ + do_fmopa_s(vza, vzn, vzm, vpn, vpm, fpst, desc, 1u << 31, 0); +} + +void HELPER(sme_ah_fmops_s)(void *vza, void *vzn, void *vzm, void *vpn, + void *vpm, float_status *fpst, uint32_t desc) +{ + do_fmopa_s(vza, vzn, vzm, vpn, vpm, fpst, desc, 0, + float_muladd_negate_product); +} + +static void do_fmopa_d(uint64_t *za, uint64_t *zn, uint64_t *zm, uint8_t *= pn, + uint8_t *pm, float_status *fpst, uint32_t desc, + uint64_t negx, int negf) { intptr_t row, col, oprsz =3D simd_oprsz(desc) / 8; - uint64_t neg =3D (uint64_t)simd_data(desc) << 63; - uint64_t *za =3D vza, *zn =3D vzn, *zm =3D vzm; - uint8_t *pn =3D vpn, *pm =3D vpm; =20 for (row =3D 0; row < oprsz; ++row) { if (pn[H1(row)] & 1) { uint64_t *za_row =3D &za[tile_vslice_index(row)]; - uint64_t n =3D zn[row] ^ neg; + uint64_t n =3D zn[row] ^ negx; =20 for (col =3D 0; col < oprsz; ++col) { if (pm[H1(col)] & 1) { uint64_t *a =3D &za_row[col]; - *a =3D float64_muladd(n, zm[col], *a, 0, fpst); + *a =3D float64_muladd(n, zm[col], *a, negf, fpst); } } } } } =20 +void HELPER(sme_fmopa_d)(void *vza, void *vzn, void *vzm, void *vpn, + void *vpm, float_status *fpst, uint32_t desc) +{ + do_fmopa_d(vza, vzn, vzm, vpn, vpm, fpst, desc, 0, 0); +} + +void HELPER(sme_fmops_d)(void *vza, void *vzn, void *vzm, void *vpn, + void *vpm, float_status *fpst, uint32_t desc) +{ + do_fmopa_d(vza, vzn, vzm, vpn, vpm, fpst, desc, 1ull << 63, 0); +} + +void HELPER(sme_ah_fmops_d)(void *vza, void *vzn, void *vzm, void *vpn, + void *vpm, float_status *fpst, uint32_t desc) +{ + do_fmopa_d(vza, vzn, vzm, vpn, vpm, fpst, desc, 0, + float_muladd_negate_product); +} + /* * Alter PAIR as needed for controlling predicates being false, * and for NEG on an enabled row element. @@ -1071,6 +1106,20 @@ static inline uint32_t f16mop_adj_pair(uint32_t pair= , uint32_t pg, uint32_t neg) return pair; } =20 +static inline uint32_t f16mop_ah_neg_adj_pair(uint32_t pair, uint32_t pg) +{ + uint32_t l =3D pg & 1 ? float16_ah_chs(pair) : 0; + uint32_t h =3D pg & 4 ? float16_ah_chs(pair >> 16) : 0; + return l | (h << 16); +} + +static inline uint32_t bf16mop_ah_neg_adj_pair(uint32_t pair, uint32_t pg) +{ + uint32_t l =3D pg & 1 ? bfloat16_ah_chs(pair) : 0; + uint32_t h =3D pg & 4 ? bfloat16_ah_chs(pair >> 16) : 0; + return l | (h << 16); +} + static float32 f16_dotadd(float32 sum, uint32_t e1, uint32_t e2, float_status *s_f16, float_status *s_std, float_status *s_odd) @@ -1139,12 +1188,11 @@ static float32 f16_dotadd(float32 sum, uint32_t e1,= uint32_t e2, return float32_add(sum, t32, s_std); } =20 -void HELPER(sme_fmopa_w_h)(void *vza, void *vzn, void *vzm, void *vpn, - void *vpm, CPUARMState *env, uint32_t desc) +static void do_fmopa_w_h(void *vza, void *vzn, void *vzm, uint16_t *pn, + uint16_t *pm, CPUARMState *env, uint32_t desc, + uint32_t negx, bool ah_neg) { intptr_t row, col, oprsz =3D simd_maxsz(desc); - uint32_t neg =3D simd_data(desc) * 0x80008000u; - uint16_t *pn =3D vpn, *pm =3D vpm; float_status fpst_odd =3D env->vfp.fp_status[FPST_ZA]; =20 set_float_rounding_mode(float_round_to_odd, &fpst_odd); @@ -1155,7 +1203,11 @@ void HELPER(sme_fmopa_w_h)(void *vza, void *vzn, voi= d *vzm, void *vpn, void *vza_row =3D vza + tile_vslice_offset(row); uint32_t n =3D *(uint32_t *)(vzn + H1_4(row)); =20 - n =3D f16mop_adj_pair(n, prow, neg); + if (ah_neg) { + n =3D f16mop_ah_neg_adj_pair(n, prow); + } else { + n =3D f16mop_adj_pair(n, prow, negx); + } =20 for (col =3D 0; col < oprsz; ) { uint16_t pcol =3D pm[H2(col >> 4)]; @@ -1180,6 +1232,24 @@ void HELPER(sme_fmopa_w_h)(void *vza, void *vzn, voi= d *vzm, void *vpn, } } =20 +void HELPER(sme_fmopa_w_h)(void *vza, void *vzn, void *vzm, void *vpn, + void *vpm, CPUARMState *env, uint32_t desc) +{ + do_fmopa_w_h(vza, vzn, vzm, vpn, vpm, env, desc, 0, false); +} + +void HELPER(sme_fmops_w_h)(void *vza, void *vzn, void *vzm, void *vpn, + void *vpm, CPUARMState *env, uint32_t desc) +{ + do_fmopa_w_h(vza, vzn, vzm, vpn, vpm, env, desc, 0x80008000u, false); +} + +void HELPER(sme_ah_fmops_w_h)(void *vza, void *vzn, void *vzm, void *vpn, + void *vpm, CPUARMState *env, uint32_t desc) +{ + do_fmopa_w_h(vza, vzn, vzm, vpn, vpm, env, desc, 0, true); +} + void HELPER(sme2_fdot_h)(void *vd, void *vn, void *vm, void *va, CPUARMState *env, uint32_t desc) { @@ -1254,12 +1324,11 @@ void HELPER(sme2_fvdot_idx_h)(void *vd, void *vn, v= oid *vm, void *va, } } =20 -void HELPER(sme_bfmopa_w)(void *vza, void *vzn, void *vzm, - void *vpn, void *vpm, CPUARMState *env, uint32_t= desc) +static void do_bfmopa_w(void *vza, void *vzn, void *vzm, + uint16_t *pn, uint16_t *pm, CPUARMState *env, + uint32_t desc, uint32_t negx, bool ah_neg) { intptr_t row, col, oprsz =3D simd_maxsz(desc); - uint32_t neg =3D simd_data(desc) * 0x80008000u; - uint16_t *pn =3D vpn, *pm =3D vpm; float_status fpst, fpst_odd; =20 if (is_ebf(env, &fpst, &fpst_odd)) { @@ -1269,7 +1338,11 @@ void HELPER(sme_bfmopa_w)(void *vza, void *vzn, void= *vzm, void *vza_row =3D vza + tile_vslice_offset(row); uint32_t n =3D *(uint32_t *)(vzn + H1_4(row)); =20 - n =3D f16mop_adj_pair(n, prow, neg); + if (ah_neg) { + n =3D bf16mop_ah_neg_adj_pair(n, prow); + } else { + n =3D f16mop_adj_pair(n, prow, negx); + } =20 for (col =3D 0; col < oprsz; ) { uint16_t pcol =3D pm[H2(col >> 4)]; @@ -1296,7 +1369,11 @@ void HELPER(sme_bfmopa_w)(void *vza, void *vzn, void= *vzm, void *vza_row =3D vza + tile_vslice_offset(row); uint32_t n =3D *(uint32_t *)(vzn + H1_4(row)); =20 - n =3D f16mop_adj_pair(n, prow, neg); + if (ah_neg) { + n =3D bf16mop_ah_neg_adj_pair(n, prow); + } else { + n =3D f16mop_adj_pair(n, prow, negx); + } =20 for (col =3D 0; col < oprsz; ) { uint16_t pcol =3D pm[H2(col >> 4)]; @@ -1319,6 +1396,24 @@ void HELPER(sme_bfmopa_w)(void *vza, void *vzn, void= *vzm, } } =20 +void HELPER(sme_bfmopa_w)(void *vza, void *vzn, void *vzm, void *vpn, + void *vpm, CPUARMState *env, uint32_t desc) +{ + do_bfmopa_w(vza, vzn, vzm, vpn, vpm, env, desc, 0, false); +} + +void HELPER(sme_bfmops_w)(void *vza, void *vzn, void *vzm, void *vpn, + void *vpm, CPUARMState *env, uint32_t desc) +{ + do_bfmopa_w(vza, vzn, vzm, vpn, vpm, env, desc, 0x80008000u, false); +} + +void HELPER(sme_ah_bfmops_w)(void *vza, void *vzn, void *vzm, void *vpn, + void *vpm, CPUARMState *env, uint32_t desc) +{ + do_bfmopa_w(vza, vzn, vzm, vpn, vpm, env, desc, 0, true); +} + typedef uint32_t IMOPFn32(uint32_t, uint32_t, uint32_t, uint8_t, bool); static inline void do_imopa_s(uint32_t *za, uint32_t *zn, uint32_t *zm, uint8_t *pn, uint8_t *pm, diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c index 38d0231b0a..782f408061 100644 --- a/target/arm/tcg/translate-sme.c +++ b/target/arm/tcg/translate-sme.c @@ -526,7 +526,7 @@ static bool do_outprod_fpst(DisasContext *s, arg_op *a,= MemOp esz, gen_helper_gvec_5_ptr *fn) { int svl =3D streaming_vec_reg_size(s); - uint32_t desc =3D simd_desc(svl, svl, a->sub); + uint32_t desc =3D simd_desc(svl, svl, 0); TCGv_ptr za, zn, zm, pn, pm, fpst; =20 if (!sme_smza_enabled_check(s)) { @@ -548,7 +548,7 @@ static bool do_outprod_env(DisasContext *s, arg_op *a, = MemOp esz, gen_helper_gvec_5_ptr *fn) { int svl =3D streaming_vec_reg_size(s); - uint32_t desc =3D simd_desc(svl, svl, a->sub); + uint32_t desc =3D simd_desc(svl, svl, 0); TCGv_ptr za, zn, zm, pn, pm; =20 if (!sme_smza_enabled_check(s)) { @@ -565,14 +565,23 @@ static bool do_outprod_env(DisasContext *s, arg_op *a= , MemOp esz, return true; } =20 -TRANS_FEAT(FMOPA_w_h, aa64_sme, do_outprod_env, a, - MO_32, gen_helper_sme_fmopa_w_h) -TRANS_FEAT(FMOPA_s, aa64_sme, do_outprod_fpst, a, - MO_32, FPST_ZA, gen_helper_sme_fmopa_s) -TRANS_FEAT(FMOPA_d, aa64_sme_f64f64, do_outprod_fpst, a, - MO_64, FPST_ZA, gen_helper_sme_fmopa_d) +TRANS_FEAT(FMOPA_w_h, aa64_sme, do_outprod_env, a, MO_32, + !a->sub ? gen_helper_sme_fmopa_w_h + : !s->fpcr_ah ? gen_helper_sme_fmops_w_h + : gen_helper_sme_ah_fmops_w_h) +TRANS_FEAT(FMOPA_s, aa64_sme, do_outprod_fpst, a, MO_32, FPST_ZA, + !a->sub ? gen_helper_sme_fmopa_s + : !s->fpcr_ah ? gen_helper_sme_fmops_s + : gen_helper_sme_ah_fmops_s) +TRANS_FEAT(FMOPA_d, aa64_sme_f64f64, do_outprod_fpst, a, MO_64, FPST_ZA, + !a->sub ? gen_helper_sme_fmopa_d + : !s->fpcr_ah ? gen_helper_sme_fmops_d + : gen_helper_sme_ah_fmops_d) =20 -TRANS_FEAT(BFMOPA_w, aa64_sme, do_outprod_env, a, MO_32, gen_helper_sme_bf= mopa_w) +TRANS_FEAT(BFMOPA_w, aa64_sme, do_outprod_env, a, MO_32, + !a->sub ? gen_helper_sme_bfmopa_w + : !s->fpcr_ah ? gen_helper_sme_bfmops_w + : gen_helper_sme_ah_bfmops_w) =20 TRANS_FEAT(SMOPA_s, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_smopa_s) TRANS_FEAT(UMOPA_s, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_umopa_s) --=20 2.43.0