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Tsirkin" , Alex Williamson , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-devel@nongnu.org Subject: [PATCH v7 2/2] hw/i386: Add the ramfb romfile compatibility Date: Wed, 2 Jul 2025 04:56:16 -0400 Message-Id: <20250702085616.2172722-3-shahuang@redhat.com> In-Reply-To: <20250702085616.2172722-1-shahuang@redhat.com> References: <20250702085616.2172722-1-shahuang@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=shahuang@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1751446647658116600 Content-Type: text/plain; charset="utf-8" Set the "use-legacy-x86-rom" property to false by default, and only set it to true on x86 since only x86 will need it. At the same time, set the "use-legacy-x86-rom" property to true on those historical versioned machine types in order to avoid the memory layout being changed. Signed-off-by: Shaoqin Huang --- hw/core/machine.c | 2 ++ hw/display/ramfb-standalone.c | 2 +- hw/i386/pc_piix.c | 10 ++++++++++ hw/i386/pc_q35.c | 3 +++ hw/vfio/pci.c | 2 +- 5 files changed, 17 insertions(+), 2 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index e869821b22..a7043e2a34 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -39,6 +39,8 @@ =20 GlobalProperty hw_compat_10_0[] =3D { { "scsi-hd", "dpofua", "off" }, + { "ramfb", "use-legacy-x86-rom", "true"}, + { "vfio-pci", "use-legacy-x86-rom", "true" }, }; const size_t hw_compat_10_0_len =3D G_N_ELEMENTS(hw_compat_10_0); =20 diff --git a/hw/display/ramfb-standalone.c b/hw/display/ramfb-standalone.c index 725aef9896..b20a7c57b3 100644 --- a/hw/display/ramfb-standalone.c +++ b/hw/display/ramfb-standalone.c @@ -63,7 +63,7 @@ static const VMStateDescription ramfb_dev_vmstate =3D { =20 static const Property ramfb_properties[] =3D { DEFINE_PROP_BOOL("x-migrate", RAMFBStandaloneState, migrate, true), - DEFINE_PROP_BOOL("use-legacy-x86-rom", RAMFBStandaloneState, use_legac= y_x86_rom, true), + DEFINE_PROP_BOOL("use-legacy-x86-rom", RAMFBStandaloneState, use_legac= y_x86_rom, false), }; =20 static void ramfb_class_initfn(ObjectClass *klass, const void *data) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index ea7572e783..8ec8d8ae6d 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -49,6 +49,7 @@ #include "hw/i2c/smbus_eeprom.h" #include "system/memory.h" #include "hw/acpi/acpi.h" +#include "hw/vfio/pci.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "system/xen.h" @@ -77,6 +78,13 @@ static const int ide_iobase2[MAX_IDE_BUS] =3D { 0x3f6, 0= x376 }; static const int ide_irq[MAX_IDE_BUS] =3D { 14, 15 }; #endif =20 +static GlobalProperty pc_piix_compat_defaults[] =3D { + { TYPE_RAMFB_DEVICE, "use-legacy-x86-rom", "true" }, + { TYPE_VFIO_PCI, "use-legacy-x86-rom", "true" }, +}; +static const size_t pc_piix_compat_defaults_len =3D + G_N_ELEMENTS(pc_piix_compat_defaults); + /* * Return the global irq number corresponding to a given device irq * pin. We could also use the bus number to have a more precise mapping. @@ -482,6 +490,8 @@ static void pc_i440fx_machine_options(MachineClass *m) pc_set_south_bridge); object_class_property_set_description(oc, "x-south-bridge", "Use a different south bridge than PI= IX3"); + compat_props_add(m->compat_props, + pc_piix_compat_defaults, pc_piix_compat_defaults_len); } =20 static void pc_i440fx_machine_10_1_options(MachineClass *m) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 33211b1876..0096eef6f4 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -45,6 +45,7 @@ #include "hw/i386/pc.h" #include "hw/i386/amd_iommu.h" #include "hw/i386/intel_iommu.h" +#include "hw/vfio/pci.h" #include "hw/virtio/virtio-iommu.h" #include "hw/display/ramfb.h" #include "hw/ide/pci.h" @@ -67,6 +68,8 @@ =20 static GlobalProperty pc_q35_compat_defaults[] =3D { { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "39" }, + { TYPE_RAMFB_DEVICE, "use-legacy-x86-rom", "true" }, + { TYPE_VFIO_PCI, "use-legacy-x86-rom", "true" }, }; static const size_t pc_q35_compat_defaults_len =3D G_N_ELEMENTS(pc_q35_compat_defaults); diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index f4fa8a5610..604b337389 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -3710,7 +3710,7 @@ static const TypeInfo vfio_pci_dev_info =3D { =20 static const Property vfio_pci_dev_nohotplug_properties[] =3D { DEFINE_PROP_BOOL("ramfb", VFIOPCIDevice, enable_ramfb, false), - DEFINE_PROP_BOOL("use-legacy-x86-rom", VFIOPCIDevice, use_legacy_x86_r= om, true), + DEFINE_PROP_BOOL("use-legacy-x86-rom", VFIOPCIDevice, use_legacy_x86_r= om, false), DEFINE_PROP_ON_OFF_AUTO("x-ramfb-migrate", VFIOPCIDevice, ramfb_migrat= e, ON_OFF_AUTO_AUTO), }; --=20 2.40.1