From nobody Sat Nov 15 14:53:50 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1751391065; cv=none; d=zohomail.com; s=zohoarc; b=EZGD+B8OxZv+IIxK7NeBPqgSOUVJIi3AxxWaJZnb2OI6+82g4dnTt5m8pQ22iYw7PqkZZNfAArfRQA6g4r88Vw0SM6oKAyAOK7C9Inc65VFHBd6QdAnQRscHiBjdfXwYlMyVApdVZwX8kNXSmfwF30Vx1MfSl5QEJNwKcdAN6QI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1751391065; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=2+TtjmdoBXZAuImsqWw23qI6VIFIMg/1UXP7ySjDv2M=; b=H5AouO/mmZaa7RoJDBwaWrsJzEHl1RYCCPEatu+OjWsgJvmNRIrPfCiUx/8jzOBP1COkRxRwgbRtOfhi3C9scSVXoCw7dMNzQFD4/sGdveA/Omd6Aw2sGPufBr0+m9JrC7dpeE+3iQj19jkPc+nZWUdFdlH0SF9xR9WyqlFHhSg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1751391065459617.6973755157396; Tue, 1 Jul 2025 10:31:05 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uWeoX-0005r4-GC; Tue, 01 Jul 2025 13:30:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uWeoT-0005X9-KG for qemu-devel@nongnu.org; Tue, 01 Jul 2025 13:30:33 -0400 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uWeoP-0007G9-TN for qemu-devel@nongnu.org; Tue, 01 Jul 2025 13:30:33 -0400 Received: from localhost.localdomain (unknown [167.220.208.67]) by linux.microsoft.com (Postfix) with ESMTPSA id 6F26D2112239; Tue, 1 Jul 2025 10:30:15 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 6F26D2112239 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1751391019; bh=2+TtjmdoBXZAuImsqWw23qI6VIFIMg/1UXP7ySjDv2M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iYbV9eOc93T7WC8201t27yIQk0IH14utN1bi+qdwVulq+G5WUkS7/EzTF7qCouNMr 6rtQvJSus/6ZcHX8cMgyXGH6XNl7nlCgFMqVgLvnUI1k+i+fzD9L2/N2FAEgQpxAKc VdJFeSdMzRiN1eNsXWvXJsDEukXfwQA7LrPfPznQ= From: Magnus Kulke To: qemu-devel@nongnu.org Cc: Cameron Esfahani , Phil Dennis-Jordan , Roman Bolshakov , Thomas Huth , Zhao Liu , Wei Liu , Paolo Bonzini , Wei Liu , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Markus Armbruster , Cornelia Huck , Magnus Kulke , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , "Michael S. Tsirkin" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PATCH v2 19/27] target/i386/mshv: Set local interrupt controller state Date: Tue, 1 Jul 2025 19:28:26 +0200 Message-Id: <20250701172834.44849-20-magnuskulke@linux.microsoft.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250701172834.44849-1-magnuskulke@linux.microsoft.com> References: <20250701172834.44849-1-magnuskulke@linux.microsoft.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=13.77.154.182; envelope-from=magnuskulke@linux.microsoft.com; helo=linux.microsoft.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linux.microsoft.com) X-ZM-MESSAGEID: 1751391066025116600 Content-Type: text/plain; charset="utf-8" To set the local interrupt controller state, perform hv calls retrieving partition state from the hypervisor. Signed-off-by: Magnus Kulke --- target/i386/mshv/mshv-cpu.c | 117 ++++++++++++++++++++++++++++++++++++ target/i386/mshv/x86.c | 3 +- 2 files changed, 119 insertions(+), 1 deletion(-) diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c index dddb2da428..8716fe350b 100644 --- a/target/i386/mshv/mshv-cpu.c +++ b/target/i386/mshv/mshv-cpu.c @@ -12,6 +12,7 @@ =20 #include "qemu/osdep.h" #include "qemu/error-report.h" +#include "qemu/memalign.h" #include "qemu/typedefs.h" =20 #include "system/mshv.h" @@ -19,6 +20,7 @@ #include "linux/mshv.h" #include "hw/hyperv/hvhdk_mini.h" #include "hw/hyperv/hvgdk.h" +#include "hw/i386/apic_internal.h" =20 #include "cpu.h" #include "emulate/x86_decode.h" @@ -484,6 +486,114 @@ static int set_cpu_state(const CPUState *cpu, const M= shvFPU *fpu_regs, return 0; } =20 +static int get_vp_state(int cpu_fd, mshv_get_set_vp_state *state) +{ + int ret; + + ret =3D ioctl(cpu_fd, MSHV_GET_VP_STATE, state); + if (ret < 0) { + error_report("failed to get partition state: %s", strerror(errno)); + return -1; + } + + return 0; +} + +static int get_lapic(int cpu_fd, + struct hv_local_interrupt_controller_state *state) +{ + int ret; + size_t size =3D 4096; + /* buffer aligned to 4k, as *state requires that */ + void *buffer =3D qemu_memalign(size, size); + struct mshv_get_set_vp_state mshv_state =3D { 0 }; + + mshv_state.buf_ptr =3D (uint64_t) buffer; + mshv_state.buf_sz =3D size; + mshv_state.type =3D MSHV_VP_STATE_LAPIC; + + ret =3D get_vp_state(cpu_fd, &mshv_state); + if (ret =3D=3D 0) { + memcpy(state, buffer, sizeof(*state)); + } + qemu_vfree(buffer); + if (ret < 0) { + error_report("failed to get lapic"); + return -1; + } + + return 0; +} + +static uint32_t set_apic_delivery_mode(uint32_t reg, uint32_t mode) +{ + return ((reg) & ~0x700) | ((mode) << 8); +} + +static int set_vp_state(int cpu_fd, const mshv_get_set_vp_state *state) +{ + int ret; + + ret =3D ioctl(cpu_fd, MSHV_SET_VP_STATE, state); + if (ret < 0) { + error_report("failed to set partition state: %s", strerror(errno)); + return -1; + } + + return 0; +} + +static int set_lapic(int cpu_fd, + const struct hv_local_interrupt_controller_state *sta= te) +{ + int ret; + size_t size =3D 4096; + /* buffer aligned to 4k, as *state requires that */ + void *buffer =3D qemu_memalign(size, size); + struct mshv_get_set_vp_state mshv_state =3D { 0 }; + + if (!state) { + error_report("lapic state is NULL"); + return -1; + } + memcpy(buffer, state, sizeof(*state)); + + mshv_state.buf_ptr =3D (uint64_t) buffer; + mshv_state.buf_sz =3D size; + mshv_state.type =3D MSHV_VP_STATE_LAPIC; + + ret =3D set_vp_state(cpu_fd, &mshv_state); + qemu_vfree(buffer); + if (ret < 0) { + error_report("failed to set lapic: %s", strerror(errno)); + return -1; + } + + return 0; +} + +static int set_lint(int cpu_fd) +{ + int ret; + uint32_t *lvt_lint0, *lvt_lint1; + + struct hv_local_interrupt_controller_state lapic_state =3D { 0 }; + ret =3D get_lapic(cpu_fd, &lapic_state); + if (ret < 0) { + return ret; + } + + lvt_lint0 =3D &lapic_state.apic_lvt_lint0; + *lvt_lint0 =3D set_apic_delivery_mode(*lvt_lint0, APIC_DM_EXTINT); + + lvt_lint1 =3D &lapic_state.apic_lvt_lint1; + *lvt_lint1 =3D set_apic_delivery_mode(*lvt_lint1, APIC_DM_NMI); + + /* TODO: should we skip setting lapic if the values are the same? */ + + return set_lapic(cpu_fd, &lapic_state); +} + /* * TODO: populate topology info: * @@ -495,6 +605,7 @@ int mshv_configure_vcpu(const CPUState *cpu, const stru= ct MshvFPU *fpu, uint64_t xcr0) { int ret; + int cpu_fd =3D mshv_vcpufd(cpu); =20 ret =3D set_cpu_state(cpu, fpu, xcr0); if (ret < 0) { @@ -502,6 +613,12 @@ int mshv_configure_vcpu(const CPUState *cpu, const str= uct MshvFPU *fpu, return -1; } =20 + ret =3D set_lint(cpu_fd); + if (ret < 0) { + error_report("failed to set lpic int"); + return -1; + } + return 0; } =20 diff --git a/target/i386/mshv/x86.c b/target/i386/mshv/x86.c index 54c40b8064..d574b3bc52 100644 --- a/target/i386/mshv/x86.c +++ b/target/i386/mshv/x86.c @@ -232,8 +232,9 @@ bool x86_is_long_mode(CPUState *cpu) X86CPU *x86_cpu =3D X86_CPU(cpu); CPUX86State *env =3D &x86_cpu->env; uint64_t efer =3D env->efer; + uint64_t lme_lma =3D (MSR_EFER_LME | MSR_EFER_LMA); =20 - return ((efer & (EFER_LME | EFER_LMA)) =3D=3D (EFER_LME | EFER_LMA)); + return ((efer & lme_lma) =3D=3D lme_lma); } =20 bool x86_is_long64_mode(CPUState *cpu) --=20 2.34.1