From nobody Sat Nov 15 14:52:42 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1751391030; cv=none; d=zohomail.com; s=zohoarc; b=D7Dvnuq2tsYdErAvTNjcy466nUPELOruiQRloohQAe8JgR9G4GHuOk8ojhnsMugibskEVeML3m2UNZxK5BaMO08E/TWyXDZnMLYo6DuBbh0fhiESLzNS4LiVS3cPsrjuUzM36iQw0aFvKhoFGWYXtjMWhJ4cMHFWoMJW4Eg5EZM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1751391030; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ju8qZk0r56f4oIIN4Veu1xJUr1cS2ONnO5h3qfIMJUc=; b=TlHFgENCQeXPOtRy2I5g5ubVMEV0jeS7ln/O+myJ8ZsDWCuKGxnhBTxE1axA25TBQua7Zc6ev49I4JGUgvURZeohcWrHdmsHZ96ppioOZicdM+OeL9TnshcMhYUVEHuc+rkK4ZaRPRvYGUfJNdb5UZdiTIX3661gxtha3YQ+Rv8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1751391030796833.3102099517715; Tue, 1 Jul 2025 10:30:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uWeo9-0004Np-JI; Tue, 01 Jul 2025 13:30:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uWent-0004J0-IF for qemu-devel@nongnu.org; Tue, 01 Jul 2025 13:29:58 -0400 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uWeno-0006tV-Ec for qemu-devel@nongnu.org; Tue, 01 Jul 2025 13:29:57 -0400 Received: from localhost.localdomain (unknown [167.220.208.67]) by linux.microsoft.com (Postfix) with ESMTPSA id 66DAF2112237; Tue, 1 Jul 2025 10:29:47 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 66DAF2112237 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1751390990; bh=ju8qZk0r56f4oIIN4Veu1xJUr1cS2ONnO5h3qfIMJUc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XWJGH+ziqws6iUukpZhzZDcfEHcYPKoek1JL7FFeDnX+AblbGp9hDhvyV/fYndMZW 46jLHiBbEgQUrVa+jNDcCAqYtWPN5uilbM+4mEtsIVyE+8sR6JVaRfNpsh/OBQoFYN bk7MH4s7NDcehQ4kYAV/ZNHX82wrZZ5lMuRsRTUI= From: Magnus Kulke To: qemu-devel@nongnu.org Cc: Cameron Esfahani , Phil Dennis-Jordan , Roman Bolshakov , Thomas Huth , Zhao Liu , Wei Liu , Paolo Bonzini , Wei Liu , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Markus Armbruster , Cornelia Huck , Magnus Kulke , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , "Michael S. Tsirkin" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PATCH v2 12/27] accel/mshv: Add vCPU creation and execution loop Date: Tue, 1 Jul 2025 19:28:19 +0200 Message-Id: <20250701172834.44849-13-magnuskulke@linux.microsoft.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250701172834.44849-1-magnuskulke@linux.microsoft.com> References: <20250701172834.44849-1-magnuskulke@linux.microsoft.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=13.77.154.182; envelope-from=magnuskulke@linux.microsoft.com; helo=linux.microsoft.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linux.microsoft.com) X-ZM-MESSAGEID: 1751391032050116600 Content-Type: text/plain; charset="utf-8" Create MSHV vCPUs using MSHV_CREATE_VP and initialize their state. Register the MSHV CPU execution loop loop with the QEMU accelerator framework to enable guest code execution. The target/i386 functionality is still mostly stubbed out and will be populated in a later commit in this series. Signed-off-by: Magnus Kulke --- accel/mshv/mshv-all.c | 187 +++++++++++++++++++++++++++++++++--- accel/mshv/trace-events | 1 + include/system/mshv.h | 17 ++++ target/i386/mshv/mshv-cpu.c | 63 ++++++++++++ 4 files changed, 256 insertions(+), 12 deletions(-) diff --git a/accel/mshv/mshv-all.c b/accel/mshv/mshv-all.c index 9f6dcacf33..04900a2bfe 100644 --- a/accel/mshv/mshv-all.c +++ b/accel/mshv/mshv-all.c @@ -392,6 +392,24 @@ int mshv_hvcall(int vm_fd, const struct mshv_root_hvca= ll *args) return ret; } =20 +static int mshv_init_vcpu(CPUState *cpu) +{ + int vm_fd =3D mshv_state->vm; + uint8_t vp_index =3D cpu->cpu_index; + int ret; + + mshv_arch_init_vcpu(cpu); + cpu->accel =3D g_new0(AccelCPUState, 1); + + ret =3D mshv_create_vcpu(vm_fd, vp_index, &cpu->accel->cpufd); + if (ret < 0) { + return -1; + } + + cpu->accel->dirty =3D true; + + return 0; +} =20 static int mshv_init(MachineState *ms) { @@ -414,6 +432,8 @@ static int mshv_init(MachineState *ms) return -1; } =20 + mshv_init_cpu_logic(); + mshv_init_msicontrol(); =20 ret =3D create_vm(mshv_fd, &vm_fd); @@ -443,40 +463,183 @@ static int mshv_init(MachineState *ms) return 0; } =20 +static int mshv_destroy_vcpu(CPUState *cpu) +{ + int cpu_fd =3D mshv_vcpufd(cpu); + int vm_fd =3D mshv_state->vm; + + mshv_remove_vcpu(vm_fd, cpu_fd); + mshv_vcpufd(cpu) =3D 0; + + mshv_arch_destroy_vcpu(cpu); + g_free(cpu->accel); + return 0; +} + +static int mshv_cpu_exec(CPUState *cpu) +{ + hv_message mshv_msg; + enum MshvVmExit exit_reason; + int ret =3D 0; + + bql_unlock(); + cpu_exec_start(cpu); + + do { + if (cpu->accel->dirty) { + ret =3D mshv_arch_put_registers(cpu); + if (ret) { + error_report("Failed to put registers after init: %s", + strerror(-ret)); + ret =3D -1; + break; + } + cpu->accel->dirty =3D false; + } + + ret =3D mshv_run_vcpu(mshv_state->vm, cpu, &mshv_msg, &exit_reason= ); + if (ret < 0) { + error_report("Failed to run on vcpu %d", cpu->cpu_index); + abort(); + } + + switch (exit_reason) { + case MshvVmExitIgnore: + break; + default: + ret =3D EXCP_INTERRUPT; + break; + } + } while (ret =3D=3D 0); + + cpu_exec_end(cpu); + bql_lock(); + + if (ret < 0) { + cpu_dump_state(cpu, stderr, CPU_DUMP_CODE); + vm_stop(RUN_STATE_INTERNAL_ERROR); + } + + qatomic_set(&cpu->exit_request, 0); + return ret; +} + +static void *mshv_vcpu_thread(void *arg) +{ + CPUState *cpu =3D arg; + int ret; + + rcu_register_thread(); + + bql_lock(); + qemu_thread_get_self(cpu->thread); + cpu->thread_id =3D qemu_get_thread_id(); + current_cpu =3D cpu; + ret =3D mshv_init_vcpu(cpu); + if (ret < 0) { + error_report("Failed to init vcpu %d", cpu->cpu_index); + goto cleanup; + } + + /* signal CPU creation */ + cpu_thread_signal_created(cpu); + qemu_guest_random_seed_thread_part2(cpu->random_seed); + + do { + if (cpu_can_run(cpu)) { + mshv_cpu_exec(cpu); + } + qemu_wait_io_event(cpu); + } while (!cpu->unplug || cpu_can_run(cpu)); + + mshv_destroy_vcpu(cpu); +cleanup: + cpu_thread_signal_destroyed(cpu); + bql_unlock(); + rcu_unregister_thread(); + return NULL; +} + static void mshv_start_vcpu_thread(CPUState *cpu) { - error_report("unimplemented"); - abort(); + char thread_name[VCPU_THREAD_NAME_SIZE]; + + cpu->thread =3D g_malloc0(sizeof(QemuThread)); + cpu->halt_cond =3D g_malloc0(sizeof(QemuCond)); + + qemu_cond_init(cpu->halt_cond); + + trace_mshv_start_vcpu_thread(thread_name, cpu->cpu_index); + qemu_thread_create(cpu->thread, thread_name, mshv_vcpu_thread, cpu, + QEMU_THREAD_JOINABLE); +} + +static void do_mshv_cpu_synchronize_post_init(CPUState *cpu, + run_on_cpu_data arg) +{ + int ret =3D mshv_arch_put_registers(cpu); + if (ret < 0) { + error_report("Failed to put registers after init: %s", strerror(-r= et)); + abort(); + } + + cpu->accel->dirty =3D false; } =20 static void mshv_cpu_synchronize_post_init(CPUState *cpu) { - error_report("unimplemented"); - abort(); + run_on_cpu(cpu, do_mshv_cpu_synchronize_post_init, RUN_ON_CPU_NULL); } =20 static void mshv_cpu_synchronize_post_reset(CPUState *cpu) { - error_report("unimplemented"); - abort(); + int ret =3D mshv_arch_put_registers(cpu); + if (ret) { + error_report("Failed to put registers after reset: %s", + strerror(-ret)); + cpu_dump_state(cpu, stderr, CPU_DUMP_CODE); + vm_stop(RUN_STATE_INTERNAL_ERROR); + } + cpu->accel->dirty =3D false; +} + +static void do_mshv_cpu_synchronize_pre_loadvm(CPUState *cpu, + run_on_cpu_data arg) +{ + cpu->accel->dirty =3D true; } =20 static void mshv_cpu_synchronize_pre_loadvm(CPUState *cpu) { - error_report("unimplemented"); - abort(); + run_on_cpu(cpu, do_mshv_cpu_synchronize_pre_loadvm, RUN_ON_CPU_NULL); +} + +static void do_mshv_cpu_synchronize(CPUState *cpu, run_on_cpu_data arg) +{ + if (!cpu->accel->dirty) { + int ret =3D mshv_load_regs(cpu); + if (ret < 0) { + error_report("Failed to load registers for vcpu %d", + cpu->cpu_index); + + cpu_dump_state(cpu, stderr, CPU_DUMP_CODE); + vm_stop(RUN_STATE_INTERNAL_ERROR); + } + + cpu->accel->dirty =3D true; + } } =20 static void mshv_cpu_synchronize(CPUState *cpu) { - error_report("unimplemented"); - abort(); + if (!cpu->accel->dirty) { + run_on_cpu(cpu, do_mshv_cpu_synchronize, RUN_ON_CPU_NULL); + } } =20 static bool mshv_cpus_are_resettable(void) { - error_report("unimplemented"); - abort(); + return false; } =20 static void mshv_accel_class_init(ObjectClass *oc, const void *data) diff --git a/accel/mshv/trace-events b/accel/mshv/trace-events index 66f5057caa..bade57e22c 100644 --- a/accel/mshv/trace-events +++ b/accel/mshv/trace-events @@ -1,5 +1,6 @@ # See docs/devel/tracing.rst for syntax documentation. =20 +mshv_start_vcpu_thread(const char* thread, uint32_t cpu) "thread %s cpu_in= dex %d" mshv_handle_interrupt(uint32_t cpu, int mask) "cpu_index %d mask %x" mshv_set_memory(bool add, uint64_t gpa, uint64_t size, uint64_t user_addr,= bool readonly, int ret) "[add =3D %d] gpa =3D %lx size =3D %lx user =3D %l= x readonly =3D %d result =3D %d" mshv_mem_ioeventfd_add(uint64_t addr, uint32_t size, uint32_t data) "addr = %lx size %d data %x" diff --git a/include/system/mshv.h b/include/system/mshv.h index 8a03a89b0c..0ff19d4eb5 100644 --- a/include/system/mshv.h +++ b/include/system/mshv.h @@ -71,12 +71,29 @@ typedef struct MshvMsiControl { GHashTable *gsi_routes; } MshvMsiControl; =20 +#define mshv_vcpufd(cpu) (cpu->accel->cpufd) + #else /* CONFIG_MSHV_IS_POSSIBLE */ #define mshv_enabled() false #endif #define mshv_msi_via_irqfd_enabled() mshv_enabled() =20 /* cpu */ +typedef enum MshvVmExit { + MshvVmExitIgnore =3D 0, + MshvVmExitShutdown =3D 1, + MshvVmExitSpecial =3D 2, +} MshvVmExit; + +void mshv_init_cpu_logic(void); +int mshv_create_vcpu(int vm_fd, uint8_t vp_index, int *cpu_fd); +void mshv_remove_vcpu(int vm_fd, int cpu_fd); +int mshv_run_vcpu(int vm_fd, CPUState *cpu, hv_message *msg, MshvVmExit *e= xit); +int mshv_load_regs(CPUState *cpu); +int mshv_store_regs(CPUState *cpu); +int mshv_arch_put_registers(const CPUState *cpu); +void mshv_arch_init_vcpu(CPUState *cpu); +void mshv_arch_destroy_vcpu(CPUState *cpu); void mshv_arch_amend_proc_features( union hv_partition_synthetic_processor_features *features); int mshv_arch_post_init_vm(int vm_fd); diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c index c00e98dfba..2fe5319201 100644 --- a/target/i386/mshv/mshv-cpu.c +++ b/target/i386/mshv/mshv-cpu.c @@ -20,16 +20,79 @@ #include "hw/hyperv/hvhdk_mini.h" #include "hw/hyperv/hvgdk.h" =20 +#include "cpu.h" +#include "emulate/x86_decode.h" +#include "emulate/x86_emu.h" +#include "emulate/x86_flags.h" =20 #include "trace-accel_mshv.h" #include "trace.h" =20 +int mshv_store_regs(CPUState *cpu) +{ + error_report("unimplemented"); + abort(); +} + +int mshv_load_regs(CPUState *cpu) +{ + error_report("unimplemented"); + abort(); +} + +int mshv_arch_put_registers(const CPUState *cpu) +{ + error_report("unimplemented"); + abort(); +} + void mshv_arch_amend_proc_features( union hv_partition_synthetic_processor_features *features) { features->access_guest_idle_reg =3D 1; } =20 +int mshv_run_vcpu(int vm_fd, CPUState *cpu, hv_message *msg, MshvVmExit *e= xit) +{ + error_report("unimplemented"); + abort(); +} + +void mshv_remove_vcpu(int vm_fd, int cpu_fd) +{ + error_report("unimplemented"); + abort(); +} + +int mshv_create_vcpu(int vm_fd, uint8_t vp_index, int *cpu_fd) +{ + error_report("unimplemented"); + abort(); +} + +void mshv_init_cpu_logic(void) +{ + error_report("unimplemented"); + abort(); +} + +void mshv_arch_init_vcpu(CPUState *cpu) +{ + X86CPU *x86_cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86_cpu->env; + + env->emu_mmio_buf =3D g_new(char, 4096); +} + +void mshv_arch_destroy_vcpu(CPUState *cpu) +{ + X86CPU *x86_cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86_cpu->env; + + g_free(env->emu_mmio_buf); + env->emu_mmio_buf =3D NULL; +} + /* * Default Microsoft Hypervisor behavior for unimplemented MSR is to send a * fault to the guest if it tries to access it. It is possible to override --=20 2.34.1