From nobody Sat Nov 15 14:30:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1751366078; cv=none; d=zohomail.com; s=zohoarc; b=i07V2wo5iBHuLgDmQj1vc8AuW6O5ZqORhh8l2XUzofNSnIxBjUZrnS/7gX0V++tDn+F5tMUKIPr+CcwDNMgecUm1WK88aybVf/5K+OI0nM7opgX1P9SUqyiT2dwqm05gwo7EdIB2b7zV0/oFxzkgm+rT/khjS4bDCgFYwroZNjI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1751366078; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=T2dW301DNNE9JzkR+6OYVpca6YVZm0Fl9xz3Jz5KOIM=; b=Xk9PUogB6R1S/00yKScuu7x3DrlS0PkbNdcFwg7l7CX7bOVZiVEs2zCplbZL5m7s9yeGuIfmo0qUC5ZAuOuEfVwLc4sv8vPh0O8kNZX8Jqnlru1Ru0UfhXQJXAW3G9kpAHL6DgH6oVhBI3tcMOT5M7vA9HmXdnO4HcBxoQ0EGoU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1751366078413658.8487743095152; Tue, 1 Jul 2025 03:34:38 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uWYIg-0005D4-44; Tue, 01 Jul 2025 06:33:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uWYIe-00059x-Bq; Tue, 01 Jul 2025 06:33:16 -0400 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1uWYIZ-0002Kb-SL; Tue, 01 Jul 2025 06:33:14 -0400 Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-23649faf69fso26719265ad.0; Tue, 01 Jul 2025 03:33:08 -0700 (PDT) Received: from localhost (pa49-178-74-199.pa.nsw.optusnet.com.au. [49.178.74.199]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-23acb3b7986sm108148705ad.164.2025.07.01.03.33.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Jul 2025 03:33:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1751365987; x=1751970787; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=T2dW301DNNE9JzkR+6OYVpca6YVZm0Fl9xz3Jz5KOIM=; b=HGqy+SyEDZ5mEugl9kLzvRKFM/Dfq9JQbhL7GibxjGKHyf+MJ+InwHyxytbkFIWjMZ iAegMuKR3a1REEYwGX+IFJ32tvUgzd2BcZp+TVQJ+cS7jJ5bwdV7+EmZ8/46pYxstZ5V 0cnxZuIytKCxeLo1XDx41SP/yVvu45zJriMJCTLe57tW20MTieva5ldWNlN+c3kSYJeY /cK2BAo4lsC2mZV/adUBq84iP2KzPaCfkPK0ACZ5H21tFDmCHEFykscuIcCVKO3VwwT8 Vz8MwuoJ7L9J6ruLtoN04Fr57voIJ2wv0NDJI85QSfJugm0zSdLQv7hSSzTHNjdD5a08 GkCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1751365987; x=1751970787; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=T2dW301DNNE9JzkR+6OYVpca6YVZm0Fl9xz3Jz5KOIM=; b=aFh6siK6Cq81Kp9w6sjhB/r5fcWyvsqBuI/2ajjPe1gZ6USxzwG7mnx+NVj+19Ibpr OjD77ROzR8OSK5hg1P8XIUjabj/lFodwR5NfKjDL+hVCqINpAVrA+PvC/KdnZ9b7/RG1 uexoWZiqvT6Kfav9GCygLl0hXWdmcX/H6CsLrJIZxq7QN4PO2cZipaJx3FEDs07KDRxq 7bnSrhkh3g6XtO8DHP0erXoZkNklpmfAASXCTJXhNpcAqulTvJ0c8SGIxOQ4WX41VLlu oulD6JBiGbceZNZP0q9pf1ruA5hrYa8EeF0vVvinhM/vBq3pkhVYUxwZeNemr0A8aLzj dYig== X-Gm-Message-State: AOJu0YzxpfiDL0NlUg9H08nkOQRu0vxhYiqOSXUt3Ykt/QaMKdKDfyKP A0cTNkI43J3J0ZFADVWhzUIXdQhlDhRheAXWxI+qcKK3kzOn3If86MmpkLACsp7zCCw= X-Gm-Gg: ASbGncsMJEC5985SFKOk3W7UJroae56Gc21VfrYgNgrx7YIGWWvWOc+GqV92UPOkzkr WbKPxK4q1ovj3nHOFK0InyJTbCfN6d8YumufkT0UqlNmjZd069dW/rfia7CL7T4heFpzHJLvuoL OJVWAWL2xQ9e28eA0+qh5WzpAvI4uSE66JAxL8LMzZ53HX2qDsU/1RXKS8KzzhP5m1oxP22UWFG Epkm+kEOGgyZWAJqnayC8qUTfo9FeFAu2TRQ+IUu728kVeBJL5AHdCcSNSeA1uqIJsV1voOrxrV kNIAZlydm37oinls6knUNelREXpk7/RkEcqz6OY2WMVsCFIM+8L6IoAWvpg5OO2oVUThUr9QlHE VWeemHrsDqXc9U0uz3apRFITLaPO4RvqIqc6RxvFUeUY= X-Google-Smtp-Source: AGHT+IHDXhLcT8STI8D9enWtVqQkCQzEOCY1+Zc330B1UUAnI+t+bPn+UXusdycT+u7l5hxAMEVZbQ== X-Received: by 2002:a17:903:2b05:b0:234:948b:91c7 with SMTP id d9443c01a7336-23ac4892231mr241723875ad.51.1751365987323; Tue, 01 Jul 2025 03:33:07 -0700 (PDT) From: William Kosasih To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell , William Kosasih Subject: [PATCH v2 06/12] target/arm: Fix VLDR_SG helper load alignment checks Date: Tue, 1 Jul 2025 20:01:53 +0930 Message-ID: <20250701103159.62661-7-kosasihwilliam4@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250701103159.62661-1-kosasihwilliam4@gmail.com> References: <20250701103159.62661-1-kosasihwilliam4@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=kosasihwilliam4@gmail.com; helo=mail-pl1-x630.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1751366079813116600 Content-Type: text/plain; charset="utf-8" This patch adds alignment checks in the load operations in the VLDR_SG instructions. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1154 Signed-off-by: William Kosasih --- target/arm/tcg/mve_helper.c | 41 ++++++++++++++++++++++--------------- 1 file changed, 24 insertions(+), 17 deletions(-) diff --git a/target/arm/tcg/mve_helper.c b/target/arm/tcg/mve_helper.c index a49b8842e3..f1e9c87e6a 100644 --- a/target/arm/tcg/mve_helper.c +++ b/target/arm/tcg/mve_helper.c @@ -247,13 +247,18 @@ DO_VSTR(vstrh_w, 2, w, 4, int32_t) uint16_t eci_mask =3D mve_eci_mask(env); \ unsigned e; \ uint32_t addr; \ - for (e =3D 0; e < 16 / ESIZE; e++, mask >>=3D ESIZE, eci_mask >>= =3D ESIZE) { \ + int mmu_idx =3D arm_to_core_mmu_idx(arm_mmu_idx(env)); \ + MemOpIdx oi =3D make_memop_idx(MFLAG(LDTYPE) | MO_ALIGN, mmu_idx);\ + for (e =3D 0; e < 16 / ESIZE; e++, mask >>=3D ESIZE, eci_mask >>= =3D ESIZE) {\ if (!(eci_mask & 1)) { \ continue; \ } \ addr =3D ADDRFN(base, m[H##ESIZE(e)]); \ d[H##ESIZE(e)] =3D (mask & 1) ? \ - cpu_##LDTYPE##_data_ra(env, addr, GETPC()) : 0; \ + SIGN_EXT(cpu_ld##LDTYPE##_mmu(env, addr, oi, GETPC()), \ + TYPE, \ + MSIZE(LDTYPE) * 8) \ + : 0; \ if (WB) { \ m[H##ESIZE(e)] =3D addr; \ } \ @@ -305,13 +310,15 @@ DO_VSTR(vstrh_w, 2, w, 4, int32_t) uint16_t eci_mask =3D mve_eci_mask(env); \ unsigned e; \ uint32_t addr; \ + int mmu_idx =3D arm_to_core_mmu_idx(arm_mmu_idx(env)); \ + MemOpIdx oi =3D make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \ for (e =3D 0; e < 16 / 4; e++, mask >>=3D 4, eci_mask >>=3D 4) { = \ if (!(eci_mask & 1)) { \ continue; \ } \ addr =3D ADDRFN(base, m[H4(e & ~1)]); \ addr +=3D 4 * (e & 1); \ - d[H4(e)] =3D (mask & 1) ? cpu_ldl_data_ra(env, addr, GETPC()) = : 0; \ + d[H4(e)] =3D (mask & 1) ? cpu_ldl_mmu(env, addr, oi, GETPC()) = : 0;\ if (WB && (e & 1)) { \ m[H4(e & ~1)] =3D addr - 4; \ } \ @@ -350,22 +357,22 @@ DO_VSTR(vstrh_w, 2, w, 4, int32_t) #define ADDR_ADD_OSW(BASE, OFFSET) ((BASE) + ((OFFSET) << 2)) #define ADDR_ADD_OSD(BASE, OFFSET) ((BASE) + ((OFFSET) << 3)) =20 -DO_VLDR_SG(vldrb_sg_sh, ldsb, 2, int16_t, uint16_t, ADDR_ADD, false) -DO_VLDR_SG(vldrb_sg_sw, ldsb, 4, int32_t, uint32_t, ADDR_ADD, false) -DO_VLDR_SG(vldrh_sg_sw, ldsw, 4, int32_t, uint32_t, ADDR_ADD, false) +DO_VLDR_SG(vldrb_sg_sh, b, 2, int16_t, uint16_t, ADDR_ADD, false) +DO_VLDR_SG(vldrb_sg_sw, b, 4, int32_t, uint32_t, ADDR_ADD, false) +DO_VLDR_SG(vldrh_sg_sw, w, 4, int32_t, uint32_t, ADDR_ADD, false) =20 -DO_VLDR_SG(vldrb_sg_ub, ldub, 1, uint8_t, uint8_t, ADDR_ADD, false) -DO_VLDR_SG(vldrb_sg_uh, ldub, 2, uint16_t, uint16_t, ADDR_ADD, false) -DO_VLDR_SG(vldrb_sg_uw, ldub, 4, uint32_t, uint32_t, ADDR_ADD, false) -DO_VLDR_SG(vldrh_sg_uh, lduw, 2, uint16_t, uint16_t, ADDR_ADD, false) -DO_VLDR_SG(vldrh_sg_uw, lduw, 4, uint32_t, uint32_t, ADDR_ADD, false) -DO_VLDR_SG(vldrw_sg_uw, ldl, 4, uint32_t, uint32_t, ADDR_ADD, false) +DO_VLDR_SG(vldrb_sg_ub, b, 1, uint8_t, uint8_t, ADDR_ADD, false) +DO_VLDR_SG(vldrb_sg_uh, b, 2, uint16_t, uint16_t, ADDR_ADD, false) +DO_VLDR_SG(vldrb_sg_uw, b, 4, uint32_t, uint32_t, ADDR_ADD, false) +DO_VLDR_SG(vldrh_sg_uh, w, 2, uint16_t, uint16_t, ADDR_ADD, false) +DO_VLDR_SG(vldrh_sg_uw, w, 4, uint32_t, uint32_t, ADDR_ADD, false) +DO_VLDR_SG(vldrw_sg_uw, l, 4, uint32_t, uint32_t, ADDR_ADD, false) DO_VLDR64_SG(vldrd_sg_ud, ADDR_ADD, false) =20 -DO_VLDR_SG(vldrh_sg_os_sw, ldsw, 4, int32_t, uint32_t, ADDR_ADD_OSH, false) -DO_VLDR_SG(vldrh_sg_os_uh, lduw, 2, uint16_t, uint16_t, ADDR_ADD_OSH, fals= e) -DO_VLDR_SG(vldrh_sg_os_uw, lduw, 4, uint32_t, uint32_t, ADDR_ADD_OSH, fals= e) -DO_VLDR_SG(vldrw_sg_os_uw, ldl, 4, uint32_t, uint32_t, ADDR_ADD_OSW, false) +DO_VLDR_SG(vldrh_sg_os_sw, w, 4, int32_t, uint32_t, ADDR_ADD_OSH, false) +DO_VLDR_SG(vldrh_sg_os_uh, w, 2, uint16_t, uint16_t, ADDR_ADD_OSH, false) +DO_VLDR_SG(vldrh_sg_os_uw, w, 4, uint32_t, uint32_t, ADDR_ADD_OSH, false) +DO_VLDR_SG(vldrw_sg_os_uw, l, 4, uint32_t, uint32_t, ADDR_ADD_OSW, false) DO_VLDR64_SG(vldrd_sg_os_ud, ADDR_ADD_OSD, false) =20 DO_VSTR_SG(vstrb_sg_ub, stb, 1, uint8_t, ADDR_ADD, false) @@ -381,7 +388,7 @@ DO_VSTR_SG(vstrh_sg_os_uw, stw, 4, uint32_t, ADDR_ADD_O= SH, false) DO_VSTR_SG(vstrw_sg_os_uw, stl, 4, uint32_t, ADDR_ADD_OSW, false) DO_VSTR64_SG(vstrd_sg_os_ud, ADDR_ADD_OSD, false) =20 -DO_VLDR_SG(vldrw_sg_wb_uw, ldl, 4, uint32_t, uint32_t, ADDR_ADD, true) +DO_VLDR_SG(vldrw_sg_wb_uw, l, 4, uint32_t, uint32_t, ADDR_ADD, true) DO_VLDR64_SG(vldrd_sg_wb_ud, ADDR_ADD, true) DO_VSTR_SG(vstrw_sg_wb_uw, stl, 4, uint32_t, ADDR_ADD, true) DO_VSTR64_SG(vstrd_sg_wb_ud, ADDR_ADD, true) --=20 2.48.1