From nobody Sat Nov 15 16:31:03 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1750404197; cv=none; d=zohomail.com; s=zohoarc; b=FdHd/hSEsgp/0JJq/DmhpvYvvig6HJtKi972MXm5/IydDVlM2BW+oZz3XSdp2rbeVA77lzsX2XvJTPByELHIqhZmin4QdO9JekMaXj7b4dzPbFx9Zp0IXtcaN7jvDsRXp4cAcc3vmTsupro8C8e48KkpVvp1pWyXlIcv8qwCNxQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1750404197; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=sl7pxFrmV8fpsaqElOVIy7ICe8FJIx0x2cFyxrnZtOk=; b=ODM3jcqUt0wJBgg2Dp6VTWzAlbT5ymmuSKzk19fN6ovUyo2akgkgihKd/IBzSainljJoPkNXs766CLV3OX6HfqwyGH5yAWYWtG2ff5QUwIwr05iDirSMiT5U7YuqaKfn6/tNDWDf8J1HnuCJ68OKXero0qYW2GlVFd7LdJ2Z5ho= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1750404197433105.94783310495654; Fri, 20 Jun 2025 00:23:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uSW5N-0004dx-1x; Fri, 20 Jun 2025 03:22:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uSW5L-0004dM-9Q for qemu-devel@nongnu.org; Fri, 20 Jun 2025 03:22:51 -0400 Received: from mgamail.intel.com ([198.175.65.21]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uSW5I-0008IS-9b for qemu-devel@nongnu.org; Fri, 20 Jun 2025 03:22:51 -0400 Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2025 00:22:48 -0700 Received: from spr-s2600bt.bj.intel.com ([10.240.192.127]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2025 00:22:43 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1750404168; x=1781940168; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eXIY1EEbF1RfbgIJIQePt6T9VT6r816CRDXV+6DEzYs=; b=ZF7syC4SfZ2ibu4iRVlVBsATnMiMWPCTgWHOkoiZKStfTycCIvlq4bls aHevGhPqsqy/Yi3mdG41xcQzArMqHH8L7OURKKQpVj/XMLm3yZ+ednz8+ lVR9HGZa7VZfolqnAGWOTs5uCZk7g0VcdJEpDX8j4zi7fToM9QKdy6tHd nqpYsffEaMPN7j5v2v3+Ozi8IHiweoIQxSIJnfweOqIggWsqqUAqVXDWs 7kbfVreZIu9IB2atYcwKPlakZ2o2oKXzwUzc+EU9KTo1bCrGobvEJ9kQe vmHMmJMPXv7BTAcdD6P6WO9ah4JJQPsO7z4Ad4mwayTPAwfXAvwJJzLM5 Q==; X-CSE-ConnectionGUID: t9Jz5NaTQO2UN/BtNp4Rlg== X-CSE-MsgGUID: LSYsXCPcR96zqI+gJJCpQw== X-IronPort-AV: E=McAfee;i="6800,10657,11469"; a="52532366" X-IronPort-AV: E=Sophos;i="6.16,250,1744095600"; d="scan'208";a="52532366" X-CSE-ConnectionGUID: BIL3ePNtS0aqS3G74NoEhQ== X-CSE-MsgGUID: CEXQSQkZSzG+Z1nnzxt69g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,250,1744095600"; d="scan'208";a="181863140" From: Zhenzhong Duan To: qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, jasowang@redhat.com, peterx@redhat.com, ddutile@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, shameerali.kolothum.thodi@huawei.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Zhenzhong Duan , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PATCH v2 08/19] intel_iommu: Fail passthrough device under PCI bridge if x-flts=on Date: Fri, 20 Jun 2025 15:18:02 +0800 Message-Id: <20250620071813.55571-9-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250620071813.55571-1-zhenzhong.duan@intel.com> References: <20250620071813.55571-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.21; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -62 X-Spam_score: -6.3 X-Spam_bar: ------ X-Spam_report: (-6.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.897, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1750404199001116600 Content-Type: text/plain; charset="utf-8" Currently we don't support nested translation for passthrough device with emulated device under same PCI bridge. Reason is for emulated devices, AS should switch to iommu MR, while for passthrough devices, it needs the AS stick with the system MR hence be able to keep the VFIO container IOAS as a GPA IOAS. To support this, let AS switch to iommu MR and have a separate GPA IOAS is needed, but that brings a new memory listener which duplicates with VFIO memory listener. For trade off, we choose to not support this special scenario because PCIE bridge is more popular than PCI bridge now. Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 1c79efc1cb..9d4adc9458 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -4330,9 +4330,10 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s,= PCIBus *bus, return vtd_dev_as; } =20 -static bool vtd_check_hiod(IntelIOMMUState *s, HostIOMMUDevice *hiod, +static bool vtd_check_hiod(IntelIOMMUState *s, VTDHostIOMMUDevice *vtd_hio= d, Error **errp) { + HostIOMMUDevice *hiod =3D vtd_hiod->hiod; HostIOMMUDeviceClass *hiodc =3D HOST_IOMMU_DEVICE_GET_CLASS(hiod); int ret; =20 @@ -4359,6 +4360,8 @@ static bool vtd_check_hiod(IntelIOMMUState *s, HostIO= MMUDevice *hiod, #ifdef CONFIG_IOMMUFD struct HostIOMMUDeviceCaps *caps =3D &hiod->caps; struct iommu_hw_info_vtd *vtd =3D &caps->vendor_caps.vtd; + PCIBus *bus =3D vtd_hiod->bus; + PCIDevice *pdev =3D pci_find_device(bus, pci_bus_num(bus), vtd_hiod->d= evfn); =20 /* Remaining checks are all stage-1 translation specific */ if (!object_dynamic_cast(OBJECT(hiod), TYPE_HOST_IOMMU_DEVICE_IOMMUFD)= ) { @@ -4381,6 +4384,12 @@ static bool vtd_check_hiod(IntelIOMMUState *s, HostI= OMMUDevice *hiod, error_setg(errp, "Stage-1 1GB huge page is unsupported by host IOM= MU"); return false; } + + if (pci_device_get_iommu_bus_devfn(pdev, &bus, NULL, NULL)) { + error_setg(errp, "Host device under PCI bridge is unsupported " + "when x-flts=3Don"); + return false; + } #endif =20 error_setg(errp, "host device is uncompatible with stage-1 translation= "); @@ -4414,7 +4423,7 @@ static bool vtd_dev_set_iommu_device(PCIBus *bus, voi= d *opaque, int devfn, vtd_hiod->iommu_state =3D s; vtd_hiod->hiod =3D hiod; =20 - if (!vtd_check_hiod(s, hiod, errp)) { + if (!vtd_check_hiod(s, vtd_hiod, errp)) { g_free(vtd_hiod); vtd_iommu_unlock(s); return false; --=20 2.34.1