From nobody Tue Feb 10 17:14:29 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1749472161352507.3760028906328; Mon, 9 Jun 2025 05:29:21 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uOaPT-0005FZ-6J; Mon, 09 Jun 2025 07:11:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uOaPL-0005CX-88 for qemu-devel@nongnu.org; Mon, 09 Jun 2025 07:11:15 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uOaPH-00075R-82 for qemu-devel@nongnu.org; Mon, 09 Jun 2025 07:11:15 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8BxnmtIwUZoT24RAQ--.3265S3; Mon, 09 Jun 2025 19:11:04 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowMAxzxtFwUZoiU0SAQ--.4222S6; Mon, 09 Jun 2025 19:11:03 +0800 (CST) From: Song Gao To: maobibo@loongson.cn Cc: qemu-devel@nongnu.org, philmd@linaro.org, jiaxun.yang@flygoat.com Subject: [PATCH 04/10] target/loongarch: add msg interrupt CSR registers Date: Mon, 9 Jun 2025 18:48:27 +0800 Message-Id: <20250609104833.839811-5-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20250609104833.839811-1-gaosong@loongson.cn> References: <20250609104833.839811-1-gaosong@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMAxzxtFwUZoiU0SAQ--.4222S6 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1749472163922116600 Content-Type: text/plain; charset="utf-8" include CSR_MSGIS0-3, CSR_MSGIR and CSR_MSGIE. Signed-off-by: Song Gao --- target/loongarch/cpu.c | 7 +++++++ target/loongarch/cpu.h | 10 ++++++++++ target/loongarch/machine.c | 5 +++++ 3 files changed, 22 insertions(+) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index abad84c054..bde9f917fc 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -523,6 +523,13 @@ static void loongarch_la464_initfn(Object *obj) env->CSR_PRCFG3 =3D FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_WAYS,= 7); env->CSR_PRCFG3 =3D FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_SETS,= 8); =20 + env->CSR_MSGIS[0] =3D 0; + env->CSR_MSGIS[1] =3D 0; + env->CSR_MSGIS[2] =3D 0; + env->CSR_MSGIS[3] =3D 0; + env->CSR_MSGIR =3D 0; + env->CSR_MSGIE =3D 0; + loongarch_la464_init_csr(obj); loongarch_cpu_post_init(obj); } diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 7cceec1204..a1918a85da 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -256,6 +256,12 @@ FIELD(TLB_MISC, ASID, 1, 10) FIELD(TLB_MISC, VPPN, 13, 35) FIELD(TLB_MISC, PS, 48, 6) =20 +/*Msg interrupt registers */ +FIELD(CSR_MSGIS, IS, 0, 63) +FIELD(CSR_MSGIR, INTNUM, 0, 8) +FIELD(CSR_MSGIR, ACTIVE, 31, 1) +FIELD(CSR_MSGIE, PT, 0, 8) + #define LSX_LEN (128) #define LASX_LEN (256) =20 @@ -373,6 +379,10 @@ typedef struct CPUArchState { uint64_t CSR_DBG; uint64_t CSR_DERA; uint64_t CSR_DSAVE; + /* Msg interrupt registers */ + uint64_t CSR_MSGIS[4]; + uint64_t CSR_MSGIR; + uint64_t CSR_MSGIE; struct { uint64_t guest_addr; } stealtime; diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c index 4e70f5c879..7d5ee34f90 100644 --- a/target/loongarch/machine.c +++ b/target/loongarch/machine.c @@ -231,6 +231,11 @@ const VMStateDescription vmstate_loongarch_cpu =3D { VMSTATE_UINT64(env.CSR_DERA, LoongArchCPU), VMSTATE_UINT64(env.CSR_DSAVE, LoongArchCPU), =20 + /* Msg interrupt CSRs */ + VMSTATE_UINT64_ARRAY(env.CSR_MSGIS, LoongArchCPU, 4), + VMSTATE_UINT64(env.CSR_MSGIR, LoongArchCPU), + VMSTATE_UINT64(env.CSR_MSGIE, LoongArchCPU), + VMSTATE_UINT64(kvm_state_counter, LoongArchCPU), /* PV steal time */ VMSTATE_UINT64(env.stealtime.guest_addr, LoongArchCPU), --=20 2.34.1