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Mon, 02 Jun 2025 12:57:10 -0700 (PDT) From: Rowan Hart To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Mahmoud Mandour , Zhao Liu , Alexandre Iooss , Pierrick Bouvier , Richard Henderson , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Yanan Wang , Rowan Hart Subject: [PATCH v7 3/9] plugins: Add enforcement of QEMU_PLUGIN_CB flags in register R/W callbacks Date: Mon, 2 Jun 2025 12:57:00 -0700 Message-ID: <20250602195706.1043662-4-rowanbhart@gmail.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250602195706.1043662-1-rowanbhart@gmail.com> References: <20250602195706.1043662-1-rowanbhart@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=rowanbhart@gmail.com; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1748894313353116600 Content-Type: text/plain; charset="utf-8" This patch adds functionality to enforce the requested QEMU_PLUGIN_CB_ flags level passed when registering a callback function using the plugins API. Each time a callback is about to be invoked, a thread-local variable will be updated with the level that callback requested. Then, called API functions (in particular, the register read and write API) will call qemu_plugin_get_cb_flags() to check the level is at least the level they require. Signed-off-by: Rowan Hart --- accel/tcg/plugin-gen.c | 30 ++++++++++++++++++++++++++++++ include/hw/core/cpu.h | 1 + include/qemu/plugin.h | 4 ++++ include/qemu/qemu-plugin.h | 3 --- plugins/api.c | 8 ++++++++ plugins/core.c | 32 ++++++++++++++++++++++++++------ 6 files changed, 69 insertions(+), 9 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index c1da753894..9920381a84 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -117,10 +117,20 @@ static TCGv_i32 gen_cpu_index(void) static void gen_udata_cb(struct qemu_plugin_regular_cb *cb) { TCGv_i32 cpu_index =3D gen_cpu_index(); + enum qemu_plugin_cb_flags cb_flags =3D + tcg_call_to_qemu_plugin_cb_flags(cb->info->flags); + TCGv_i32 flags =3D tcg_constant_i32(cb_flags); + TCGv_i32 clear_flags =3D tcg_constant_i32(QEMU_PLUGIN_CB_NO_REGS); + tcg_gen_st_i32(flags, tcg_env, + offsetof(CPUState, neg.plugin_cb_flags) - sizeof(CPUState)); tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); + tcg_gen_st_i32(clear_flags, tcg_env, + offsetof(CPUState, neg.plugin_cb_flags) - sizeof(CPUState)); tcg_temp_free_i32(cpu_index); + tcg_temp_free_i32(flags); + tcg_temp_free_i32(clear_flags); } =20 static TCGv_ptr gen_plugin_u64_ptr(qemu_plugin_u64 entry) @@ -173,10 +183,20 @@ static void gen_udata_cond_cb(struct qemu_plugin_cond= itional_cb *cb) tcg_gen_ld_i64(val, ptr, 0); tcg_gen_brcondi_i64(cond, val, cb->imm, after_cb); TCGv_i32 cpu_index =3D gen_cpu_index(); + enum qemu_plugin_cb_flags cb_flags =3D + tcg_call_to_qemu_plugin_cb_flags(cb->info->flags); + TCGv_i32 flags =3D tcg_constant_i32(cb_flags); + TCGv_i32 clear_flags =3D tcg_constant_i32(QEMU_PLUGIN_CB_NO_REGS); + tcg_gen_st_i32(flags, tcg_env, + offsetof(CPUState, neg.plugin_cb_flags) - sizeof(CPUState)); tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); + tcg_gen_st_i32(clear_flags, tcg_env, + offsetof(CPUState, neg.plugin_cb_flags) - sizeof(CPUState)); tcg_temp_free_i32(cpu_index); + tcg_temp_free_i32(flags); + tcg_temp_free_i32(clear_flags); gen_set_label(after_cb); =20 tcg_temp_free_i64(val); @@ -210,12 +230,22 @@ static void gen_mem_cb(struct qemu_plugin_regular_cb = *cb, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { TCGv_i32 cpu_index =3D gen_cpu_index(); + enum qemu_plugin_cb_flags cb_flags =3D + tcg_call_to_qemu_plugin_cb_flags(cb->info->flags); + TCGv_i32 flags =3D tcg_constant_i32(cb_flags); + TCGv_i32 clear_flags =3D tcg_constant_i32(QEMU_PLUGIN_CB_NO_REGS); + tcg_gen_st_i32(flags, tcg_env, + offsetof(CPUState, neg.plugin_cb_flags) - sizeof(CPUState)); tcg_gen_call4(cb->f.vcpu_mem, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_i32_temp(tcg_constant_i32(meminfo)), tcgv_i64_temp(addr), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); + tcg_gen_st_i32(clear_flags, tcg_env, + offsetof(CPUState, neg.plugin_cb_flags) - sizeof(CPUState)); tcg_temp_free_i32(cpu_index); + tcg_temp_free_i32(flags); + tcg_temp_free_i32(clear_flags); } =20 static void inject_cb(struct qemu_plugin_dyn_cb *cb) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 1e87f7d393..d3cc9a5224 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -368,6 +368,7 @@ typedef struct CPUNegativeOffsetState { GArray *plugin_mem_cbs; uint64_t plugin_mem_value_low; uint64_t plugin_mem_value_high; + int32_t plugin_cb_flags; #endif IcountDecr icount_decr; bool can_do_io; diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 9726a9ebf3..2fef2e7d71 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -209,6 +209,10 @@ void qemu_plugin_user_prefork_lock(void); */ void qemu_plugin_user_postfork(bool is_child); =20 +enum qemu_plugin_cb_flags tcg_call_to_qemu_plugin_cb_flags(int flags); + +enum qemu_plugin_cb_flags qemu_plugin_get_cb_flags(void); + #else /* !CONFIG_PLUGIN */ =20 static inline void qemu_plugin_add_opts(void) diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index cfe1692ecb..120fb626a6 100644 --- a/include/qemu/qemu-plugin.h +++ b/include/qemu/qemu-plugin.h @@ -254,9 +254,6 @@ typedef struct { * @QEMU_PLUGIN_CB_NO_REGS: callback does not access the CPU's regs * @QEMU_PLUGIN_CB_R_REGS: callback reads the CPU's regs * @QEMU_PLUGIN_CB_RW_REGS: callback reads and writes the CPU's regs - * - * Note: currently QEMU_PLUGIN_CB_RW_REGS is unused, plugins cannot change - * system register state. */ enum qemu_plugin_cb_flags { QEMU_PLUGIN_CB_NO_REGS, diff --git a/plugins/api.c b/plugins/api.c index 3a7add50d2..16141f5c25 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -437,6 +437,10 @@ int qemu_plugin_read_register(struct qemu_plugin_regis= ter *reg, GByteArray *buf) { g_assert(current_cpu); =20 + if (qemu_plugin_get_cb_flags() =3D=3D QEMU_PLUGIN_CB_NO_REGS) { + return -1; + } + return gdb_read_register(current_cpu, buf, GPOINTER_TO_INT(reg) - 1); } =20 @@ -445,6 +449,10 @@ int qemu_plugin_write_register(struct qemu_plugin_regi= ster *reg, { g_assert(current_cpu); =20 + if (buf->len =3D=3D 0 || qemu_plugin_get_cb_flags() !=3D QEMU_PLUGIN_C= B_RW_REGS) { + return 0; + } + return gdb_write_register(current_cpu, buf->data, GPOINTER_TO_INT(reg)= - 1); } =20 diff --git a/plugins/core.c b/plugins/core.c index eb9281fe54..34bddb6c1c 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -364,14 +364,15 @@ void plugin_register_dyn_cb__udata(GArray **arr, enum qemu_plugin_cb_flags flags, void *udata) { - static TCGHelperInfo info[3] =3D { + static TCGHelperInfo info[4] =3D { [QEMU_PLUGIN_CB_NO_REGS].flags =3D TCG_CALL_NO_RWG, [QEMU_PLUGIN_CB_R_REGS].flags =3D TCG_CALL_NO_WG, + [QEMU_PLUGIN_CB_RW_REGS].flags =3D 0, /* * Match qemu_plugin_vcpu_udata_cb_t: * void (*)(uint32_t, void *) */ - [0 ... 2].typemask =3D (dh_typemask(void, 0) | + [0 ... 3].typemask =3D (dh_typemask(void, 0) | dh_typemask(i32, 1) | dh_typemask(ptr, 2)) }; @@ -393,14 +394,15 @@ void plugin_register_dyn_cond_cb__udata(GArray **arr, uint64_t imm, void *udata) { - static TCGHelperInfo info[3] =3D { + static TCGHelperInfo info[4] =3D { [QEMU_PLUGIN_CB_NO_REGS].flags =3D TCG_CALL_NO_RWG, [QEMU_PLUGIN_CB_R_REGS].flags =3D TCG_CALL_NO_WG, + [QEMU_PLUGIN_CB_RW_REGS].flags =3D 0, /* * Match qemu_plugin_vcpu_udata_cb_t: * void (*)(uint32_t, void *) */ - [0 ... 2].typemask =3D (dh_typemask(void, 0) | + [0 ... 3].typemask =3D (dh_typemask(void, 0) | dh_typemask(i32, 1) | dh_typemask(ptr, 2)) }; @@ -431,14 +433,15 @@ void plugin_register_vcpu_mem_cb(GArray **arr, !__builtin_types_compatible_p(qemu_plugin_meminfo_t, uint32_t) && !__builtin_types_compatible_p(qemu_plugin_meminfo_t, int32_t)); =20 - static TCGHelperInfo info[3] =3D { + static TCGHelperInfo info[4] =3D { [QEMU_PLUGIN_CB_NO_REGS].flags =3D TCG_CALL_NO_RWG, [QEMU_PLUGIN_CB_R_REGS].flags =3D TCG_CALL_NO_WG, + [QEMU_PLUGIN_CB_RW_REGS].flags =3D 0, /* * Match qemu_plugin_vcpu_mem_cb_t: * void (*)(uint32_t, qemu_plugin_meminfo_t, uint64_t, void *) */ - [0 ... 2].typemask =3D + [0 ... 3].typemask =3D (dh_typemask(void, 0) | dh_typemask(i32, 1) | (__builtin_types_compatible_p(qemu_plugin_meminfo_t, uint32_t) @@ -760,3 +763,20 @@ void plugin_scoreboard_free(struct qemu_plugin_scorebo= ard *score) g_array_free(score->data, TRUE); g_free(score); } + +enum qemu_plugin_cb_flags tcg_call_to_qemu_plugin_cb_flags(int flags) +{ + if (flags & TCG_CALL_NO_RWG) { + return QEMU_PLUGIN_CB_NO_REGS; + } else if (flags & TCG_CALL_NO_WG) { + return QEMU_PLUGIN_CB_R_REGS; + } else { + return QEMU_PLUGIN_CB_RW_REGS; + } +} + +enum qemu_plugin_cb_flags qemu_plugin_get_cb_flags(void) +{ + assert(current_cpu); + return current_cpu->neg.plugin_cb_flags; +} --=20 2.49.0