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Fri, 30 May 2025 00:15:55 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHsZoDKgtzUm8C7Tfse6/LL2p0AjLUyK/LbuqassuBfr8GMu4IO7xtN0DDu9Rqp1OeueY/o0Q== X-Received: by 2002:a17:907:3d8f:b0:ad5:5293:f236 with SMTP id a640c23a62f3a-adb32248cdamr219518866b.3.1748589355180; Fri, 30 May 2025 00:15:55 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Babu Moger , Maksim Davydov , Zhao Liu Subject: [PULL 73/77] target/i386: Update EPYC-Milan CPU model for Cache property, RAS, SVM feature bits Date: Fri, 30 May 2025 09:12:43 +0200 Message-ID: <20250530071250.2050910-74-pbonzini@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250530071250.2050910-1-pbonzini@redhat.com> References: <20250530071250.2050910-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -49 X-Spam_score: -5.0 X-Spam_bar: ----- X-Spam_report: (-5.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-2.902, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1748589770448116600 Content-Type: text/plain; charset="utf-8" From: Babu Moger Found that some of the cache properties are not set correctly for EPYC mode= ls. l1d_cache.no_invd_sharing should not be true. l1i_cache.no_invd_sharing should not be true. L2.self_init should be true. L2.inclusive should be true. L3.inclusive should not be true. L3.no_invd_sharing should be true. Fix these cache properties. Also add the missing RAS and SVM features bits on AMD EPYC-Milan model. The SVM feature bits are used in nested guests. succor : Software uncorrectable error containment and recovery cap= ability. overflow-recov : MCA overflow recovery support. lbrv : LBR virtualization tsc-scale : MSR based TSC rate control vmcb-clean : VMCB clean bits flushbyasid : Flush by ASID pause-filter : Pause intercept filter pfthreshold : PAUSE filter threshold v-vmsave-vmload : Virtualized VMLOAD and VMSAVE vgif : Virtualized GIF Signed-off-by: Babu Moger Reviewed-by: Maksim Davydov Reviewed-by: Zhao Liu Link: https://lore.kernel.org/r/c619c0e09a9d5d496819ed48d69181d65f416891.17= 46734284.git.babu.moger@amd.com Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 5b5324a35cb..d01a808e3a3 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2535,6 +2535,60 @@ static const CPUCaches epyc_milan_v2_cache_info =3D { }, }; =20 +static const CPUCaches epyc_milan_v3_cache_info =3D { + .l1d_cache =3D &(CPUCacheInfo) { + .type =3D DATA_CACHE, + .level =3D 1, + .size =3D 32 * KiB, + .line_size =3D 64, + .associativity =3D 8, + .partitions =3D 1, + .sets =3D 64, + .lines_per_tag =3D 1, + .self_init =3D true, + .share_level =3D CPU_TOPOLOGY_LEVEL_CORE, + }, + .l1i_cache =3D &(CPUCacheInfo) { + .type =3D INSTRUCTION_CACHE, + .level =3D 1, + .size =3D 32 * KiB, + .line_size =3D 64, + .associativity =3D 8, + .partitions =3D 1, + .sets =3D 64, + .lines_per_tag =3D 1, + .self_init =3D true, + .share_level =3D CPU_TOPOLOGY_LEVEL_CORE, + }, + .l2_cache =3D &(CPUCacheInfo) { + .type =3D UNIFIED_CACHE, + .level =3D 2, + .size =3D 512 * KiB, + .line_size =3D 64, + .associativity =3D 8, + .partitions =3D 1, + .sets =3D 1024, + .lines_per_tag =3D 1, + .self_init =3D true, + .inclusive =3D true, + .share_level =3D CPU_TOPOLOGY_LEVEL_CORE, + }, + .l3_cache =3D &(CPUCacheInfo) { + .type =3D UNIFIED_CACHE, + .level =3D 3, + .size =3D 32 * MiB, + .line_size =3D 64, + .associativity =3D 16, + .partitions =3D 1, + .sets =3D 32768, + .lines_per_tag =3D 1, + .self_init =3D true, + .no_invd_sharing =3D true, + .complex_indexing =3D false, + .share_level =3D CPU_TOPOLOGY_LEVEL_DIE, + }, +}; + static const CPUCaches epyc_genoa_cache_info =3D { .l1d_cache =3D &(CPUCacheInfo) { .type =3D DATA_CACHE, @@ -5597,6 +5651,25 @@ static const X86CPUDefinition builtin_x86_defs[] =3D= { }, .cache_info =3D &epyc_milan_v2_cache_info }, + { + .version =3D 3, + .props =3D (PropValue[]) { + { "overflow-recov", "on" }, + { "succor", "on" }, + { "lbrv", "on" }, + { "tsc-scale", "on" }, + { "vmcb-clean", "on" }, + { "flushbyasid", "on" }, + { "pause-filter", "on" }, + { "pfthreshold", "on" }, + { "v-vmsave-vmload", "on" }, + { "vgif", "on" }, + { "model-id", + "AMD EPYC-Milan-v3 Processor" }, + { /* end of list */ } + }, + .cache_info =3D &epyc_milan_v3_cache_info + }, { /* end of list */ } } }, --=20 2.49.0