From nobody Sat Nov 15 22:35:31 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1747740965; cv=none; d=zohomail.com; s=zohoarc; b=iNsYYPKqphLdVmjgSuagUvA9WqjLEWO9EjJMarYBVNpMnIs6uYnyAZhrhBRMV2MA+J66K30v8Q5SrYdmjiL3CQLRNzBH9yPkd1qE8GMWNYbecIvsKt9MpTWu6u+eCkrWCQMxX8JCbNJeAfQI75GnFFxgTnO9HsgnvUegQ1f4osY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1747740965; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=VawFODYMqVWNXB/5KDPoYM54x32acukwfl5QJH9jyPg=; b=N3wOhJNHAyIOjc9BLdtubDHQoDW7cpjDGpl+PE2saoT2FXA16Xr7f03USgwzwrApLFyEokWyqKDLDXJ6l/hVQcSol17ALWFmzCMKVP75mOcK2r9ASz9pZUoSpsKCFybcrlQwMRPd+s6P+CI22o4W6Su9+WnPqaBUns9jbx2Ltw8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1747740965677190.9810058956923; Tue, 20 May 2025 04:36:05 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uHLDF-00021e-Cf; Tue, 20 May 2025 07:32:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uHLDA-0001pW-F2 for qemu-devel@nongnu.org; Tue, 20 May 2025 07:32:45 -0400 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uHLD4-0001Nm-Lm for qemu-devel@nongnu.org; Tue, 20 May 2025 07:32:44 -0400 Received: from DESKTOP-TUU1E5L.fritz.box (unknown [172.201.77.43]) by linux.microsoft.com (Postfix) with ESMTPSA id EFABA206832D; Tue, 20 May 2025 04:32:24 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com EFABA206832D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1747740747; bh=VawFODYMqVWNXB/5KDPoYM54x32acukwfl5QJH9jyPg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BRjwQd4NqS06S9Z2Y+5/FuC769ayXYf4mVDN4Xmv4BUCfywREIJUTkxcGrN7b3wGn 1WZdAN5952WlXi4gm9INzL02PIqe/IyUQlhMVu2Wrvz749mgmPKHSyoMayTkQlhRWX rwYY5Q6iURiWBfEAyUFSpqN5uWLC0pDgs6wHwafg= From: Magnus Kulke To: magnuskulke@microsoft.com, qemu-devel@nongnu.org, liuwe@microsoft.com Cc: Paolo Bonzini , "Michael S. Tsirkin" , Wei Liu , Phil Dennis-Jordan , Roman Bolshakov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Zhao Liu , Richard Henderson , Cameron Esfahani , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= Subject: [RFC PATCH 23/25] target/i386/mshv: Write MSRs to the hypervisor Date: Tue, 20 May 2025 13:30:16 +0200 Message-Id: <20250520113018.49569-24-magnuskulke@linux.microsoft.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250520113018.49569-1-magnuskulke@linux.microsoft.com> References: <20250520113018.49569-1-magnuskulke@linux.microsoft.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=13.77.154.182; envelope-from=magnuskulke@linux.microsoft.com; helo=linux.microsoft.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_PASS=-0.001, T_SPF_HELO_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linux.microsoft.com) X-ZM-MESSAGEID: 1747740967208116600 Content-Type: text/plain; charset="utf-8" Push current model-specific register (MSR) values to MSHV's vCPUs as part of setting state to the hypervisor. Signed-off-by: Magnus Kulke --- target/i386/mshv/mshv-cpu.c | 70 +++++++++++++++++++++++++++++++++++-- 1 file changed, 68 insertions(+), 2 deletions(-) diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c index a7ee5ebb2a..fdc7e5e019 100644 --- a/target/i386/mshv/mshv-cpu.c +++ b/target/i386/mshv/mshv-cpu.c @@ -118,6 +118,8 @@ static u_int64_t MTRR_MEM_TYPE_WB =3D 0x6; static u_int32_t APIC_MODE_NMI =3D 0x4; static u_int32_t APIC_MODE_EXTINT =3D 0x7; =20 +#define MSR_ENTRIES_COUNT 64 + static void add_cpu_guard(int cpu_fd) { QemuMutex *guard; @@ -941,6 +943,65 @@ static int put_regs(const CPUState *cpu) return 0; } =20 +struct MsrPair { + uint32_t index; + uint64_t value; +}; + +static int put_msrs(const CPUState *cpu) +{ + int ret =3D 0; + X86CPU *x86cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86cpu->env; + MshvMsrEntries *msrs =3D g_malloc0(sizeof(MshvMsrEntries)); + + struct MsrPair pairs[] =3D { + { MSR_IA32_SYSENTER_CS, env->sysenter_cs }, + { MSR_IA32_SYSENTER_ESP, env->sysenter_esp }, + { MSR_IA32_SYSENTER_EIP, env->sysenter_eip }, + { MSR_EFER, env->efer }, + { MSR_PAT, env->pat }, + { MSR_STAR, env->star }, + { MSR_CSTAR, env->cstar }, + { MSR_LSTAR, env->lstar }, + { MSR_KERNELGSBASE, env->kernelgsbase }, + { MSR_FMASK, env->fmask }, + { MSR_MTRRdefType, env->mtrr_deftype }, + { MSR_VM_HSAVE_PA, env->vm_hsave }, + { MSR_SMI_COUNT, env->msr_smi_count }, + { MSR_IA32_PKRS, env->pkrs }, + { MSR_IA32_BNDCFGS, env->msr_bndcfgs }, + { MSR_IA32_XSS, env->xss }, + { MSR_IA32_UMWAIT_CONTROL, env->umwait }, + { MSR_IA32_TSX_CTRL, env->tsx_ctrl }, + { MSR_AMD64_TSC_RATIO, env->amd_tsc_scale_msr }, + { MSR_TSC_AUX, env->tsc_aux }, + { MSR_TSC_ADJUST, env->tsc_adjust }, + { MSR_IA32_SMBASE, env->smbase }, + { MSR_IA32_SPEC_CTRL, env->spec_ctrl }, + { MSR_VIRT_SSBD, env->virt_ssbd }, + }; + + if (ARRAY_SIZE(pairs) > MSR_ENTRIES_COUNT) { + error_report("MSR entries exceed maximum size"); + g_free(msrs); + return -1; + } + + for (size_t i =3D 0; i < ARRAY_SIZE(pairs); i++) { + MshvMsrEntry *entry =3D &msrs->entries[i]; + entry->index =3D pairs[i].index; + entry->reserved =3D 0; + entry->data =3D pairs[i].value; + msrs->nmsrs++; + } + + ret =3D mshv_configure_msr(mshv_vcpufd(cpu), &msrs->entries[0], msrs->= nmsrs); + g_free(msrs); + return ret; +} + + int mshv_arch_put_registers(const CPUState *cpu) { int ret; @@ -951,8 +1012,13 @@ int mshv_arch_put_registers(const CPUState *cpu) return -1; } =20 - error_report("unimplemented"); - abort(); + ret =3D put_msrs(cpu); + if (ret < 0) { + error_report("Failed to put msrs"); + return -1; + } + + return 0; } =20 void mshv_arch_amend_proc_features( --=20 2.34.1