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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1747242290; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VraubuY7LtlKwlqMt7drwNrB25LK0Y+Y/vZnqOYr4Ic=; b=aLlKfUl1/iFVTEZ+cXvSDyyJTnTZMbWYek5Pv7PrViQvOXVqRsis6FAqZey1y5FrHEbx5x FjXQNgOb7dxvHAng2ipIF1S4kJ4n3KXoHuy/blmkyTjsehtEbAw7ImkUM4gbZCLNQqbvoe pQUMW879i9GAnxuwdARCqSghCFyvgwM= X-MC-Unique: Vjzv09LMPju_51rNoe0FUw-1 X-Mimecast-MFC-AGG-ID: Vjzv09LMPju_51rNoe0FUw_1747242286 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 01/22] hw/i386/acpi-build: Make aml_pci_device_dsm() static Date: Wed, 14 May 2025 19:00:48 +0200 Message-ID: <20250514170431.2786231-2-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" No need to export aml_pci_device_dsm() as it is only used in hw/i386/acpi-build.c. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/acpi/pci.h | 1 - hw/i386/acpi-build.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h index 6359d574fd..ab0187a894 100644 --- a/include/hw/acpi/pci.h +++ b/include/hw/acpi/pci.h @@ -36,7 +36,6 @@ typedef struct AcpiMcfgInfo { =20 void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info, const char *oem_id, const char *oem_table_id); -Aml *aml_pci_device_dsm(void); =20 void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus); void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope); diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index f40ad062f9..9e584e69fd 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -338,7 +338,7 @@ build_facs(GArray *table_data) g_array_append_vals(table_data, reserved, 40); /* Reserved */ } =20 -Aml *aml_pci_device_dsm(void) +static Aml *aml_pci_device_dsm(void) { Aml *method; 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charset="utf-8" acpi_pcihp VirtMachineClass state flag will allow to opt in for acpi pci hotplug. This is guarded by a class no_acpi_pcihp flag to manage compats (<=3D 10.0 machine types will not support ACPI PCI hotplug). Machine state acpi_pcihp flag must be set before the creation of the GED device which will use it. Currently the ACPI PCI HP is turned off by default. This will change later on for 10.1 machine type. We also introduce properties to allow disabling it. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- include/hw/arm/virt.h | 2 ++ hw/arm/virt.c | 27 +++++++++++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 9a1b0f53d2..10ea581f06 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -129,6 +129,7 @@ struct VirtMachineClass { bool no_tcg_lpa2; bool no_ns_el2_virt_timer_irq; bool no_nested_smmu; + bool no_acpi_pcihp; }; =20 struct VirtMachineState { @@ -150,6 +151,7 @@ struct VirtMachineState { bool mte; bool dtb_randomness; bool second_ns_uart_present; + bool acpi_pcihp; OnOffAuto acpi; VirtGICType gic_version; VirtIOMMUType iommu; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 9a6cd085a3..a0deeaf2b3 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine) create_pcie(vms); =20 if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)= ) { + vms->acpi_pcihp &=3D !vmc->no_acpi_pcihp; vms->acpi_dev =3D create_acpi_ged(vms); } else { + vms->acpi_pcihp =3D false; create_gpio_devices(vms, VIRT_GPIO, sysmem); } =20 @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Er= ror **errp) vms->its =3D value; } =20 +static bool virt_get_acpi_pcihp(Object *obj, Error **errp) +{ + VirtMachineState *vms =3D VIRT_MACHINE(obj); + + return vms->acpi_pcihp; +} + +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp) +{ + VirtMachineState *vms =3D VIRT_MACHINE(obj); + + vms->acpi_pcihp =3D value; +} + static bool virt_get_dtb_randomness(Object *obj, Error **errp) { VirtMachineState *vms =3D VIRT_MACHINE(obj); @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc,= const void *data) "in ACPI table header." "The string may be up to 8 bytes= in size"); =20 + object_class_property_add_bool(oc, "acpi-pcihp", + virt_get_acpi_pcihp, virt_set_acpi_pcih= p); + object_class_property_set_description(oc, "acpi-pcihp", + "Force ACPI PCI hotplug"); } =20 static void virt_instance_init(Object *obj) @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj) vms->tcg_its =3D true; } =20 + /* default disallows ACPI PCI hotplug */ + vms->acpi_pcihp =3D false; + /* Default disallows iommu instantiation */ vms->iommu =3D VIRT_IOMMU_NONE; =20 @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1) =20 static void virt_machine_10_0_options(MachineClass *mc) { + VirtMachineClass *vmc =3D VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); + virt_machine_10_1_options(mc); compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len); + /* 10.0 and earlier do not support ACPI PCI hotplug */ + vmc->no_acpi_pcihp =3D true; } DEFINE_VIRT_MACHINE(10, 0) =20 --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1747242302; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yVIJWQ0kvBuB0SkOogCK3Yd6KsTducu6vpbj9Cu3wcs=; b=dECI92LFKq+7gL0Sokx1tpvk1kDIebku7oU8miuXcivtn93R14Xy4LSbIdkfJsWQ3DnGoV sNzdH0OCI5Oyz/nfoKZwGs//5y2y2dizgXxw2L6o/1oWPKmiX0hheneuBDSk4QgJ6zx+nm 5s5yIE0vstfPtabS4fM4w1bqNy84R8s= X-MC-Unique: Q6b1etonNSqZC3TLReqeiw-1 X-Mimecast-MFC-AGG-ID: Q6b1etonNSqZC3TLReqeiw_1747242297 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 03/22] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp Date: Wed, 14 May 2025 19:00:50 +0200 Message-ID: <20250514170431.2786231-4-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" We plan to reuse build_x86_acpi_pci_hotplug() implementation for ARM so let's move the code to generic pcihp. Associated static aml_pci_pdsm() helper is also moved along. build_x86_acpi_pci_hotplug is renamed into build_acpi_pci_hotplug(). No code change intended. Also fix the reference to acpi_pci_hotplug.rst documentation Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- rfc -> v1: - make build_append_pci_dsm_func0_common non static and move it to pcihp --- hw/i386/acpi-build.h | 4 - include/hw/acpi/pcihp.h | 9 +- hw/acpi/pcihp.c | 174 ++++++++++++++++++++++++++++++++++++++- hw/i386/acpi-build.c | 176 +--------------------------------------- 4 files changed, 183 insertions(+), 180 deletions(-) diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h index 275ec058a1..8ba3c33e48 100644 --- a/hw/i386/acpi-build.h +++ b/hw/i386/acpi-build.h @@ -5,10 +5,6 @@ =20 extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio; =20 -/* PCI Hot-plug registers' base. See docs/specs/acpi_pci_hotplug.rst */ -#define ACPI_PCIHP_SEJ_BASE 0x8 -#define ACPI_PCIHP_BNMR_BASE 0x10 - void acpi_setup(void); Object *acpi_get_i386_pci_host(void); =20 diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index a97904bada..95efe9a804 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -3,7 +3,7 @@ * * QEMU supports PCI hotplug via ACPI. This module * implements the interface between QEMU and the ACPI BIOS. - * Interface specification - see docs/specs/acpi_pci_hotplug.txt + * Interface specification - see docs/specs/acpi_pci_hotplug.rst * * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com) * Copyright (c) 2006 Fabrice Bellard @@ -33,6 +33,10 @@ #define ACPI_PCIHP_IO_BASE_PROP "acpi-pcihp-io-base" #define ACPI_PCIHP_IO_LEN_PROP "acpi-pcihp-io-len" =20 +/* PCI Hot-plug registers bases. See docs/spec/acpi_pci_hotplug.rst */ +#define ACPI_PCIHP_SEJ_BASE 0x8 +#define ACPI_PCIHP_BNMR_BASE 0x10 + typedef struct AcpiPciHpPciStatus { uint32_t up; uint32_t down; @@ -69,6 +73,9 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *= hotplug_dev, AcpiPciHpState *s, DeviceState *d= ev, Error **errp); =20 +void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr); +void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar); + /* Called on reset */ void acpi_pcihp_reset(AcpiPciHpState *s); =20 diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index aac90013d4..e0260f67e6 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -26,7 +26,7 @@ =20 #include "qemu/osdep.h" #include "hw/acpi/pcihp.h" - +#include "hw/acpi/aml-build.h" #include "hw/pci-host/i440fx.h" #include "hw/pci/pci.h" #include "hw/pci/pci_bridge.h" @@ -513,6 +513,178 @@ void acpi_pcihp_init(Object *owner, AcpiPciHpState *s= , PCIBus *root_bus, OBJ_PROP_FLAG_READ); } =20 +void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar) +{ + Aml *UUID, *ifctx1; + uint8_t byte_list[1] =3D { 0 }; /* nothing supported yet */ + + aml_append(ctx, aml_store(aml_buffer(1, byte_list), retvar)); + /* + * PCI Firmware Specification 3.1 + * 4.6. _DSM Definitions for PCI + */ + UUID =3D aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D"); + ifctx1 =3D aml_if(aml_lnot(aml_equal(aml_arg(0), UUID))); + { + /* call is for unsupported UUID, bail out */ + aml_append(ifctx1, aml_return(retvar)); + } + aml_append(ctx, ifctx1); + + ifctx1 =3D aml_if(aml_lless(aml_arg(1), aml_int(2))); + { + /* call is for unsupported REV, bail out */ + aml_append(ifctx1, aml_return(retvar)); + } + aml_append(ctx, ifctx1); +} + +static Aml *aml_pci_pdsm(void) +{ + Aml *method, *ifctx, *ifctx1; + Aml *ret =3D aml_local(0); + Aml *caps =3D aml_local(1); + Aml *acpi_index =3D aml_local(2); + Aml *zero =3D aml_int(0); + Aml *one =3D aml_int(1); + Aml *not_supp =3D aml_int(0xFFFFFFFF); + Aml *func =3D aml_arg(2); + Aml *params =3D aml_arg(4); + Aml *bnum =3D aml_derefof(aml_index(params, aml_int(0))); + Aml *sunum =3D aml_derefof(aml_index(params, aml_int(1))); + + method =3D aml_method("PDSM", 5, AML_SERIALIZED); + + /* get supported functions */ + ifctx =3D aml_if(aml_equal(func, zero)); + { + build_append_pci_dsm_func0_common(ifctx, ret); + + aml_append(ifctx, aml_store(zero, caps)); + aml_append(ifctx, + aml_store(aml_call2("AIDX", bnum, sunum), acpi_index)); + /* + * advertise function 7 if device has acpi-index + * acpi_index values: + * 0: not present (default value) + * FFFFFFFF: not supported (old QEMU without PIDX reg) + * other: device's acpi-index + */ + ifctx1 =3D aml_if(aml_lnot( + aml_or(aml_equal(acpi_index, zero), + aml_equal(acpi_index, not_supp), NULL) + )); + { + /* have supported functions */ + aml_append(ifctx1, aml_or(caps, one, caps)); + /* support for function 7 */ + aml_append(ifctx1, + aml_or(caps, aml_shiftleft(one, aml_int(7)), caps)); + } + aml_append(ifctx, ifctx1); + + aml_append(ifctx, aml_store(caps, aml_index(ret, zero))); + aml_append(ifctx, aml_return(ret)); + } + aml_append(method, ifctx); + + /* handle specific functions requests */ + /* + * PCI Firmware Specification 3.1 + * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under + * Operating Systems + */ + ifctx =3D aml_if(aml_equal(func, aml_int(7))); + { + Aml *pkg =3D aml_package(2); + + aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_in= dex)); + aml_append(ifctx, aml_store(pkg, ret)); + /* + * Windows calls func=3D7 without checking if it's available, + * as workaround Microsoft has suggested to return invalid for func7 + * Package, so return 2 elements package but only initialize elemen= ts + * when acpi_index is supported and leave them uninitialized, which + * leads elements to being Uninitialized ObjectType and should trip + * Windows into discarding result as an unexpected and prevent sett= ing + * bogus 'PCI Label' on the device. + */ + ifctx1 =3D aml_if(aml_lnot(aml_lor( + aml_equal(acpi_index, zero), aml_equal(acpi_index, not= _supp) + ))); + { + aml_append(ifctx1, aml_store(acpi_index, aml_index(ret, zero))); + /* + * optional, if not impl. should return null string + */ + aml_append(ifctx1, aml_store(aml_string("%s", ""), + aml_index(ret, one))); + } + aml_append(ifctx, ifctx1); + + aml_append(ifctx, aml_return(ret)); + } + + aml_append(method, ifctx); + return method; +} + +void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr) +{ + Aml *scope; + Aml *field; + Aml *method; + + scope =3D aml_scope("_SB.PCI0"); + + aml_append(scope, + aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0= x08)); + field =3D aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZE= ROS); + aml_append(field, aml_named_field("PCIU", 32)); + aml_append(field, aml_named_field("PCID", 32)); + aml_append(scope, field); + + aml_append(scope, + aml_operation_region("SEJ", AML_SYSTEM_IO, + aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x= 04)); + field =3D aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZER= OS); + aml_append(field, aml_named_field("B0EJ", 32)); + aml_append(scope, field); + + aml_append(scope, + aml_operation_region("BNMR", AML_SYSTEM_IO, + aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0= x08)); + field =3D aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZE= ROS); + aml_append(field, aml_named_field("BNUM", 32)); + aml_append(field, aml_named_field("PIDX", 32)); + aml_append(scope, field); + + aml_append(scope, aml_mutex("BLCK", 0)); + + method =3D aml_method("PCEJ", 2, AML_NOTSERIALIZED); + aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF)); + aml_append(method, aml_store(aml_arg(0), aml_name("BNUM"))); + aml_append(method, + aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("B0EJ"))= ); + aml_append(method, aml_release(aml_name("BLCK"))); + aml_append(method, aml_return(aml_int(0))); + aml_append(scope, method); + + method =3D aml_method("AIDX", 2, AML_NOTSERIALIZED); + aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF)); + aml_append(method, aml_store(aml_arg(0), aml_name("BNUM"))); + aml_append(method, + aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("PIDX"))= ); + aml_append(method, aml_store(aml_name("PIDX"), aml_local(0))); + aml_append(method, aml_release(aml_name("BLCK"))); + aml_append(method, aml_return(aml_local(0))); + aml_append(scope, method); + + aml_append(scope, aml_pci_pdsm()); + + aml_append(table, scope); +} + const VMStateDescription vmstate_acpi_pcihp_pci_status =3D { .name =3D "acpi_pcihp_pci_status", .version_id =3D 1, diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 9e584e69fd..b92765fbd9 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -361,32 +361,6 @@ static Aml *aml_pci_device_dsm(void) return method; } =20 -static void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar) -{ - Aml *UUID, *ifctx1; - uint8_t byte_list[1] =3D { 0 }; /* nothing supported yet */ - - aml_append(ctx, aml_store(aml_buffer(1, byte_list), retvar)); - /* - * PCI Firmware Specification 3.1 - * 4.6. _DSM Definitions for PCI - */ - UUID =3D aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D"); - ifctx1 =3D aml_if(aml_lnot(aml_equal(aml_arg(0), UUID))); - { - /* call is for unsupported UUID, bail out */ - aml_append(ifctx1, aml_return(retvar)); - } - aml_append(ctx, ifctx1); - - ifctx1 =3D aml_if(aml_lless(aml_arg(1), aml_int(2))); - { - /* call is for unsupported REV, bail out */ - aml_append(ifctx1, aml_return(retvar)); - } - aml_append(ctx, ifctx1); -} - static Aml *aml_pci_edsm(void) { Aml *method, *ifctx; @@ -647,96 +621,6 @@ static bool build_append_notification_callback(Aml *pa= rent_scope, return !!nr_notifiers; } =20 -static Aml *aml_pci_pdsm(void) -{ - Aml *method, *ifctx, *ifctx1; - Aml *ret =3D aml_local(0); - Aml *caps =3D aml_local(1); - Aml *acpi_index =3D aml_local(2); - Aml *zero =3D aml_int(0); - Aml *one =3D aml_int(1); - Aml *not_supp =3D aml_int(0xFFFFFFFF); - Aml *func =3D aml_arg(2); - Aml *params =3D aml_arg(4); - Aml *bnum =3D aml_derefof(aml_index(params, aml_int(0))); - Aml *sunum =3D aml_derefof(aml_index(params, aml_int(1))); - - method =3D aml_method("PDSM", 5, AML_SERIALIZED); - - /* get supported functions */ - ifctx =3D aml_if(aml_equal(func, zero)); - { - build_append_pci_dsm_func0_common(ifctx, ret); - - aml_append(ifctx, aml_store(zero, caps)); - aml_append(ifctx, - aml_store(aml_call2("AIDX", bnum, sunum), acpi_index)); - /* - * advertise function 7 if device has acpi-index - * acpi_index values: - * 0: not present (default value) - * FFFFFFFF: not supported (old QEMU without PIDX reg) - * other: device's acpi-index - */ - ifctx1 =3D aml_if(aml_lnot( - aml_or(aml_equal(acpi_index, zero), - aml_equal(acpi_index, not_supp), NULL) - )); - { - /* have supported functions */ - aml_append(ifctx1, aml_or(caps, one, caps)); - /* support for function 7 */ - aml_append(ifctx1, - aml_or(caps, aml_shiftleft(one, aml_int(7)), caps)); - } - aml_append(ifctx, ifctx1); - - aml_append(ifctx, aml_store(caps, aml_index(ret, zero))); - aml_append(ifctx, aml_return(ret)); - } - aml_append(method, ifctx); - - /* handle specific functions requests */ - /* - * PCI Firmware Specification 3.1 - * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under - * Operating Systems - */ - ifctx =3D aml_if(aml_equal(func, aml_int(7))); - { - Aml *pkg =3D aml_package(2); - - aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_in= dex)); - aml_append(ifctx, aml_store(pkg, ret)); - /* - * Windows calls func=3D7 without checking if it's available, - * as workaround Microsoft has suggested to return invalid for func7 - * Package, so return 2 elements package but only initialize elemen= ts - * when acpi_index is supported and leave them uninitialized, which - * leads elements to being Uninitialized ObjectType and should trip - * Windows into discarding result as an unexpected and prevent sett= ing - * bogus 'PCI Label' on the device. - */ - ifctx1 =3D aml_if(aml_lnot(aml_lor( - aml_equal(acpi_index, zero), aml_equal(acpi_index, not= _supp) - ))); - { - aml_append(ifctx1, aml_store(acpi_index, aml_index(ret, zero))); - /* - * optional, if not impl. should return null string - */ - aml_append(ifctx1, aml_store(aml_string("%s", ""), - aml_index(ret, one))); - } - aml_append(ifctx, ifctx1); - - aml_append(ifctx, aml_return(ret)); - } - - aml_append(method, ifctx); - return method; -} - /* * build_prt - Define interrupt routing rules * @@ -1227,62 +1111,6 @@ static Aml *build_q35_dram_controller(const AcpiMcfg= Info *mcfg) return dev; } =20 -static void build_x86_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr) -{ - Aml *scope; - Aml *field; - Aml *method; - - scope =3D aml_scope("_SB.PCI0"); - - aml_append(scope, - aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0= x08)); - field =3D aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZE= ROS); - aml_append(field, aml_named_field("PCIU", 32)); - aml_append(field, aml_named_field("PCID", 32)); - aml_append(scope, field); - - aml_append(scope, - aml_operation_region("SEJ", AML_SYSTEM_IO, - aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x= 04)); - field =3D aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZER= OS); - aml_append(field, aml_named_field("B0EJ", 32)); - aml_append(scope, field); - - aml_append(scope, - aml_operation_region("BNMR", AML_SYSTEM_IO, - aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0= x08)); - field =3D aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZE= ROS); - aml_append(field, aml_named_field("BNUM", 32)); - aml_append(field, aml_named_field("PIDX", 32)); - aml_append(scope, field); - - aml_append(scope, aml_mutex("BLCK", 0)); - - method =3D aml_method("PCEJ", 2, AML_NOTSERIALIZED); - aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF)); - aml_append(method, aml_store(aml_arg(0), aml_name("BNUM"))); - aml_append(method, - aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("B0EJ"))= ); - aml_append(method, aml_release(aml_name("BLCK"))); - aml_append(method, aml_return(aml_int(0))); - aml_append(scope, method); - - method =3D aml_method("AIDX", 2, AML_NOTSERIALIZED); - aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF)); - aml_append(method, aml_store(aml_arg(0), aml_name("BNUM"))); - aml_append(method, - aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("PIDX"))= ); - aml_append(method, aml_store(aml_name("PIDX"), aml_local(0))); - aml_append(method, aml_release(aml_name("BLCK"))); - aml_append(method, aml_return(aml_local(0))); - aml_append(scope, method); - - aml_append(scope, aml_pci_pdsm()); - - aml_append(table, scope); -} - static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug) { Aml *if_ctx; @@ -1394,7 +1222,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dsdt, sb_scope); =20 if (pm->pcihp_bridge_en || pm->pcihp_root_en) { - build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); + build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); } build_piix4_pci0_int(dsdt); } else if (q35) { @@ -1438,7 +1266,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dsdt, sb_scope); =20 if (pm->pcihp_bridge_en) { - build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); + build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); } build_q35_pci0_int(dsdt); } --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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b=Ty8v5OahI1ggi2G852jp/ZPcdUYpiwDAHKDoPm59XkQa22YRZ9nynT7f+fh/DWaZcOxhOm zHsardhlemZYhv866DCkDcLV/FFjifKGNiEKPJixkgS7hZoHsfhUqbjxuEabOgQCXN1pKx tu3fzPS1pWoHCtqTkyGcee7l3Vx2ktw= X-MC-Unique: E7G1LCGHPcGolzQ0IPk1Ig-1 X-Mimecast-MFC-AGG-ID: E7G1LCGHPcGolzQ0IPk1Ig_1747242302 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 04/22] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc Date: Wed, 14 May 2025 19:00:51 +0200 Message-ID: <20250514170431.2786231-5-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Add a new argument to acpi_dsdt_add_pci_osc to be able to disable native pci hotplug. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- rfc -> v1: - updated the "Allow OS control for all 5 features" comment --- hw/pci-host/gpex-acpi.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c index 0aba47c71c..f34b7cf25e 100644 --- a/hw/pci-host/gpex-acpi.c +++ b/hw/pci-host/gpex-acpi.c @@ -50,7 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint3= 2_t irq, } } =20 -static void acpi_dsdt_add_pci_osc(Aml *dev) +static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplu= g) { Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf; =20 @@ -77,11 +77,12 @@ static void acpi_dsdt_add_pci_osc(Aml *dev) aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL"))); =20 /* - * Allow OS control for all 5 features: - * PCIeHotplug SHPCHotplug PME AER PCIeCapability. + * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability, + * and PCIeHotplug depending on enable_native_pcie_hotplug */ - aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F), - aml_name("CTRL"))); + aml_append(ifctx, aml_and(aml_name("CTRL"), + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), + aml_name("CTRL"))); =20 ifctx1 =3D aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1)))); aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08), @@ -192,7 +193,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) if (is_cxl) { build_cxl_osc_method(dev); } else { - acpi_dsdt_add_pci_osc(dev); + acpi_dsdt_add_pci_osc(dev, true); } =20 aml_append(scope, dev); @@ -267,7 +268,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) } aml_append(dev, aml_name_decl("_CRS", rbuf)); =20 - acpi_dsdt_add_pci_osc(dev); + acpi_dsdt_add_pci_osc(dev, true); =20 Aml *dev_res0 =3D aml_device("%s", "RES0"); aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02"))); --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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b=OUK4YIbB1ZRAevLFRpqqXN4F6kM+/8kafq0nb2NY8VmNyTNWqTzS+tb9dl7o5iXKIuFDk+ JumKk2vskWNIRT9IIfKe+l6z+PhUvZVrdYq5wRua/k7ipoNaOySil4Xtmi/+EWXkevXeHu HkeHvx8HRcHWpZ29PMWD4ihFJuizUCA= X-MC-Unique: t3Y_VxkOPgeCogeHP7gxfg-1 X-Mimecast-MFC-AGG-ID: t3Y_VxkOPgeCogeHP7gxfg_1747242307 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 05/22] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation Date: Wed, 14 May 2025 19:00:52 +0200 Message-ID: <20250514170431.2786231-6-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" acpi_dsdt_add_pci_osc() name is confusing as it gives the impression it appends the _OSC method but in fact it also appends the _DSM method for the host bridge. Let's split the function into two separate ones and let them return the method Aml pointer instead. This matches the way it is done on x86 (build_q35_osc_method). In a subsequent patch we will replace the gpex method by the q35 implementation that will become shared between ARM and x86. acpi_dsdt_add_host_bridge_methods is a new top helper that generates both the _OSC and _DSM methods. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- hw/pci-host/gpex-acpi.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c index f34b7cf25e..1aa2d12026 100644 --- a/hw/pci-host/gpex-acpi.c +++ b/hw/pci-host/gpex-acpi.c @@ -50,13 +50,10 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uin= t32_t irq, } } =20 -static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplu= g) +static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug) { - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf; + Aml *method, *UUID, *ifctx, *ifctx1, *elsectx; =20 - /* Declare an _OSC (OS Control Handoff) method */ - aml_append(dev, aml_name_decl("SUPP", aml_int(0))); - aml_append(dev, aml_name_decl("CTRL", aml_int(0))); method =3D aml_method("_OSC", 4, AML_NOTSERIALIZED); aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1")); @@ -103,9 +100,13 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enabl= e_native_pcie_hotplug) aml_name("CDW1"))); aml_append(elsectx, aml_return(aml_arg(3))); aml_append(method, elsectx); - aml_append(dev, method); + return method; +} =20 - method =3D aml_method("_DSM", 4, AML_NOTSERIALIZED); +static Aml *build_host_bridge_dsm(void) +{ + Aml *method =3D aml_method("_DSM", 4, AML_NOTSERIALIZED); + Aml *UUID, *ifctx, *ifctx1, *buf; =20 /* PCI Firmware Specification 3.0 * 4.6.1. _DSM for PCI Express Slot Information @@ -124,7 +125,17 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enabl= e_native_pcie_hotplug) byte_list[0] =3D 0; buf =3D aml_buffer(1, byte_list); aml_append(method, aml_return(buf)); - aml_append(dev, method); + return method; +} + +static void acpi_dsdt_add_host_bridge_methods(Aml *dev, + bool enable_native_pcie_hotp= lug) +{ + aml_append(dev, aml_name_decl("SUPP", aml_int(0))); + aml_append(dev, aml_name_decl("CTRL", aml_int(0))); + /* Declare an _OSC (OS Control Handoff) method */ + aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug)); + aml_append(dev, build_host_bridge_dsm()); } =20 void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg) @@ -193,7 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) if (is_cxl) { build_cxl_osc_method(dev); } else { - acpi_dsdt_add_pci_osc(dev, true); + acpi_dsdt_add_host_bridge_methods(dev, true); } =20 aml_append(scope, dev); @@ -268,7 +279,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) } aml_append(dev, aml_name_decl("_CRS", rbuf)); =20 - acpi_dsdt_add_pci_osc(dev, true); + acpi_dsdt_add_host_bridge_methods(dev, true); =20 Aml *dev_res0 =3D aml_device("%s", "RES0"); aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02"))); --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; 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charset="utf-8" Propagate the type of pci hotplug mode downto the gpex acpi code. In case machine acpi_pcihp is unset we configure pci native hotplug on pci0. For expander bridges we keep legacy pci native hotplug, as done on x86 q35. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- include/hw/pci-host/gpex.h | 1 + hw/arm/virt-acpi-build.c | 1 + hw/pci-host/gpex-acpi.c | 3 ++- 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h index 84471533af..feaf827474 100644 --- a/include/hw/pci-host/gpex.h +++ b/include/hw/pci-host/gpex.h @@ -45,6 +45,7 @@ struct GPEXConfig { MemMapEntry pio; int irq; PCIBus *bus; + bool pci_native_hotplug; }; =20 typedef struct GPEXIrq GPEXIrq; diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 7e8e0f0298..be5e00a56e 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -129,6 +129,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapE= ntry *memmap, .ecam =3D memmap[ecam_id], .irq =3D irq, .bus =3D vms->bus, + .pci_native_hotplug =3D !vms->acpi_pcihp, }; =20 if (vms->highmem_mmio) { diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c index 1aa2d12026..f1ab30f3d5 100644 --- a/hw/pci-host/gpex-acpi.c +++ b/hw/pci-host/gpex-acpi.c @@ -204,6 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) if (is_cxl) { build_cxl_osc_method(dev); } else { + /* pxb bridges do not have ACPI PCI Hot-plug enabled */ acpi_dsdt_add_host_bridge_methods(dev, true); } =20 @@ -279,7 +280,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) } aml_append(dev, aml_name_decl("_CRS", rbuf)); =20 - acpi_dsdt_add_host_bridge_methods(dev, true); + acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug); =20 Aml *dev_res0 =3D aml_device("%s", "RES0"); aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02"))); --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1747242627; cv=none; d=zohomail.com; s=zohoarc; b=B/IasmDGqOMqvYOgrTX3AO7tsTzwFvgh1Cpo3yArcb/DpQ77Yf8bCLN4F+EdFhZbZhS4cB1Ofb5foh2CUQUUfH6E92yfZE7wRAGoyTDqNvmTXGkvLk5oiLE6rc42RwgeEcNegoAszdPmlsl4cOFvWFy/NTHUlj/tZlVjt9IGWqM= ARC-Message-Signature: i=1; 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charset="utf-8" GPEX acpi_dsdt_add_pci_osc() does basically the same as build_q35_osc_method(). Rename build_q35_osc_method() into build_pci_host_bridge_osc_method() and move it into hw/acpi/aml-build.c. In a subsequent patch we will use this later in place of acpi_dsdt_add_pci_osc(). Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- include/hw/acpi/aml-build.h | 2 ++ hw/acpi/aml-build.c | 50 ++++++++++++++++++++++++++++++++++ hw/i386/acpi-build.c | 54 ++----------------------------------- 3 files changed, 54 insertions(+), 52 deletions(-) diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index c18f681342..177d60b414 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -508,4 +508,6 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker,= GArray *tcpalog, void build_spcr(GArray *table_data, BIOSLinker *linker, const AcpiSpcrData *f, const uint8_t rev, const char *oem_id, const char *oem_table_id, const char *= name); + +Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug); #endif diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index f8f93a9f66..ba1dfe0b52 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -2614,3 +2614,53 @@ Aml *aml_i2c_serial_bus_device(uint16_t address, con= st char *resource_source) =20 return var; } + +Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug) +{ + Aml *if_ctx; + Aml *if_ctx2; + Aml *else_ctx; + Aml *method; + Aml *a_cwd1 =3D aml_name("CDW1"); + Aml *a_ctrl =3D aml_local(0); + + method =3D aml_method("_OSC", 4, AML_NOTSERIALIZED); + aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW= 1")); + + if_ctx =3D aml_if(aml_equal( + aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766"))); + aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW= 2")); + aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW= 3")); + + aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl)); + + /* + * Always allow native PME, AER (no dependencies) + * Allow SHPC (PCI bridges can have SHPC controller) + * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled. + */ + aml_append(if_ctx, aml_and(a_ctrl, + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl)); + + if_ctx2 =3D aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1)))); + /* Unknown revision */ + aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1)); + aml_append(if_ctx, if_ctx2); + + if_ctx2 =3D aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl))); + /* Capabilities bits were masked */ + aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1)); + aml_append(if_ctx, if_ctx2); + + /* Update DWORD3 in the buffer */ + aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3"))); + aml_append(method, if_ctx); + + else_ctx =3D aml_else(); + /* Unrecognized UUID */ + aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1)); + aml_append(method, else_ctx); + + aml_append(method, aml_return(aml_arg(3))); + return method; +} diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index b92765fbd9..41fde88b22 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1111,56 +1111,6 @@ static Aml *build_q35_dram_controller(const AcpiMcfg= Info *mcfg) return dev; } =20 -static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug) -{ - Aml *if_ctx; - Aml *if_ctx2; - Aml *else_ctx; - Aml *method; - Aml *a_cwd1 =3D aml_name("CDW1"); - Aml *a_ctrl =3D aml_local(0); - - method =3D aml_method("_OSC", 4, AML_NOTSERIALIZED); - aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW= 1")); - - if_ctx =3D aml_if(aml_equal( - aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766"))); - aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW= 2")); - aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW= 3")); - - aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl)); - - /* - * Always allow native PME, AER (no dependencies) - * Allow SHPC (PCI bridges can have SHPC controller) - * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled. - */ - aml_append(if_ctx, aml_and(a_ctrl, - aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl)); - - if_ctx2 =3D aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1)))); - /* Unknown revision */ - aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1)); - aml_append(if_ctx, if_ctx2); - - if_ctx2 =3D aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl))); - /* Capabilities bits were masked */ - aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1)); - aml_append(if_ctx, if_ctx2); - - /* Update DWORD3 in the buffer */ - aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3"))); - aml_append(method, if_ctx); - - else_ctx =3D aml_else(); - /* Unrecognized UUID */ - aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1)); - aml_append(method, else_ctx); - - aml_append(method, aml_return(aml_arg(3))); - return method; -} - static void build_acpi0017(Aml *table) { Aml *dev, *scope, *method; @@ -1231,7 +1181,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08"))); aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03"))); aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid))= ); - aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en)); + aml_append(dev, build_pci_host_bridge_osc_method(!pm->pcihp_bridge= _en)); aml_append(dev, aml_pci_edsm()); aml_append(sb_scope, dev); if (mcfg_valid) { @@ -1353,7 +1303,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03"= ))); =20 /* Expander bridges do not have ACPI PCI Hot-plug enabled = */ - aml_append(dev, build_q35_osc_method(true)); + aml_append(dev, build_pci_host_bridge_osc_method(true)); } else { aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03"= ))); } --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1747242671; cv=none; d=zohomail.com; s=zohoarc; b=h1+mhKzc1rRvM1HLqmFBjIY0EyMtnIlGtbPXRQm6AqB9myxWUMCgrdl+ofwBjgqx+7mqGsxnDmcyuFj1E9HN4CybrUpWsGque5445zVqRJdSy5sbFINWvCXq8sIFovO0LD7ELOfncPzhyspoeVmy+xAeflbry9J9kiVTm1qDRHg= ARC-Message-Signature: i=1; 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charset="utf-8" gpex build_host_bridge_osc() and x86 originated build_pci_host_bridge_osc_method() are mostly identical. In GPEX, SUPP is set to CDW2 but is not further used. CTRL is same as Local0. So let gpex code reuse build_pci_host_bridge_osc_method() and remove build_host_bridge_osc(). Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- The DSDT diff is given below: diff --git a/dsdt.dsl_before b/dsdt.dsl_after_osc_change index 3224a56..fa7558e 100644 --- a/dsdt.dsl_before +++ b/dsdt.dsl_after_osc_change @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of dsdt.dat, Mon Apr 7 05:33:06 2025 + * Disassembly of dsdt.dat, Mon Apr 7 05:37:20 2025 * * Original Table Header: * Signature "DSDT" - * Length 0x00001A4F (6735) + * Length 0x00001A35 (6709) * Revision 0x02 - * Checksum 0xBF + * Checksum 0xDD * OEM ID "BOCHS " * OEM Table ID "BXPC " * OEM Revision 0x00000001 (1) @@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC = ", 0x00000001) { CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) - SUPP =3D CDW2 /* \_SB_.PCI0._OSC.CDW2 */ - CTRL =3D CDW3 /* \_SB_.PCI0._OSC.CDW3 */ - CTRL &=3D 0x1F + Local0 =3D CDW3 /* \_SB_.PCI0._OSC.CDW3 */ + Local0 &=3D 0x1F If ((Arg1 !=3D One)) { CDW1 |=3D 0x08 } - If ((CDW3 !=3D CTRL)) + If ((CDW3 !=3D Local0)) { CDW1 |=3D 0x10 } - CDW3 =3D CTRL /* \_SB_.PCI0.CTRL */ - Return (Arg3) + CDW3 =3D Local0 } Else { CDW1 |=3D 0x04 - Return (Arg3) } + + Return (Arg3) } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Meth= od --- hw/pci-host/gpex-acpi.c | 60 +++-------------------------------------- 1 file changed, 4 insertions(+), 56 deletions(-) diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c index f1ab30f3d5..98c9868c3f 100644 --- a/hw/pci-host/gpex-acpi.c +++ b/hw/pci-host/gpex-acpi.c @@ -50,60 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint= 32_t irq, } } =20 -static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug) -{ - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx; - - method =3D aml_method("_OSC", 4, AML_NOTSERIALIZED); - aml_append(method, - aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1")); - - /* PCI Firmware Specification 3.0 - * 4.5.1. _OSC Interface for PCI Host Bridge Devices - * The _OSC interface for a PCI/PCI-X/PCI Express hierarchy is - * identified by the Universal Unique IDentifier (UUID) - * 33DB4D5B-1FF7-401C-9657-7441C03DD766 - */ - UUID =3D aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766"); - ifctx =3D aml_if(aml_equal(aml_arg(0), UUID)); - aml_append(ifctx, - aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2")); - aml_append(ifctx, - aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3")); - aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP"))); - aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL"))); - - /* - * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability, - * and PCIeHotplug depending on enable_native_pcie_hotplug - */ - aml_append(ifctx, aml_and(aml_name("CTRL"), - aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), - aml_name("CTRL"))); - - ifctx1 =3D aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1)))); - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08), - aml_name("CDW1"))); - aml_append(ifctx, ifctx1); - - ifctx1 =3D aml_if(aml_lnot(aml_equal(aml_name("CDW3"), aml_name("CTRL"= )))); - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x10), - aml_name("CDW1"))); - aml_append(ifctx, ifctx1); - - aml_append(ifctx, aml_store(aml_name("CTRL"), aml_name("CDW3"))); - aml_append(ifctx, aml_return(aml_arg(3))); - aml_append(method, ifctx); - - elsectx =3D aml_else(); - aml_append(elsectx, aml_or(aml_name("CDW1"), aml_int(4), - aml_name("CDW1"))); - aml_append(elsectx, aml_return(aml_arg(3))); - aml_append(method, elsectx); - return method; -} - -static Aml *build_host_bridge_dsm(void) +static Aml *build_pci_host_bridge_dsm_method(void) { Aml *method =3D aml_method("_DSM", 4, AML_NOTSERIALIZED); Aml *UUID, *ifctx, *ifctx1, *buf; @@ -134,8 +81,9 @@ static void acpi_dsdt_add_host_bridge_methods(Aml *dev, aml_append(dev, aml_name_decl("SUPP", aml_int(0))); aml_append(dev, aml_name_decl("CTRL", aml_int(0))); /* Declare an _OSC (OS Control Handoff) method */ - aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug)); - aml_append(dev, build_host_bridge_dsm()); + aml_append(dev, + build_pci_host_bridge_osc_method(enable_native_pcie_hotplug= )); + aml_append(dev, build_pci_host_bridge_dsm_method()); } =20 void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg) --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1747242380; cv=none; d=zohomail.com; s=zohoarc; b=CRK2AvKVKoobNnlt2HIMqk5tOjQfLnPlH2EeChwI2Q8lx/91rex5JiUNMRXaZgkIgVUX/veue0GjoCQl/acOJiu74u2iuN3gt11eS0PlOBlcRBZF1qRlyl0Lm8tyeg4l7zxMJVwfj7dVx0AFTgAC+dREBtbsUML9qEUfBSL88UU= ARC-Message-Signature: i=1; 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charset="utf-8" Extract the code that reserves resources for ACPI PCI hotplug into a new helper named build_append_pcihp_resources() and move it to pcihp.c. We will reuse it on ARM. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- include/hw/acpi/pcihp.h | 2 ++ hw/acpi/pcihp.c | 20 ++++++++++++++++++++ hw/i386/acpi-build.c | 15 ++------------- 3 files changed, 24 insertions(+), 13 deletions(-) diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index 95efe9a804..ec9b010e4a 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -75,6 +75,8 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *= hotplug_dev, =20 void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr); void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar); +void build_append_pcihp_resources(Aml *table, + uint64_t io_addr, uint64_t io_len); =20 /* Called on reset */ void acpi_pcihp_reset(AcpiPciHpState *s); diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index e0260f67e6..fb54c31f77 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -685,6 +685,26 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp= _addr) aml_append(table, scope); } =20 +/* Reserve PCIHP resources */ +void build_append_pcihp_resources(Aml *scope /* \\_SB.PCI0 */, + uint64_t io_addr, uint64_t io_len) +{ + Aml *dev, *crs; + + dev =3D aml_device("PHPR"); + aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06"))); + aml_append(dev, + aml_name_decl("_UID", aml_string("PCI Hotplug resources"))); + /* device present, functioning, decoding, not shown in UI */ + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); + crs =3D aml_resource_template(); + aml_append(crs, + aml_io(AML_DECODE16, io_addr, io_addr, 1, io_len) + ); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); +} + const VMStateDescription vmstate_acpi_pcihp_pci_status =3D { .name =3D "acpi_pcihp_pci_status", .version_id =3D 1, diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 41fde88b22..ca59185aac 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1432,19 +1432,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, =20 /* reserve PCIHP resources */ if (pm->pcihp_io_len && (pm->pcihp_bridge_en || pm->pcihp_root_en)) { - dev =3D aml_device("PHPR"); - aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06"))); - aml_append(dev, - aml_name_decl("_UID", aml_string("PCI Hotplug resources"))); - /* device present, functioning, decoding, not shown in UI */ - aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); - crs =3D aml_resource_template(); - aml_append(crs, - aml_io(AML_DECODE16, pm->pcihp_io_base, pm->pcihp_io_base, 1, - pm->pcihp_io_len) - ); - aml_append(dev, aml_name_decl("_CRS", crs)); - aml_append(scope, dev); + build_append_pcihp_resources(scope, + pm->pcihp_io_base, pm->pcihp_io_len); } aml_append(dsdt, scope); =20 --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1747242599; cv=none; d=zohomail.com; s=zohoarc; b=LlhUxEVfJJikWjYvHHIkWa5FUfjLwDEe+PT03O7VKp/Sd/BLomHT+CmC/T0n7j7IMQQU3rh+IooAfNIjlPyoB9Q3Ph+l9Xf7ROcIlbfgD/XSvk8ViQlqCgUNFOsVWYOdpYMj7DaBnBBb18dBZL6bBlCNuET9HC2LcAZ7QGEIhAI= ARC-Message-Signature: i=1; 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Wed, 14 May 2025 17:05:31 +0000 (UTC) Received: from laptop.redhat.com (unknown [10.44.32.14]) by mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id CDD2130001B0; Wed, 14 May 2025 17:05:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1747242336; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zok49zoUTTkBlZVopW6XblcQI7eizznHl5/fscG3xOw=; b=SnWw7st6wmLixGSUQ4JNRLYNmXFQSb/SvfEYbDh7iZEDx0SOCss9rRmr3VlJ6s3AeGC+kG oXXt00t0DfuQuwABQRTyG+odknnC2Mrpbf9oIwf5ji/WobbN4bMJThXKPG8vjWa8ylt9fe 4n2aBMD70Vln+PAiPh/qgQ9N9NHf4P8= X-MC-Unique: TTJiG-mBNd-unf1znIgM3A-1 X-Mimecast-MFC-AGG-ID: TTJiG-mBNd-unf1znIgM3A_1747242331 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 10/22] hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug Date: Wed, 14 May 2025 19:00:57 +0200 Message-ID: <20250514170431.2786231-11-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" On ARM we will put the operation regions in AML_SYSTEM_MEMORY. So let's allow this configuration. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- include/hw/acpi/pcihp.h | 3 ++- hw/acpi/pcihp.c | 8 ++++---- hw/i386/acpi-build.c | 4 ++-- 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index ec9b010e4a..525e61a2a9 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -28,6 +28,7 @@ #define HW_ACPI_PCIHP_H =20 #include "hw/acpi/acpi.h" +#include "hw/acpi/aml-build.h" #include "hw/hotplug.h" =20 #define ACPI_PCIHP_IO_BASE_PROP "acpi-pcihp-io-base" @@ -73,7 +74,7 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *= hotplug_dev, AcpiPciHpState *s, DeviceState *d= ev, Error **errp); =20 -void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr); +void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_= addr); void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar); void build_append_pcihp_resources(Aml *table, uint64_t io_addr, uint64_t io_len); diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index fb54c31f77..310a5c54bd 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -629,7 +629,7 @@ static Aml *aml_pci_pdsm(void) return method; } =20 -void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr) +void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_= addr) { Aml *scope; Aml *field; @@ -638,21 +638,21 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcih= p_addr) scope =3D aml_scope("_SB.PCI0"); =20 aml_append(scope, - aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0= x08)); + aml_operation_region("PCST", rs, aml_int(pcihp_addr), 0x08)); field =3D aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZE= ROS); aml_append(field, aml_named_field("PCIU", 32)); aml_append(field, aml_named_field("PCID", 32)); aml_append(scope, field); =20 aml_append(scope, - aml_operation_region("SEJ", AML_SYSTEM_IO, + aml_operation_region("SEJ", rs, aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x= 04)); field =3D aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZER= OS); aml_append(field, aml_named_field("B0EJ", 32)); aml_append(scope, field); =20 aml_append(scope, - aml_operation_region("BNMR", AML_SYSTEM_IO, + aml_operation_region("BNMR", rs, aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0= x08)); field =3D aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZE= ROS); aml_append(field, aml_named_field("BNUM", 32)); diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index ca59185aac..87bb3d5cee 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1172,7 +1172,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dsdt, sb_scope); =20 if (pm->pcihp_bridge_en || pm->pcihp_root_en) { - build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_IO, pm->pcihp_io_base); } build_piix4_pci0_int(dsdt); } else if (q35) { @@ -1216,7 +1216,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dsdt, sb_scope); =20 if (pm->pcihp_bridge_en) { - build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_IO, pm->pcihp_io_base); } build_q35_pci0_int(dsdt); } --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; 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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1747242340; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8r/UJEhY8wsVW1OMou5XMRwbQ0Dg3PzQ6w/mtf8igf8=; b=SdQvQvwIYOqHmbqVuribP76Cf0RjAYBzBUSAP+moPdSaO9Z9Ob1PvxWbfPslwSfIy0ilXs vyW34YfNGkrV65bXWRQAmRsbr6Vnmo5/xqYigOQx6XQxW7BPF783Eo0EQOxW9XDboLTceC mDlg6EJJXRsmK/yMjhA9mUfrMEvmITU= X-MC-Unique: 9nDgd-N-OmeSxDNISkkp8Q-1 X-Mimecast-MFC-AGG-ID: 9nDgd-N-OmeSxDNISkkp8Q_1747242336 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 11/22] hw/i386/acpi-build: Move build_append_notification_callback to pcihp Date: Wed, 14 May 2025 19:00:58 +0200 Message-ID: <20250514170431.2786231-12-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" We plan to reuse build_append_notification_callback() on ARM so let's move it to pcihp.c. No functional change intended. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- include/hw/acpi/pcihp.h | 1 + hw/acpi/pcihp.c | 58 +++++++++++++++++++++++++++++++++++++++++ hw/i386/acpi-build.c | 58 ----------------------------------------- 3 files changed, 59 insertions(+), 58 deletions(-) diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index 525e61a2a9..7c5d59243f 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -78,6 +78,7 @@ void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs= , uint64_t pcihp_addr); void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar); void build_append_pcihp_resources(Aml *table, uint64_t io_addr, uint64_t io_len); +bool build_append_notification_callback(Aml *parent_scope, const PCIBus *b= us); =20 /* Called on reset */ void acpi_pcihp_reset(AcpiPciHpState *s); diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 310a5c54bd..907a08ac7f 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -39,6 +39,7 @@ #include "migration/vmstate.h" #include "qapi/error.h" #include "qom/qom-qobject.h" +#include "qobject/qnum.h" #include "trace.h" =20 #define ACPI_PCIHP_SIZE 0x0018 @@ -705,6 +706,63 @@ void build_append_pcihp_resources(Aml *scope /* \\_SB.= PCI0 */, aml_append(scope, dev); } =20 +bool build_append_notification_callback(Aml *parent_scope, const PCIBus *b= us) +{ + Aml *method; + PCIBus *sec; + QObject *bsel; + int nr_notifiers =3D 0; + GQueue *pcnt_bus_list =3D g_queue_new(); + + QLIST_FOREACH(sec, &bus->child, sibling) { + Aml *br_scope =3D aml_scope("S%.02X", sec->parent_dev->devfn); + if (pci_bus_is_root(sec)) { + continue; + } + nr_notifiers =3D nr_notifiers + + build_append_notification_callback(br_scope, sec); + /* + * add new child scope to parent + * and keep track of bus that have PCNT, + * bus list is used later to call children PCNTs from this level P= CNT + */ + if (nr_notifiers) { + g_queue_push_tail(pcnt_bus_list, sec); + aml_append(parent_scope, br_scope); + } + } + + /* + * Append PCNT method to notify about events on local and child buses. + * ps: hostbridge might not have hotplug (bsel) enabled but might have + * child bridges that do have bsel. + */ + method =3D aml_method("PCNT", 0, AML_NOTSERIALIZED); + + /* If bus supports hotplug select it and notify about local events */ + bsel =3D object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL= , NULL); + if (bsel) { + uint64_t bsel_val =3D qnum_get_uint(qobject_to(QNum, bsel)); + + aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM"))); + aml_append(method, aml_call2("DVNT", aml_name("PCIU"), + aml_int(1))); /* Device Check */ + aml_append(method, aml_call2("DVNT", aml_name("PCID"), + aml_int(3))); /* Eject Request */ + nr_notifiers++; + } + + /* Notify about child bus events in any case */ + while ((sec =3D g_queue_pop_head(pcnt_bus_list))) { + aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn= )); + } + + aml_append(parent_scope, method); + qobject_unref(bsel); + g_queue_free(pcnt_bus_list); + return !!nr_notifiers; +} + const VMStateDescription vmstate_acpi_pcihp_pci_status =3D { .name =3D "acpi_pcihp_pci_status", .version_id =3D 1, diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 87bb3d5cee..f08ce407c8 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -563,64 +563,6 @@ void build_append_pci_bus_devices(Aml *parent_scope, P= CIBus *bus) } } =20 -static bool build_append_notification_callback(Aml *parent_scope, - const PCIBus *bus) -{ - Aml *method; - PCIBus *sec; - QObject *bsel; - int nr_notifiers =3D 0; - GQueue *pcnt_bus_list =3D g_queue_new(); - - QLIST_FOREACH(sec, &bus->child, sibling) { - Aml *br_scope =3D aml_scope("S%.02X", sec->parent_dev->devfn); - if (pci_bus_is_root(sec)) { - continue; - } - nr_notifiers =3D nr_notifiers + - build_append_notification_callback(br_scope, sec); - /* - * add new child scope to parent - * and keep track of bus that have PCNT, - * bus list is used later to call children PCNTs from this level P= CNT - */ - if (nr_notifiers) { - g_queue_push_tail(pcnt_bus_list, sec); - aml_append(parent_scope, br_scope); - } - } - - /* - * Append PCNT method to notify about events on local and child buses. - * ps: hostbridge might not have hotplug (bsel) enabled but might have - * child bridges that do have bsel. - */ - method =3D aml_method("PCNT", 0, AML_NOTSERIALIZED); - - /* If bus supports hotplug select it and notify about local events */ - bsel =3D object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL= , NULL); - if (bsel) { - uint64_t bsel_val =3D qnum_get_uint(qobject_to(QNum, bsel)); - - aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM"))); - aml_append(method, aml_call2("DVNT", aml_name("PCIU"), - aml_int(1))); /* Device Check */ - aml_append(method, aml_call2("DVNT", aml_name("PCID"), - aml_int(3))); /* Eject Request */ - nr_notifiers++; - } - - /* Notify about child bus events in any case */ - while ((sec =3D g_queue_pop_head(pcnt_bus_list))) { - aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn= )); - } - - aml_append(parent_scope, method); - qobject_unref(bsel); - g_queue_free(pcnt_bus_list); - return !!nr_notifiers; -} - /* * build_prt - Define interrupt routing rules * --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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b=GH7N7jn/6ejfw7zZFvlvFEz3ACDmCM5bDUAJ1T6n9UnUDumJiD8egMP3r7lS38y3fIKpPm rPKupysRXVN184SMY1axp8STnY3w5Jo7nT7c0/nxNS9kCEVHOCO9tjUhxM9WzJoOZqSpls 8NtCgoJRCZ2nddDbdzeKhbkcWR3vNbI= X-MC-Unique: 6aBGfKNZMGOlyASyFQ05nw-1 X-Mimecast-MFC-AGG-ID: 6aBGfKNZMGOlyASyFQ05nw_1747242341 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 12/22] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp Date: Wed, 14 May 2025 19:00:59 +0200 Message-ID: <20250514170431.2786231-13-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" We intend to reuse build_append_pci_bus_devices and build_append_pcihp_slots on ARM. So Let's move them to hw/acpi/pcihp.c as well as all static helpers they use. No functional change intended. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- include/hw/acpi/pci.h | 1 - include/hw/acpi/pcihp.h | 2 + hw/acpi/pcihp.c | 173 ++++++++++++++++++++++++++++++++++++++++ hw/i386/acpi-build.c | 172 --------------------------------------- 4 files changed, 175 insertions(+), 173 deletions(-) diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h index ab0187a894..4dca22c0e2 100644 --- a/include/hw/acpi/pci.h +++ b/include/hw/acpi/pci.h @@ -37,7 +37,6 @@ typedef struct AcpiMcfgInfo { void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info, const char *oem_id, const char *oem_table_id); =20 -void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus); void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope); =20 void build_srat_generic_affinity_structures(GArray *table_data); diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index 7c5d59243f..4d820b4baf 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -80,6 +80,8 @@ void build_append_pcihp_resources(Aml *table, uint64_t io_addr, uint64_t io_len); bool build_append_notification_callback(Aml *parent_scope, const PCIBus *b= us); =20 +void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus); + /* Called on reset */ void acpi_pcihp_reset(AcpiPciHpState *s); =20 diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 907a08ac7f..942669ea89 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -27,6 +27,7 @@ #include "qemu/osdep.h" #include "hw/acpi/pcihp.h" #include "hw/acpi/aml-build.h" +#include "hw/acpi/acpi_aml_interface.h" #include "hw/pci-host/i440fx.h" #include "hw/pci/pci.h" #include "hw/pci/pci_bridge.h" @@ -763,6 +764,178 @@ bool build_append_notification_callback(Aml *parent_s= cope, const PCIBus *bus) return !!nr_notifiers; } =20 +static void build_append_pcihp_notify_entry(Aml *method, int slot) +{ + Aml *if_ctx; + int32_t devfn =3D PCI_DEVFN(slot, 0); + + if_ctx =3D aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL)); + aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1))); + aml_append(method, if_ctx); +} + +static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus) +{ + const PCIDevice *pdev =3D bus->devices[devfn]; + + if (PCI_FUNC(devfn)) { + if (IS_PCI_BRIDGE(pdev)) { + /* + * Ignore only hotplugged PCI bridges on !0 functions, but + * allow describing cold plugged bridges on all functions + */ + if (DEVICE(pdev)->hotplugged) { + return true; + } + } + } + return false; +} + +static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus) +{ + PCIDevice *pdev =3D bus->devices[devfn]; + if (pdev) { + return is_devfn_ignored_generic(devfn, bus) || + !DEVICE_GET_CLASS(pdev)->hotpluggable || + /* Cold plugged bridges aren't themselves hot-pluggable */ + (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged); + } else { /* non populated slots */ + /* + * hotplug is supported only for non-multifunction device + * so generate device description only for function 0 + */ + if (PCI_FUNC(devfn) || + (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) { + return true; + } + } + return false; +} + +static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev) +{ + Aml *method; + + g_assert(pdev->acpi_index !=3D 0); + method =3D aml_method("_DSM", 4, AML_SERIALIZED); + { + Aml *params =3D aml_local(0); + Aml *pkg =3D aml_package(1); + aml_append(pkg, aml_int(pdev->acpi_index)); + aml_append(method, aml_store(pkg, params)); + aml_append(method, + aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1), + aml_arg(2), aml_arg(3), params)) + ); + } + return method; +} + +static Aml *aml_pci_device_dsm(void) +{ + Aml *method; + + method =3D aml_method("_DSM", 4, AML_SERIALIZED); + { + Aml *params =3D aml_local(0); + Aml *pkg =3D aml_package(2); + aml_append(pkg, aml_int(0)); + aml_append(pkg, aml_int(0)); + aml_append(method, aml_store(pkg, params)); + aml_append(method, + aml_store(aml_name("BSEL"), aml_index(params, aml_int(0)))); + aml_append(method, + aml_store(aml_name("ASUN"), aml_index(params, aml_int(1)))); + aml_append(method, + aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1), + aml_arg(2), aml_arg(3), params)) + ); + } + return method; +} + +void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus) +{ + int devfn; + Aml *dev, *notify_method =3D NULL, *method; + QObject *bsel =3D object_property_get_qobject(OBJECT(bus), + ACPI_PCIHP_PROP_BSEL, NULL); + uint64_t bsel_val =3D qnum_get_uint(qobject_to(QNum, bsel)); + qobject_unref(bsel); + + aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val))); + notify_method =3D aml_method("DVNT", 2, AML_NOTSERIALIZED); + + for (devfn =3D 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { + int slot =3D PCI_SLOT(devfn); + int adr =3D slot << 16 | PCI_FUNC(devfn); + + if (is_devfn_ignored_hotplug(devfn, bus)) { + continue; + } + + if (bus->devices[devfn]) { + dev =3D aml_scope("S%.02X", devfn); + } else { + dev =3D aml_device("S%.02X", devfn); + aml_append(dev, aml_name_decl("_ADR", aml_int(adr))); + } + + /* + * Can't declare _SUN here for every device as it changes 'slot' + * enumeration order in linux kernel, so use another variable for = it + */ + aml_append(dev, aml_name_decl("ASUN", aml_int(slot))); + aml_append(dev, aml_pci_device_dsm()); + + aml_append(dev, aml_name_decl("_SUN", aml_int(slot))); + /* add _EJ0 to make slot hotpluggable */ + method =3D aml_method("_EJ0", 1, AML_NOTSERIALIZED); + aml_append(method, + aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN")) + ); + aml_append(dev, method); + + build_append_pcihp_notify_entry(notify_method, slot); + + /* device descriptor has been composed, add it into parent context= */ + aml_append(parent_scope, dev); + } + aml_append(parent_scope, notify_method); +} + +void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus) +{ + int devfn; + Aml *dev; + + for (devfn =3D 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { + /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */ + int adr =3D PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn); + PCIDevice *pdev =3D bus->devices[devfn]; + + if (!pdev || is_devfn_ignored_generic(devfn, bus)) { + continue; + } + + /* start to compose PCI device descriptor */ + dev =3D aml_device("S%.02X", devfn); + aml_append(dev, aml_name_decl("_ADR", aml_int(adr))); + + call_dev_aml_func(DEVICE(bus->devices[devfn]), dev); + /* add _DSM if device has acpi-index set */ + if (pdev->acpi_index && + !object_property_get_bool(OBJECT(pdev), "hotpluggable", + &error_abort)) { + aml_append(dev, aml_pci_static_endpoint_dsm(pdev)); + } + + /* device descriptor has been composed, add it into parent context= */ + aml_append(parent_scope, dev); + } +} + const VMStateDescription vmstate_acpi_pcihp_pci_status =3D { .name =3D "acpi_pcihp_pci_status", .version_id =3D 1, diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index f08ce407c8..06b4b8eed4 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -338,29 +338,6 @@ build_facs(GArray *table_data) g_array_append_vals(table_data, reserved, 40); /* Reserved */ } =20 -static Aml *aml_pci_device_dsm(void) -{ - Aml *method; - - method =3D aml_method("_DSM", 4, AML_SERIALIZED); - { - Aml *params =3D aml_local(0); - Aml *pkg =3D aml_package(2); - aml_append(pkg, aml_int(0)); - aml_append(pkg, aml_int(0)); - aml_append(method, aml_store(pkg, params)); - aml_append(method, - aml_store(aml_name("BSEL"), aml_index(params, aml_int(0)))); - aml_append(method, - aml_store(aml_name("ASUN"), aml_index(params, aml_int(1)))); - aml_append(method, - aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1), - aml_arg(2), aml_arg(3), params)) - ); - } - return method; -} - static Aml *aml_pci_edsm(void) { Aml *method, *ifctx; @@ -414,155 +391,6 @@ static Aml *aml_pci_edsm(void) return method; } =20 -static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev) -{ - Aml *method; - - g_assert(pdev->acpi_index !=3D 0); - method =3D aml_method("_DSM", 4, AML_SERIALIZED); - { - Aml *params =3D aml_local(0); - Aml *pkg =3D aml_package(1); - aml_append(pkg, aml_int(pdev->acpi_index)); - aml_append(method, aml_store(pkg, params)); - aml_append(method, - aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1), - aml_arg(2), aml_arg(3), params)) - ); - } - return method; -} - -static void build_append_pcihp_notify_entry(Aml *method, int slot) -{ - Aml *if_ctx; - int32_t devfn =3D PCI_DEVFN(slot, 0); - - if_ctx =3D aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL)); - aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1))); - aml_append(method, if_ctx); -} - -static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus) -{ - const PCIDevice *pdev =3D bus->devices[devfn]; - - if (PCI_FUNC(devfn)) { - if (IS_PCI_BRIDGE(pdev)) { - /* - * Ignore only hotplugged PCI bridges on !0 functions, but - * allow describing cold plugged bridges on all functions - */ - if (DEVICE(pdev)->hotplugged) { - return true; - } - } - } - return false; -} - -static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus) -{ - PCIDevice *pdev =3D bus->devices[devfn]; - if (pdev) { - return is_devfn_ignored_generic(devfn, bus) || - !DEVICE_GET_CLASS(pdev)->hotpluggable || - /* Cold plugged bridges aren't themselves hot-pluggable */ - (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged); - } else { /* non populated slots */ - /* - * hotplug is supported only for non-multifunction device - * so generate device description only for function 0 - */ - if (PCI_FUNC(devfn) || - (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) { - return true; - } - } - return false; -} - -void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus) -{ - int devfn; - Aml *dev, *notify_method =3D NULL, *method; - QObject *bsel =3D object_property_get_qobject(OBJECT(bus), - ACPI_PCIHP_PROP_BSEL, NULL); - uint64_t bsel_val =3D qnum_get_uint(qobject_to(QNum, bsel)); - qobject_unref(bsel); - - aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val))); - notify_method =3D aml_method("DVNT", 2, AML_NOTSERIALIZED); - - for (devfn =3D 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { - int slot =3D PCI_SLOT(devfn); - int adr =3D slot << 16 | PCI_FUNC(devfn); - - if (is_devfn_ignored_hotplug(devfn, bus)) { - continue; - } - - if (bus->devices[devfn]) { - dev =3D aml_scope("S%.02X", devfn); - } else { - dev =3D aml_device("S%.02X", devfn); - aml_append(dev, aml_name_decl("_ADR", aml_int(adr))); - } - - /* - * Can't declare _SUN here for every device as it changes 'slot' - * enumeration order in linux kernel, so use another variable for = it - */ - aml_append(dev, aml_name_decl("ASUN", aml_int(slot))); - aml_append(dev, aml_pci_device_dsm()); - - aml_append(dev, aml_name_decl("_SUN", aml_int(slot))); - /* add _EJ0 to make slot hotpluggable */ - method =3D aml_method("_EJ0", 1, AML_NOTSERIALIZED); - aml_append(method, - aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN")) - ); - aml_append(dev, method); - - build_append_pcihp_notify_entry(notify_method, slot); - - /* device descriptor has been composed, add it into parent context= */ - aml_append(parent_scope, dev); - } - aml_append(parent_scope, notify_method); -} - -void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus) -{ - int devfn; - Aml *dev; - - for (devfn =3D 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { - /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */ - int adr =3D PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn); - PCIDevice *pdev =3D bus->devices[devfn]; - - if (!pdev || is_devfn_ignored_generic(devfn, bus)) { - continue; - } - - /* start to compose PCI device descriptor */ - dev =3D aml_device("S%.02X", devfn); - aml_append(dev, aml_name_decl("_ADR", aml_int(adr))); - - call_dev_aml_func(DEVICE(bus->devices[devfn]), dev); - /* add _DSM if device has acpi-index set */ - if (pdev->acpi_index && - !object_property_get_bool(OBJECT(pdev), "hotpluggable", - &error_abort)) { - aml_append(dev, aml_pci_static_endpoint_dsm(pdev)); - } - - /* device descriptor has been composed, add it into parent context= */ - aml_append(parent_scope, dev); - } -} - /* * build_prt - Define interrupt routing rules * --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1747242632; cv=none; d=zohomail.com; s=zohoarc; b=iNUoUNshQS6wkxWmasi/BxVfMkIVv96tTZh7T6avEbHeN3RF8EIqkXieceLdBbtl2NaW+NCvN+j+R7idDUGYU/rGASbv/I6cD8kMdHYK/fnXaqBqWsH64pyZNBlo9w9iRDKkEAM7NXBwNkh9pfLEpZ0iiMqZzSuU4s1VV5y+8xE= ARC-Message-Signature: i=1; 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charset="utf-8" pcihp acpi_set_pci_info() generic code currently uses acpi_get_i386_pci_host() to retrieve the pci host bridge. Let's rename acpi_get_i386_pci_host into acpi_get_pci_host and move it in pci generic code. The helper is augmented with the support of ARM GPEX. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- include/hw/acpi/pci.h | 2 ++ hw/acpi/pci.c | 20 ++++++++++++++++++++ hw/acpi/pcihp.c | 3 ++- hw/i386/acpi-build.c | 24 ++++-------------------- 4 files changed, 28 insertions(+), 21 deletions(-) diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h index 4dca22c0e2..310cbd02db 100644 --- a/include/hw/acpi/pci.h +++ b/include/hw/acpi/pci.h @@ -41,4 +41,6 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope); =20 void build_srat_generic_affinity_structures(GArray *table_data); =20 +Object *acpi_get_pci_host(void); + #endif diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c index d511a85029..4191886ebe 100644 --- a/hw/acpi/pci.c +++ b/hw/acpi/pci.c @@ -26,6 +26,7 @@ #include "qemu/osdep.h" #include "qemu/error-report.h" #include "qom/object_interfaces.h" +#include "qom/object.h" #include "qapi/error.h" #include "hw/boards.h" #include "hw/acpi/aml-build.h" @@ -33,6 +34,9 @@ #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_device.h" #include "hw/pci/pcie_host.h" +#include "hw/pci-host/i440fx.h" +#include "hw/pci-host/q35.h" +#include "hw/pci-host/gpex.h" =20 /* * PCI Firmware Specification, Revision 3.0 @@ -301,3 +305,19 @@ void build_srat_generic_affinity_structures(GArray *ta= ble_data) object_child_foreach_recursive(object_get_root(), build_acpi_generic_p= ort, table_data); } + +Object *acpi_get_pci_host(void) +{ + Object *host; + + host =3D object_resolve_type_unambiguous(TYPE_I440FX_PCI_HOST_BRIDGE, = NULL); + if (host) { + return host; + } + host =3D object_resolve_type_unambiguous(TYPE_Q35_HOST_DEVICE, NULL); + if (host) { + return host; + } + host =3D object_resolve_type_unambiguous(TYPE_GPEX_HOST, NULL); + return host; +} diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 942669ea89..d800371ddc 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -36,6 +36,7 @@ #include "hw/pci-bridge/xio3130_downstream.h" #include "hw/i386/acpi-build.h" #include "hw/acpi/acpi.h" +#include "hw/acpi/pci.h" #include "hw/pci/pci_bus.h" #include "migration/vmstate.h" #include "qapi/error.h" @@ -102,7 +103,7 @@ static void *acpi_set_bsel(PCIBus *bus, void *opaque) static void acpi_set_pci_info(bool has_bridge_hotplug) { static bool bsel_is_set; - Object *host =3D acpi_get_i386_pci_host(); + Object *host =3D acpi_get_pci_host(); PCIBus *bus; BSELInfo info =3D { .bsel_alloc =3D ACPI_PCIHP_BSEL_DEFAULT, .has_bridge_hotplug =3D has_bridge_hotplug }; diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 06b4b8eed4..bcfba2ccb3 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -269,27 +269,11 @@ static void acpi_get_misc_info(AcpiMiscInfo *info) #endif } =20 -/* - * Because of the PXB hosts we cannot simply query TYPE_PCI_HOST_BRIDGE. - * On i386 arch we only have two pci hosts, so we can look only for them. - */ -Object *acpi_get_i386_pci_host(void) -{ - PCIHostState *host; - - host =3D PCI_HOST_BRIDGE(object_resolve_path("/machine/i440fx", NULL)); - if (!host) { - host =3D PCI_HOST_BRIDGE(object_resolve_path("/machine/q35", NULL)= ); - } - - return OBJECT(host); -} - static void acpi_get_pci_holes(Range *hole, Range *hole64) { Object *pci_host; =20 - pci_host =3D acpi_get_i386_pci_host(); + pci_host =3D acpi_get_pci_host(); =20 if (!pci_host) { return; @@ -1245,7 +1229,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, =20 sb_scope =3D aml_scope("\\_SB"); { - Object *pci_host =3D acpi_get_i386_pci_host(); + Object *pci_host =3D acpi_get_pci_host(); =20 if (pci_host) { PCIBus *pbus =3D PCI_HOST_BRIDGE(pci_host)->bus; @@ -1306,7 +1290,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, if (pm->pcihp_bridge_en || pm->pcihp_root_en) { bool has_pcnt; =20 - Object *pci_host =3D acpi_get_i386_pci_host(); + Object *pci_host =3D acpi_get_pci_host(); PCIBus *b =3D PCI_HOST_BRIDGE(pci_host)->bus; =20 scope =3D aml_scope("\\_SB.PCI0"); @@ -1946,7 +1930,7 @@ static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg) Object *pci_host; QObject *o; =20 - pci_host =3D acpi_get_i386_pci_host(); + pci_host =3D acpi_get_pci_host(); if (!pci_host) { return false; } --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; 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b=RdDMySuNYY31A5Uevca4nYj0+FQtGpDj818j9Sghjy72p7SInk4VCwd9WUQ2WVtm7tfg/p 8qkXgUtowpmh9XqeYfzFKRtBnHklaSIhjU6mMWQ+7Xi6/JJhDLWlI9PBPYcq1TqWVP/tSe cjensTFWDhkuAby6FThqBN3L8lmct+0= X-MC-Unique: ot_0TCqROiywFIWqRor7vg-1 X-Mimecast-MFC-AGG-ID: ot_0TCqROiywFIWqRor7vg_1747242350 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 14/22] hw/i386/acpi-build: Move aml_pci_edsm to a generic place Date: Wed, 14 May 2025 19:01:01 +0200 Message-ID: <20250514170431.2786231-15-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Move aml_pci_edsm to pcihp since we want to reuse that for ARM and acpi-index support. Signed-off-by: Eric Auger --- include/hw/acpi/pcihp.h | 2 ++ hw/acpi/pcihp.c | 53 +++++++++++++++++++++++++++++++++++++++++ hw/i386/acpi-build.c | 53 ----------------------------------------- 3 files changed, 55 insertions(+), 53 deletions(-) diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index 4d820b4baf..bc31dbff39 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -82,6 +82,8 @@ bool build_append_notification_callback(Aml *parent_scope= , const PCIBus *bus); =20 void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus); =20 +Aml *aml_pci_edsm(void); + /* Called on reset */ void acpi_pcihp_reset(AcpiPciHpState *s); =20 diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index d800371ddc..57fe8938b1 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -937,6 +937,59 @@ void build_append_pci_bus_devices(Aml *parent_scope, P= CIBus *bus) } } =20 +Aml *aml_pci_edsm(void) +{ + Aml *method, *ifctx; + Aml *zero =3D aml_int(0); + Aml *func =3D aml_arg(2); + Aml *ret =3D aml_local(0); + Aml *aidx =3D aml_local(1); + Aml *params =3D aml_arg(4); + + method =3D aml_method("EDSM", 5, AML_SERIALIZED); + + /* get supported functions */ + ifctx =3D aml_if(aml_equal(func, zero)); + { + /* 1: have supported functions */ + /* 7: support for function 7 */ + const uint8_t caps =3D 1 | BIT(7); + build_append_pci_dsm_func0_common(ifctx, ret); + aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero))); + aml_append(ifctx, aml_return(ret)); + } + aml_append(method, ifctx); + + /* handle specific functions requests */ + /* + * PCI Firmware Specification 3.1 + * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under + * Operating Systems + */ + ifctx =3D aml_if(aml_equal(func, aml_int(7))); + { + Aml *pkg =3D aml_package(2); + aml_append(pkg, zero); + /* optional, if not impl. should return null string */ + aml_append(pkg, aml_string("%s", "")); + aml_append(ifctx, aml_store(pkg, ret)); + + /* + * IASL is fine when initializing Package with computational data, + * however it makes guest unhappy /it fails to process such AML/. + * So use runtime assignment to set acpi-index after initializer + * to make OSPM happy. + */ + aml_append(ifctx, + aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx)); + aml_append(ifctx, aml_store(aidx, aml_index(ret, zero))); + aml_append(ifctx, aml_return(ret)); + } + aml_append(method, ifctx); + + return method; +} + const VMStateDescription vmstate_acpi_pcihp_pci_status =3D { .name =3D "acpi_pcihp_pci_status", .version_id =3D 1, diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index bcfba2ccb3..385e75d061 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -322,59 +322,6 @@ build_facs(GArray *table_data) g_array_append_vals(table_data, reserved, 40); /* Reserved */ } =20 -static Aml *aml_pci_edsm(void) -{ - Aml *method, *ifctx; - Aml *zero =3D aml_int(0); - Aml *func =3D aml_arg(2); - Aml *ret =3D aml_local(0); - Aml *aidx =3D aml_local(1); - Aml *params =3D aml_arg(4); - - method =3D aml_method("EDSM", 5, AML_SERIALIZED); - - /* get supported functions */ - ifctx =3D aml_if(aml_equal(func, zero)); - { - /* 1: have supported functions */ - /* 7: support for function 7 */ - const uint8_t caps =3D 1 | BIT(7); - build_append_pci_dsm_func0_common(ifctx, ret); - aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero))); - aml_append(ifctx, aml_return(ret)); - } - aml_append(method, ifctx); - - /* handle specific functions requests */ - /* - * PCI Firmware Specification 3.1 - * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under - * Operating Systems - */ - ifctx =3D aml_if(aml_equal(func, aml_int(7))); - { - Aml *pkg =3D aml_package(2); - aml_append(pkg, zero); - /* optional, if not impl. should return null string */ - aml_append(pkg, aml_string("%s", "")); - aml_append(ifctx, aml_store(pkg, ret)); - - /* - * IASL is fine when initializing Package with computational data, - * however it makes guest unhappy /it fails to process such AML/. - * So use runtime assignment to set acpi-index after initializer - * to make OSPM happy. - */ - aml_append(ifctx, - aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx)); - aml_append(ifctx, aml_store(aidx, aml_index(ret, zero))); - aml_append(ifctx, aml_return(ret)); - } - aml_append(method, ifctx); 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Wed, 14 May 2025 17:05:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1747242360; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aEG1v7qYwyhYnnCowUaIRbxAXHrWCuXwUQVXOPAcN0U=; b=JF6GIxnx+8otVdYyCO/GUDH2NXv4r94C9SF3uIPvQWI5OcTsk97Kf8k2+0TBIpNzT1e4fl NMo4bILvkAmFSGnfWkOOO1FDx64ejRzPRypAg9WeCbLGSngBOVkdvcjlrd5gm2vkWE5zEf pEZbZv/5wMilJtBKMZfnxJctPiA+tDw= X-MC-Unique: cvcKi6y6Mh2pkcD8iB8KOQ-1 X-Mimecast-MFC-AGG-ID: cvcKi6y6Mh2pkcD8iB8KOQ_1747242356 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 15/22] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug Date: Wed, 14 May 2025 19:01:02 +0200 Message-ID: <20250514170431.2786231-16-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Modify the DSDT ACPI table to enable ACPI PCI hotplug. Signed-off-by: Eric Auger --- include/hw/arm/virt.h | 1 + hw/arm/virt-acpi-build.c | 25 +++++++++++++++++++++++++ hw/arm/virt.c | 1 + hw/arm/Kconfig | 2 ++ 4 files changed, 29 insertions(+) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 10ea581f06..1b2e2e1284 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -79,6 +79,7 @@ enum { VIRT_ACPI_GED, VIRT_NVDIMM_ACPI, VIRT_PVTIME, + VIRT_ACPI_PCIHP, VIRT_LOWMEMMAP_LAST, }; =20 diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index be5e00a56e..2b642e2426 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -34,6 +34,7 @@ #include "hw/core/cpu.h" #include "hw/acpi/acpi-defs.h" #include "hw/acpi/acpi.h" +#include "hw/acpi/pcihp.h" #include "hw/nvram/fw_cfg_acpi.h" #include "hw/acpi/bios-linker-loader.h" #include "hw/acpi/aml-build.h" @@ -836,6 +837,30 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, Vir= tMachineState *vms) (irqmap[VIRT_MMIO] + ARM_SPI_BASE), 0, NUM_VIRTIO_TRANSPORTS); acpi_dsdt_add_pci(scope, memmap, irqmap[VIRT_PCIE] + ARM_SPI_BASE, vms= ); + + aml_append(dsdt, scope); + + if (vms->acpi_pcihp) { + Aml *pci0_scope =3D aml_scope("\\_SB.PCI0"); + + aml_append(pci0_scope, aml_pci_edsm()); + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_MEMORY, + memmap[VIRT_ACPI_PCIHP].base); + build_append_pcihp_resources(pci0_scope, + memmap[VIRT_ACPI_PCIHP].base, + memmap[VIRT_ACPI_PCIHP].size); + + /* Scan all PCI buses. Generate tables to support hotplug. */ + build_append_pci_bus_devices(pci0_scope, vms->bus); + if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) { + build_append_pcihp_slots(pci0_scope, vms->bus); + } + build_append_notification_callback(pci0_scope, vms->bus); + aml_append(dsdt, pci0_scope); + } + + scope =3D aml_scope("\\_SB"); + if (vms->acpi_dev) { build_ged_aml(scope, "\\_SB."GED_DEVICE, HOTPLUG_HANDLER(vms->acpi_dev), diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a0deeaf2b3..4aa40c8e8b 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -183,6 +183,7 @@ static const MemMapEntry base_memmap[] =3D { [VIRT_NVDIMM_ACPI] =3D { 0x09090000, NVDIMM_ACPI_IO_LEN}, [VIRT_PVTIME] =3D { 0x090a0000, 0x00010000 }, [VIRT_SECURE_GPIO] =3D { 0x090b0000, 0x00001000 }, + [VIRT_ACPI_PCIHP] =3D { 0x090c0000, 0x00001000 }, [VIRT_MMIO] =3D { 0x0a000000, 0x00000200 }, /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that siz= e */ [VIRT_PLATFORM_BUS] =3D { 0x0c000000, 0x02000000 }, diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index a55b44d7bd..572b4dabd5 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -34,6 +34,8 @@ config ARM_VIRT select ACPI_HW_REDUCED select ACPI_APEI select ACPI_VIOT + select ACPI_PCIHP + select ACPI_PCI_BRIDGE select VIRTIO_MEM_SUPPORTED select ACPI_CXL select ACPI_HMAT --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" QEMU will notify the OS about PCI hotplug/hotunplug events through GED interrupts. Let the GED device handle a new PCI hotplug event. On its occurrence it calls the \\_SB.PCI0.PCNT method with the BLCK mutex held. The GED device uses a dedicated MMIO region that will be mapped by the machine code. At this point the GED still does not support PCI device hotplug in its TYPE_HOTPLUG_HANDLER implementation. This will come in a subsequent patch. Signed-off-by: Eric Auger --- include/hw/acpi/generic_event_device.h | 5 +++++ include/hw/acpi/pcihp.h | 2 ++ hw/acpi/generic_event_device.c | 15 +++++++++++++++ hw/acpi/pcihp.c | 1 - 4 files changed, 22 insertions(+), 1 deletion(-) diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/gener= ic_event_device.h index d2dac87b4a..28be6c0582 100644 --- a/include/hw/acpi/generic_event_device.h +++ b/include/hw/acpi/generic_event_device.h @@ -63,6 +63,7 @@ #include "hw/acpi/memory_hotplug.h" #include "hw/acpi/ghes.h" #include "hw/acpi/cpu.h" +#include "hw/acpi/pcihp.h" #include "qom/object.h" =20 #define ACPI_POWER_BUTTON_DEVICE "PWRB" @@ -101,6 +102,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(AcpiGedState, ACPI_GED) #define ACPI_GED_PWR_DOWN_EVT 0x2 #define ACPI_GED_NVDIMM_HOTPLUG_EVT 0x4 #define ACPI_GED_CPU_HOTPLUG_EVT 0x8 +#define ACPI_GED_PCI_HOTPLUG_EVT 0x10 =20 typedef struct GEDState { MemoryRegion evt; @@ -114,6 +116,9 @@ struct AcpiGedState { MemoryRegion container_memhp; CPUHotplugState cpuhp_state; MemoryRegion container_cpuhp; + AcpiPciHpState pcihp_state; + MemoryRegion container_pcihp; + GEDState ged_state; uint32_t ged_event_bitmap; qemu_irq irq; diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index bc31dbff39..bda5ea24b5 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -38,6 +38,8 @@ #define ACPI_PCIHP_SEJ_BASE 0x8 #define ACPI_PCIHP_BNMR_BASE 0x10 =20 +#define ACPI_PCIHP_SIZE 0x0018 + typedef struct AcpiPciHpPciStatus { uint32_t up; uint32_t down; diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index 7a62f8d5bc..dc3620553d 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -12,6 +12,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/acpi/acpi.h" +#include "hw/acpi/pcihp.h" #include "hw/acpi/generic_event_device.h" #include "hw/irq.h" #include "hw/mem/pc-dimm.h" @@ -26,6 +27,7 @@ static const uint32_t ged_supported_events[] =3D { ACPI_GED_PWR_DOWN_EVT, ACPI_GED_NVDIMM_HOTPLUG_EVT, ACPI_GED_CPU_HOTPLUG_EVT, + ACPI_GED_PCI_HOTPLUG_EVT, }; =20 /* @@ -121,6 +123,12 @@ void build_ged_aml(Aml *table, const char *name, Hotpl= ugHandler *hotplug_dev, aml_notify(aml_name("\\_SB.NVDR"), aml_int(0x80))); break; + case ACPI_GED_PCI_HOTPLUG_EVT: + aml_append(if_ctx, + aml_acquire(aml_name("\\_SB.PCI0.BLCK"), 0xFFFF= )); + aml_append(if_ctx, aml_call0("\\_SB.PCI0.PCNT")); + aml_append(if_ctx, aml_release(aml_name("\\_SB.PCI0.BLCK")= )); + break; default: /* * Please make sure all the events in ged_supported_events= [] @@ -299,6 +307,8 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, Acp= iEventStatusBits ev) sel =3D ACPI_GED_NVDIMM_HOTPLUG_EVT; } else if (ev & ACPI_CPU_HOTPLUG_STATUS) { sel =3D ACPI_GED_CPU_HOTPLUG_EVT; + } else if (ev & ACPI_PCI_HOTPLUG_STATUS) { + sel =3D ACPI_GED_PCI_HOTPLUG_EVT; } else { /* Unknown event. Return without generating interrupt. */ warn_report("GED: Unsupported event %d. No irq injected", ev); @@ -428,6 +438,11 @@ static void acpi_ged_realize(DeviceState *dev, Error *= *errp) cpu_hotplug_hw_init(&s->container_cpuhp, OBJECT(dev), &s->cpuhp_state, 0); break; + case ACPI_GED_PCI_HOTPLUG_EVT: + memory_region_init(&s->container_pcihp, OBJECT(dev), + "pcihp container", + ACPI_PCIHP_SIZE); + sysbus_init_mmio(sbd, &s->container_pcihp); } ged_events--; } diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 57fe8938b1..e87846a1fa 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -44,7 +44,6 @@ #include "qobject/qnum.h" #include "trace.h" =20 -#define ACPI_PCIHP_SIZE 0x0018 #define PCI_UP_BASE 0x0000 #define PCI_DOWN_BASE 0x0004 #define PCI_EJ_BASE 0x0008 --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; 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b=MdS5YH1teC1UOAF5Qxthaahf18J1aQbBeglfGrRtkE7IVkBbVR5rB3M3ryItdOtZA7KC7s LAiLDYwoW4fAvq4K+d758l5DlSsIkW2t/FNgu/YMJ2UMWoLceB2SW+YonF5ZxMcD9+39UL c6gYl1ZGE0PBL+qPk5Q9jVhXhamkqBs= X-MC-Unique: npVmSQDjNkmhv1J-rz1Hbw-1 X-Mimecast-MFC-AGG-ID: npVmSQDjNkmhv1J-rz1Hbw_1747242366 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 17/22] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation Date: Wed, 14 May 2025 19:01:04 +0200 Message-ID: <20250514170431.2786231-18-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Add PCI device related code in the TYPE_HOTPLUG_HANDLER implementation. For a PCI device hotplug/hotunplug event, the code routes to acpi_pcihp_device callbacks (pre_plug_cb, plug_cb, unplug_request_cb, unplug_cb). Signed-off-by: Eric Auger --- hw/acpi/generic_event_device.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index dc3620553d..519329e2ef 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -17,6 +17,7 @@ #include "hw/irq.h" #include "hw/mem/pc-dimm.h" #include "hw/mem/nvdimm.h" +#include "hw/pci/pci_device.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "qemu/error-report.h" @@ -235,6 +236,17 @@ static const MemoryRegionOps ged_regs_ops =3D { }, }; =20 +static void acpi_ged_device_pre_plug_cb(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp); + } else { + error_setg(errp, "virt: device pre plug request for unsupported de= vice" + " type: %s", object_get_typename(OBJECT(dev))); + } +} + static void acpi_ged_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { @@ -248,6 +260,8 @@ static void acpi_ged_device_plug_cb(HotplugHandler *hot= plug_dev, } } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + acpi_pcihp_device_plug_cb(hotplug_dev, &s->pcihp_state, dev, errp); } else { error_setg(errp, "virt: device plug request for unsupported device" " type: %s", object_get_typename(OBJECT(dev))); @@ -264,6 +278,9 @@ static void acpi_ged_unplug_request_cb(HotplugHandler *= hotplug_dev, acpi_memory_unplug_request_cb(hotplug_dev, &s->memhp_state, dev, e= rrp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { acpi_cpu_unplug_request_cb(hotplug_dev, &s->cpuhp_state, dev, errp= ); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + acpi_pcihp_device_unplug_request_cb(hotplug_dev, &s->pcihp_state, + dev, errp); } else { error_setg(errp, "acpi: device unplug request for unsupported devi= ce" " type: %s", object_get_typename(OBJECT(dev))); @@ -279,6 +296,8 @@ static void acpi_ged_unplug_cb(HotplugHandler *hotplug_= dev, acpi_memory_unplug_cb(&s->memhp_state, dev, errp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { acpi_cpu_unplug_cb(&s->cpuhp_state, dev, errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + acpi_pcihp_device_unplug_cb(hotplug_dev, &s->pcihp_state, dev, err= p); } else { error_setg(errp, "acpi: device unplug for unsupported device" " type: %s", object_get_typename(OBJECT(dev))); @@ -495,6 +514,7 @@ static void acpi_ged_class_init(ObjectClass *class, con= st void *data) dc->vmsd =3D &vmstate_acpi_ged; dc->realize =3D acpi_ged_realize; =20 + hc->pre_plug =3D acpi_ged_device_pre_plug_cb; hc->plug =3D acpi_ged_device_plug_cb; hc->unplug_request =3D acpi_ged_unplug_request_cb; hc->unplug =3D acpi_ged_unplug_cb; --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1747242623; cv=none; d=zohomail.com; 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Wed, 14 May 2025 17:06:11 +0000 (UTC) Received: from laptop.redhat.com (unknown [10.44.32.14]) by mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 1868C30001B0; Wed, 14 May 2025 17:06:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1747242374; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=fPyOK2VchnLZfJfkfu8IoakAVfUzKAuu0tY366YCejk=; b=Kmm/SoKhuXyr2QEdkD5YWZMx8PtPMnHurEJfD3MzkzRZHEIZuN7uH4ksX0DS9ksZR+8Frn PTa3skhAual+5VR4ssBudaCscT4hRoNdTPkYimxMIjdXDcgwiwaqiTmlKHIK5+iSFxNQVv /pfimb0RDO2WhgXRBDNyKYgUTGY0AAA= X-MC-Unique: yOUxTYKBNOuEUmBT5oEsAQ-1 X-Mimecast-MFC-AGG-ID: yOUxTYKBNOuEUmBT5oEsAQ_1747242371 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 18/22] hw/acpi/ged: Support migration of AcpiPciHpState Date: Wed, 14 May 2025 19:01:05 +0200 Message-ID: <20250514170431.2786231-19-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Add a subsection to migrate the AcpiPciHpState state. Signed-off-by: Eric Auger --- hw/acpi/generic_event_device.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index 519329e2ef..30751c2bcc 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -415,6 +415,25 @@ static const VMStateDescription vmstate_ghes_state =3D= { } }; =20 +static bool pcihp_needed(void *opaque) +{ + AcpiGedState *s =3D opaque; + return s->pcihp_state.use_acpi_hotplug_bridge; +} + +static const VMStateDescription vmstate_pcihp_state =3D { + .name =3D "acpi-ged/pcihp", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D pcihp_needed, + .fields =3D (const VMStateField[]) { + VMSTATE_PCI_HOTPLUG(pcihp_state, + AcpiGedState, + NULL, NULL), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_acpi_ged =3D { .name =3D "acpi-ged", .version_id =3D 1, @@ -427,6 +446,7 @@ static const VMStateDescription vmstate_acpi_ged =3D { &vmstate_memhp_state, &vmstate_cpuhp_state, &vmstate_ghes_state, + &vmstate_pcihp_state, NULL } }; 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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1747242381; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ENcWQhSiq/mDYXzO0B3NWUXB9XTPdOHL4+pzW85tp58=; b=BnWNoKvdGt19QMrxqM/8LRpjil1efkf3PnpJs4Y7tjh6LT/SRtry19Ry9gksrcTLArMq7n Rvhv/R/GY+Wg8O1p5hfwy20i2TTjFtznkvnuGxqFDumhujCCVd109rmtMBfRHcPmZfh96t xuoC+p/PEM6oxsz6B69BgDbQRz7qHDU= X-MC-Unique: SQdxvN-HNw28ptnKDS580Q-1 X-Mimecast-MFC-AGG-ID: SQdxvN-HNw28ptnKDS580Q_1747242376 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 19/22] hw/core/sysbus: Introduce sysbus_mmio_map_name() helper Date: Wed, 14 May 2025 19:01:06 +0200 Message-ID: <20250514170431.2786231-20-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Some sysbus devices have conditionnal mmio regions. This happens for instance with the hw/acpi/ged device. In that case it becomes difficult to predict which index a specific MMIO region corresponds to when one needs to mmio map the region. Introduce a new helper that takes the name of the region instead of its index. If the region is not found this returns -1. Otherwise it maps the corresponding index and returns this latter. Signed-off-by: Eric Auger --- include/hw/sysbus.h | 1 + hw/core/sysbus.c | 11 +++++++++++ 2 files changed, 12 insertions(+) diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index 7dc88aaa27..18fde8a7b4 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -82,6 +82,7 @@ void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_ir= q irq); bool sysbus_is_irq_connected(SysBusDevice *dev, int n); qemu_irq sysbus_get_connected_irq(SysBusDevice *dev, int n); void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr addr); +int sysbus_mmio_map_name(SysBusDevice *dev, const char*name, hwaddr addr); void sysbus_mmio_map_overlap(SysBusDevice *dev, int n, hwaddr addr, int priority); =20 diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index e71367adfb..ec69e877a2 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -151,6 +151,17 @@ void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr = addr) sysbus_mmio_map_common(dev, n, addr, false, 0); } =20 +int sysbus_mmio_map_name(SysBusDevice *dev, const char *name, hwaddr addr) +{ + for (int i =3D 0; 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Wed, 14 May 2025 17:06:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1747242386; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=q83CkXF8NEiBj3QV+2hl2ecjW+MQWvpfAJhE5AVyMh4=; b=Bhl6jtG0tvouPKxGwBh3vgGhsawfQaVwG9o+7Bfy6Z+PW9nG636MXxvCu4R1DrYHVIPPSM QA3J5wR2kozfUwc1EURGywDgNsYJOw8iK5AXa8u+87+C+dlLMEZ8IXlES9ebSmnLAdNZbU BGn0TGSzVqHudgGtZFEbalhLu8YzOnc= X-MC-Unique: k9-PRzm1MjCITfZ5d5l8kA-1 X-Mimecast-MFC-AGG-ID: k9-PRzm1MjCITfZ5d5l8kA_1747242380 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com, philmd@linaro.org Subject: [PATCH 20/22] hw/arm/virt: Let virt support pci hotplug/unplug GED event Date: Wed, 14 May 2025 19:01:07 +0200 Message-ID: <20250514170431.2786231-21-eric.auger@redhat.com> In-Reply-To: <20250514170431.2786231-1-eric.auger@redhat.com> References: <20250514170431.2786231-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Set up the IO registers used to communicate between QEMU and ACPI. Move the create_pcie() call after the creation of the acpi ged device since hotplug callbacks will soon be called on gpex realize and will require the acpi pcihp state to be initialized. The hacky thing is the root bus has not yet been created on acpi_pcihp_init() call so it is set later after the gpex realize. How to fix this chicken & egg issue? Signed-off-by: Eric Auger --- include/hw/arm/virt.h | 1 + hw/arm/virt-acpi-build.c | 1 + hw/arm/virt.c | 42 +++++++++++++++++++++++++++++++++++----- 3 files changed, 39 insertions(+), 5 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 1b2e2e1284..a4c4e3a67a 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -35,6 +35,7 @@ #include "hw/boards.h" #include "hw/arm/boot.h" #include "hw/arm/bsa.h" +#include "hw/acpi/pcihp.h" #include "hw/block/flash.h" #include "system/kvm.h" #include "hw/intc/arm_gicv3_common.h" diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 2b642e2426..05a754d368 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -44,6 +44,7 @@ #include "hw/acpi/generic_event_device.h" #include "hw/acpi/tpm.h" #include "hw/acpi/hmat.h" +#include "hw/acpi/pcihp.h" #include "hw/pci/pcie_host.h" #include "hw/pci/pci.h" #include "hw/pci/pci_bus.h" diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 4aa40c8e8b..526c4c44be 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -682,6 +682,8 @@ static inline DeviceState *create_acpi_ged(VirtMachineS= tate *vms) { DeviceState *dev; MachineState *ms =3D MACHINE(vms); + SysBusDevice *sbdev; + int irq =3D vms->irqmap[VIRT_ACPI_GED]; uint32_t event =3D ACPI_GED_PWR_DOWN_EVT; =20 @@ -693,12 +695,28 @@ static inline DeviceState *create_acpi_ged(VirtMachin= eState *vms) event |=3D ACPI_GED_NVDIMM_HOTPLUG_EVT; } =20 + if (vms->acpi_pcihp) { + event |=3D ACPI_GED_PCI_HOTPLUG_EVT; + } + dev =3D qdev_new(TYPE_ACPI_GED); qdev_prop_set_uint32(dev, "ged-event", event); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + sbdev =3D SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sbdev, &error_fatal); =20 - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].bas= e); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].= base); + sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base); + sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base); + if (vms->acpi_pcihp) { + AcpiGedState *acpi_ged_state =3D ACPI_GED(dev); + int i; + + i =3D sysbus_mmio_map_name(sbdev, "pcihp container", + vms->memmap[VIRT_ACPI_PCIHP].base); + assert(i >=3D 0); + acpi_pcihp_init(OBJECT(dev), &acpi_ged_state->pcihp_state, + vms->bus, sysbus_mmio_get_region(sbdev, i), 0); + acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge =3D true; + } sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, = irq)); =20 return dev; @@ -1758,6 +1776,13 @@ void virt_machine_done(Notifier *notifier, void *dat= a) pci_bus_add_fw_cfg_extra_pci_roots(vms->fw_cfg, vms->bus, &error_abort); =20 + + if (vms->acpi_pcihp) { + AcpiGedState *acpi_ged_state =3D ACPI_GED(vms->acpi_dev); + + acpi_pcihp_reset(&acpi_ged_state->pcihp_state); + } + virt_acpi_setup(vms); virt_build_smbios(vms); } @@ -2395,8 +2420,6 @@ static void machvirt_init(MachineState *machine) =20 create_rtc(vms); =20 - create_pcie(vms); - if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)= ) { vms->acpi_pcihp &=3D !vmc->no_acpi_pcihp; vms->acpi_dev =3D create_acpi_ged(vms); @@ -2405,6 +2428,15 @@ static void machvirt_init(MachineState *machine) create_gpio_devices(vms, VIRT_GPIO, sysmem); } =20 + create_pcie(vms); + + if (vms->acpi_dev) { + AcpiGedState *acpi_ged_state =3D ACPI_GED(vms->acpi_dev); + + acpi_ged_state =3D ACPI_GED(vms->acpi_dev); + acpi_ged_state->pcihp_state.root =3D vms->bus; + } + if (vms->secure && !vmc->no_secure_gpio) { create_gpio_devices(vms, VIRT_SECURE_GPIO, secure_sysmem); } --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1747242550; cv=none; d=zohomail.com; s=zohoarc; b=k1V+RP5z5l2M20ATlKRvR5ybeBKq9xKN2lkexUQymDx5F0AzExToa+9Ek78jKNQiDnMoJBxMYGXdDjybA1QLTPSU4U2++F+N3IHRAL8Y00s0IETD5ySdSFpOxnmhCjP1oGsvzD8GrFN5JOgE9etWHTYbTgwjudfT+KxePSS3YKc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; 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charset="utf-8" Signed-off-by: Eric Auger --- hw/arm/virt.c | 37 ++++++++++++++++++++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 526c4c44be..ecbcc2200a 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -87,6 +87,7 @@ #include "hw/virtio/virtio-iommu.h" #include "hw/char/pl011.h" #include "qemu/guest-random.h" +#include "hw/acpi/pcihp.h" =20 static GlobalProperty arm_virt_compat[] =3D { { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "48" }, @@ -2973,6 +2974,11 @@ static void virt_machine_device_pre_plug_cb(HotplugH= andler *hotplug_dev, qlist_append_str(reserved_regions, resv_prop_str); qdev_prop_set_array(dev, "reserved-regions", reserved_regions); g_free(resv_prop_str); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + if (vms->acpi_pcihp) { + acpi_pcihp_device_pre_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev), + dev, errp); + } } } =20 @@ -3002,6 +3008,14 @@ static void virt_machine_device_plug_cb(HotplugHandl= er *hotplug_dev, vms->iommu =3D VIRT_IOMMU_VIRTIO; vms->virtio_iommu_bdf =3D pci_get_bdf(pdev); create_virtio_iommu_dt_bindings(vms); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + AcpiGedState *acpi_ged_state =3D ACPI_GED(vms->acpi_dev); + AcpiPciHpState *acpi_pci_hotplug =3D &acpi_ged_state->pcihp_state; + + if (vms->acpi_pcihp) { + acpi_pcihp_device_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev), + acpi_pci_hotplug, dev, errp); + } } } =20 @@ -3051,6 +3065,15 @@ static void virt_machine_device_unplug_request_cb(Ho= tplugHandler *hotplug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) { virtio_md_pci_unplug_request(VIRTIO_MD_PCI(dev), MACHINE(hotplug_d= ev), errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + VirtMachineState *vms =3D VIRT_MACHINE(hotplug_dev); + AcpiGedState *acpi_ged_state =3D ACPI_GED(vms->acpi_dev); + AcpiPciHpState *acpi_pci_hotplug =3D &acpi_ged_state->pcihp_state; + + if (vms->acpi_pcihp) { + acpi_pcihp_device_unplug_request_cb(HOTPLUG_HANDLER(vms->acpi_= dev), + acpi_pci_hotplug, dev, err= p); + } } else { error_setg(errp, "device unplug request for unsupported device" " type: %s", object_get_typename(OBJECT(dev))); @@ -3064,6 +3087,15 @@ static void virt_machine_device_unplug_cb(HotplugHan= dler *hotplug_dev, virt_dimm_unplug(hotplug_dev, dev, errp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) { virtio_md_pci_unplug(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev), err= p); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + VirtMachineState *vms =3D VIRT_MACHINE(hotplug_dev); + AcpiGedState *acpi_ged_state =3D ACPI_GED(vms->acpi_dev); + AcpiPciHpState *acpi_pci_hotplug =3D &acpi_ged_state->pcihp_state; + + if (vms->acpi_pcihp) { + acpi_pcihp_device_unplug_cb(HOTPLUG_HANDLER(vms->acpi_dev), + acpi_pci_hotplug, dev, errp); + } } else { error_setg(errp, "virt: device unplug for unsupported device" " type: %s", object_get_typename(OBJECT(dev))); @@ -3074,11 +3106,14 @@ static HotplugHandler *virt_machine_get_hotplug_han= dler(MachineState *machine, DeviceState *dev) { MachineClass *mc =3D MACHINE_GET_CLASS(machine); + VirtMachineState *vms =3D VIRT_MACHINE(machine); =20 if (device_is_dynamic_sysbus(mc, dev) || object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) || object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI) || - object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) || + (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE) && + vms->acpi_pcihp)) { return HOTPLUG_HANDLER(machine); } return NULL; --=20 2.49.0 From nobody Sat Nov 15 20:49:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1747242546; cv=none; d=zohomail.com; s=zohoarc; b=KW8wGMCVZVoX1bvtkHPcZEJ33KRItwz+Zi6OacRO0oHmqcVOEmqwTE+5w+MmcSs2WLyGdFnei29uMOgXKGoi0CdttCPfBrSRszfDimvDOjyGNc+lJhIlup76twnHyKyeZY1IlKKXLHILL15xM/PmeZonIxOt7jo8tbAd44Sx5no= ARC-Message-Signature: i=1; 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charset="utf-8" Now all the enablers are there for ACPI PCI hotplug support, let's use it by default for 10.1 virt machine onwards. Signed-off-by: Eric Auger --- hw/arm/virt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ecbcc2200a..abb0743af8 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3432,8 +3432,8 @@ static void virt_instance_init(Object *obj) vms->tcg_its =3D true; } =20 - /* default disallows ACPI PCI hotplug */ - vms->acpi_pcihp =3D false; + /* default allows ACPI PCI hotplug */ + vms->acpi_pcihp =3D true; =20 /* Default disallows iommu instantiation */ vms->iommu =3D VIRT_IOMMU_NONE; --=20 2.49.0