From nobody Sat Nov 15 22:26:34 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1747209916768823.0448531344655; Wed, 14 May 2025 01:05:16 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uF748-0002Z9-Ai; Wed, 14 May 2025 04:02:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uF746-0002YI-9N for qemu-devel@nongnu.org; Wed, 14 May 2025 04:02:10 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uF743-0002Ad-SK for qemu-devel@nongnu.org; Wed, 14 May 2025 04:02:10 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8DxvnP8TSRov1bmAA--.14603S3; Wed, 14 May 2025 16:02:04 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowMBxn8XkTSRofwHRAA--.9319S7; Wed, 14 May 2025 16:02:01 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: stefanha@gmail.com, maobibo@loongson.cn Subject: [PULL 05/17] hw/intc/loongarch_pch: Use relative address in MemoryRegionOps Date: Wed, 14 May 2025 15:39:15 +0800 Message-Id: <20250514073927.2424543-6-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20250514073927.2424543-1-gaosong@loongson.cn> References: <20250514073927.2424543-1-gaosong@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMBxn8XkTSRofwHRAA--.9319S7 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1747209917682116600 Content-Type: text/plain; charset="utf-8" From: Bibo Mao Parameter address for read and write callback in MemoryRegionOps is relative offset with base address of this MemoryRegionOps. It can be directly used as offset and offset calculation can be removed. Signed-off-by: Bibo Mao Reviewed-by: Song Gao Message-Id: <20250507023148.1877287-6-maobibo@loongson.cn> Signed-off-by: Song Gao --- hw/intc/loongarch_pch_pic.c | 34 ++++++++++++++++------------------ 1 file changed, 16 insertions(+), 18 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index f732c292f8..9b64bf938f 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -76,9 +76,8 @@ static uint64_t loongarch_pch_pic_low_readw(void *opaque,= hwaddr addr, { LoongArchPICCommonState *s =3D LOONGARCH_PIC_COMMON(opaque); uint64_t val =3D 0; - uint32_t offset =3D addr & 0xfff; =20 - switch (offset) { + switch (addr) { case PCH_PIC_INT_ID: val =3D s->id.data & UINT_MAX; break; @@ -129,13 +128,12 @@ static void loongarch_pch_pic_low_writew(void *opaque= , hwaddr addr, uint64_t value, unsigned size) { LoongArchPICCommonState *s =3D LOONGARCH_PIC_COMMON(opaque); - uint32_t offset, old_valid, data =3D (uint32_t)value; + uint32_t old_valid, data =3D (uint32_t)value; uint64_t old, int_mask; - offset =3D addr & 0xfff; =20 trace_loongarch_pch_pic_low_writew(size, addr, data); =20 - switch (offset) { + switch (addr) { case PCH_PIC_INT_MASK: old =3D s->int_mask; s->int_mask =3D get_writew_val(old, data, 0); @@ -203,9 +201,9 @@ static uint64_t loongarch_pch_pic_high_readw(void *opaq= ue, hwaddr addr, { LoongArchPICCommonState *s =3D LOONGARCH_PIC_COMMON(opaque); uint64_t val =3D 0; - uint32_t offset =3D addr + PCH_PIC_INT_STATUS; =20 - switch (offset) { + addr +=3D PCH_PIC_INT_STATUS; + switch (addr) { case PCH_PIC_INT_STATUS: val =3D (uint32_t)(s->intisr & (~s->int_mask)); break; @@ -230,12 +228,12 @@ static void loongarch_pch_pic_high_writew(void *opaqu= e, hwaddr addr, uint64_t value, unsigned size) { LoongArchPICCommonState *s =3D LOONGARCH_PIC_COMMON(opaque); - uint32_t offset, data =3D (uint32_t)value; - offset =3D addr + PCH_PIC_INT_STATUS; + uint32_t data =3D (uint32_t)value; =20 + addr +=3D PCH_PIC_INT_STATUS; trace_loongarch_pch_pic_high_writew(size, addr, data); =20 - switch (offset) { + switch (addr) { case PCH_PIC_INT_STATUS: s->intisr =3D get_writew_val(s->intisr, data, 0); break; @@ -258,18 +256,18 @@ static uint64_t loongarch_pch_pic_readb(void *opaque,= hwaddr addr, { LoongArchPICCommonState *s =3D LOONGARCH_PIC_COMMON(opaque); uint64_t val =3D 0; - uint32_t offset =3D (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY; int64_t offset_tmp; =20 - switch (offset) { + addr +=3D PCH_PIC_ROUTE_ENTRY; + switch (addr) { case PCH_PIC_HTMSI_VEC ... PCH_PIC_HTMSI_VEC_END: - offset_tmp =3D offset - PCH_PIC_HTMSI_VEC; + offset_tmp =3D addr - PCH_PIC_HTMSI_VEC; if (offset_tmp >=3D 0 && offset_tmp < 64) { val =3D s->htmsi_vector[offset_tmp]; } break; case PCH_PIC_ROUTE_ENTRY ... PCH_PIC_ROUTE_ENTRY_END: - offset_tmp =3D offset - PCH_PIC_ROUTE_ENTRY; + offset_tmp =3D addr - PCH_PIC_ROUTE_ENTRY; if (offset_tmp >=3D 0 && offset_tmp < 64) { val =3D s->route_entry[offset_tmp]; } @@ -287,19 +285,19 @@ static void loongarch_pch_pic_writeb(void *opaque, hw= addr addr, { LoongArchPICCommonState *s =3D LOONGARCH_PIC_COMMON(opaque); int32_t offset_tmp; - uint32_t offset =3D (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY; =20 + addr +=3D PCH_PIC_ROUTE_ENTRY; trace_loongarch_pch_pic_writeb(size, addr, data); =20 - switch (offset) { + switch (addr) { case PCH_PIC_HTMSI_VEC ... PCH_PIC_HTMSI_VEC_END: - offset_tmp =3D offset - PCH_PIC_HTMSI_VEC; + offset_tmp =3D addr - PCH_PIC_HTMSI_VEC; if (offset_tmp >=3D 0 && offset_tmp < 64) { s->htmsi_vector[offset_tmp] =3D (uint8_t)(data & 0xff); } break; case PCH_PIC_ROUTE_ENTRY ... PCH_PIC_ROUTE_ENTRY_END: - offset_tmp =3D offset - PCH_PIC_ROUTE_ENTRY; + offset_tmp =3D addr - PCH_PIC_ROUTE_ENTRY; if (offset_tmp >=3D 0 && offset_tmp < 64) { s->route_entry[offset_tmp] =3D (uint8_t)(data & 0xff); } --=20 2.34.1