From nobody Sat Nov 15 22:24:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1747117797; cv=none; d=zohomail.com; s=zohoarc; b=XdJ347KHkEX9pskPx7QzEFz3O5L8XdcpVPHdRY7qHz3B2rhegyLmDJLLmN0/G9Je7X8BApDVgnQiVAahsuMI//Y+8f9889Resb2L0QALSCWyaCBxLkFXClqiCPl5rPF7YOo+n8VdO/aC2sYvvR5E16JDYFWBrHbSTiabBzDJkJk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1747117797; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=7Zjm+kQUTbB5ZAbooGrzD9Iv37runvOr2Sv/yhiToVA=; b=mR89S4AqY6sXrueImY+bdgfR11Y9wog4HgIdals2JlE4qJShY75TtO6SDAIfL8yYMYEvIrE6wR4cu5u8vivWUmBoB7F5jFOgVrgr1dXRLWJw4fAH2YPbZvwGtDkDvi8EFb+92ZNdSnzer+oHljmHMpOJ0E0XeyNkFZnq4MWNSxQ= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1747117797556188.34556269411303; Mon, 12 May 2025 23:29:57 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uEj92-0002G0-ST; Tue, 13 May 2025 02:29:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uEj8t-0002E3-Dh; Tue, 13 May 2025 02:29:31 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uEj8q-0001kC-ER; Tue, 13 May 2025 02:29:31 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 13 May 2025 14:29:02 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Tue, 13 May 2025 14:29:02 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , Fabiano Rosas , Laurent Vivier , Paolo Bonzini , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , Subject: [PATCH v2 01/25] hw/misc/aspeed_hace: Remove unused code for better readability Date: Tue, 13 May 2025 14:28:31 +0800 Message-ID: <20250513062901.2256865-2-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250513062901.2256865-1-jamin_lin@aspeedtech.com> References: <20250513062901.2256865-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1747117801118116600 In the previous design of the hash framework, accumulative hashing was not supported. To work around this limitation, commit 5cd7d85 introduced an iov_cache array to store all the hash data from firmware. Once the ASPEED HACE model collected all the data, it passed the iov_cache = to the hash API to calculate the final digest. However, with commit e3c0752, the hash framework now supports accumulative hashing. This allows us to refactor the ASPEED HACE model, removing redunda= nt logic and simplifying the implementation for better readability and maintainability. As a result, the iov_count variable is no longer needed=E2=80=94it was prev= iously used to track how many cached entries were used for hashing. To maintain VMSTATE compatibility after removing this field, the VMSTATE_VE= RSION is bumped to 2 This cleanup follows significant changes in commit 4c1d0af4a28d, making the model more readable. - Deleted "iov_cache" and "iov_count" from "AspeedHACEState". - Removed "reconstruct_iov" function and related logic. - Simplified "do_hash_operation" by eliminating redundant checks. Signed-off-by: Jamin Lin --- include/hw/misc/aspeed_hace.h | 2 -- hw/misc/aspeed_hace.c | 39 ++--------------------------------- 2 files changed, 2 insertions(+), 39 deletions(-) diff --git a/include/hw/misc/aspeed_hace.h b/include/hw/misc/aspeed_hace.h index 5d4aa19cfe..b69a038d35 100644 --- a/include/hw/misc/aspeed_hace.h +++ b/include/hw/misc/aspeed_hace.h @@ -31,10 +31,8 @@ struct AspeedHACEState { MemoryRegion iomem; qemu_irq irq; =20 - struct iovec iov_cache[ASPEED_HACE_MAX_SG]; uint32_t regs[ASPEED_HACE_NR_REGS]; uint32_t total_req_len; - uint32_t iov_count; =20 MemoryRegion *dram_mr; AddressSpace dram_as; diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c index f4bff32a00..9263739ea6 100644 --- a/hw/misc/aspeed_hace.c +++ b/hw/misc/aspeed_hace.c @@ -142,25 +142,6 @@ static bool has_padding(AspeedHACEState *s, struct iov= ec *iov, return false; } =20 -static int reconstruct_iov(AspeedHACEState *s, struct iovec *iov, int id, - uint32_t *pad_offset) -{ - int i, iov_count; - if (*pad_offset !=3D 0) { - s->iov_cache[s->iov_count].iov_base =3D iov[id].iov_base; - s->iov_cache[s->iov_count].iov_len =3D *pad_offset; - ++s->iov_count; - } - for (i =3D 0; i < s->iov_count; i++) { - iov[i].iov_base =3D s->iov_cache[i].iov_base; - iov[i].iov_len =3D s->iov_cache[i].iov_len; - } - iov_count =3D s->iov_count; - s->iov_count =3D 0; - s->total_req_len =3D 0; - return iov_count; -} - static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode, bool acc_mode) { @@ -242,19 +223,6 @@ static void do_hash_operation(AspeedHACEState *s, int = algo, bool sg_mode, iov[0].iov_base =3D haddr; iov[0].iov_len =3D len; i =3D 1; - - if (s->iov_count) { - /* - * In aspeed sdk kernel driver, sg_mode is disabled in hash_fi= nal(). - * Thus if we received a request with sg_mode disabled, it is - * required to check whether cache is empty. If no, we should - * combine cached iov and the current iov. - */ - s->total_req_len +=3D len; - if (has_padding(s, iov, len, &total_msg_len, &pad_offset)) { - i =3D reconstruct_iov(s, iov, 0, &pad_offset); - } - } } =20 if (acc_mode) { @@ -278,7 +246,6 @@ static void do_hash_operation(AspeedHACEState *s, int a= lgo, bool sg_mode, qcrypto_hash_free(s->hash_ctx); =20 s->hash_ctx =3D NULL; - s->iov_count =3D 0; s->total_req_len =3D 0; } } else if (qcrypto_hash_bytesv(algo, iov, i, &digest_buf, @@ -437,7 +404,6 @@ static void aspeed_hace_reset(DeviceState *dev) } =20 memset(s->regs, 0, sizeof(s->regs)); - s->iov_count =3D 0; s->total_req_len =3D 0; } =20 @@ -469,12 +435,11 @@ static const Property aspeed_hace_properties[] =3D { =20 static const VMStateDescription vmstate_aspeed_hace =3D { .name =3D TYPE_ASPEED_HACE, - .version_id =3D 1, - .minimum_version_id =3D 1, + .version_id =3D 2, + .minimum_version_id =3D 2, .fields =3D (const VMStateField[]) { VMSTATE_UINT32_ARRAY(regs, AspeedHACEState, ASPEED_HACE_NR_REGS), VMSTATE_UINT32(total_req_len, AspeedHACEState), - VMSTATE_UINT32(iov_count, AspeedHACEState), VMSTATE_END_OF_LIST(), } }; --=20 2.43.0