From nobody Sat Nov 15 22:24:56 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1747076842; cv=none; d=zohomail.com; s=zohoarc; b=SbG2G9sJaXGrUsr2RBoEF5ri4dlt0KyJZzxS4LPyask8NW2rB6YQiIr1qBbbUZVwDUvv/RgUNCnMVcJegVXH9SeByxJ/ZMFqYMSfijRV2iuZtak/SYbfrUMW2ABu6u3feYg5Y189xJRISDorbYTGY4/AAIXlQfUIXL9QIM/Adig= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1747076842; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=PIOkXYxL2sKbGG6NEJXzvPXTFuLMkskmWg4bD0UDnoY=; b=Pk5/9IW6CiHBMISE7aor1sq8bZbalWXUDCVQmGp1nWGmPVBNPgZ17rEszNwWPkIMP5O1+1TPw6Bn4PVWBxAKT4jsguVWgJ3tKIjS7jFRdVzzCIaIonZYF0mjN/H4+2MCfd/6oJh8JE96JIkpOUsZSJPdg6DU4ClVyl0aM19I4cQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1747076842631166.36441672356625; Mon, 12 May 2025 12:07:22 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uEYTs-0006lM-6W; Mon, 12 May 2025 15:06:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uEYTW-0005bF-8k for qemu-devel@nongnu.org; Mon, 12 May 2025 15:06:10 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uEYTU-0007Wz-Fl for qemu-devel@nongnu.org; Mon, 12 May 2025 15:06:06 -0400 Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-524-TL7QBh6aPcGnNfHDtUsKeQ-1; Mon, 12 May 2025 15:06:02 -0400 Received: by mail-wm1-f69.google.com with SMTP id 5b1f17b1804b1-43d5ca7c86aso22698015e9.0 for ; Mon, 12 May 2025 12:06:02 -0700 (PDT) Received: from [192.168.122.1] ([151.95.45.141]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-442d687adc0sm134770065e9.35.2025.05.12.12.05.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 May 2025 12:05:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1747076763; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PIOkXYxL2sKbGG6NEJXzvPXTFuLMkskmWg4bD0UDnoY=; b=dha9MiSz9jyRmqy1vjwP6IRikG7AGP/VaPf9CMCcWsRCRBtZD366sWrea534f+PSMRRSot Ih44O3zWhJWgYlOwfEN7qXHIQxJlpRNjeTOdue7aRNc6Hr2XXpP+/8Ez4wRw6vSpyrLul+ Opt9eDqOAk4ZpwCOTRHr09K6oUJGTro= X-MC-Unique: TL7QBh6aPcGnNfHDtUsKeQ-1 X-Mimecast-MFC-AGG-ID: TL7QBh6aPcGnNfHDtUsKeQ_1747076761 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1747076760; x=1747681560; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PIOkXYxL2sKbGG6NEJXzvPXTFuLMkskmWg4bD0UDnoY=; b=Dzg4d1Z4J1xyiuT1UwuaAnLXbL9p1Fji4RgKMK2g6kf6fI4TPtcDMHuzOd64SVsica 6aZqjZn9kbgTCQfte6/tcA5hOmXzrit2AoJt+XYIJbTIjaBI44P05L3kDfmOF8OquriV ziGncvvaTPMU3WQr9blEc9xyJqzc0mHZljAAe6rY1xgww0Zu3DO0AdpczqamQ/DP6Z2+ fWezclz6Tn4bLn1AeE5nSy6a1rmJGjdAb7qZjvWCjFJA8k/4lTIodoDl+GdLlsYQjJiY YJUem2lzRAkd6p/gW0baRN/CYW6G6JpBPkJbfEPLfWUxaZjz9cgkTy42iWMvaTiUg+CW SvUg== X-Gm-Message-State: AOJu0YxTEH4pF9B46hg77XuYheYdxqXu7NuBx6kdk00DkCEMqYlwBEiG KnrtthPCBUEWdTmiVFXQtVL05OnGi5pG1CdLM+FKtiWWBREyXve2nh8ghQniwRShLgMff3EeoYC xzqEbSFe8aa3/yhepBd+Zu4Ymzg7vzqDd57O7MoHxYZRmsb8tuM4I/FxWCVJLR2RhKXn2sRh8bm OD9ZjQYFkaIO82f+b/odvgIFqB+K5TqEtBqcuy X-Gm-Gg: ASbGncv+ORSYaGUn46rHdBX++PVqsrIcIQrba0qY7dvQq+kmTlK9uUM13jvpa2cHl9C g6ufoDXXMXgQHzzAK6S5QuxSJtsmJF4BULf8WGkQNMk/eAJdZKjnSnTV4hYc3r3yLzwabEl2Zh6 jwIDqQu1kVgXGXM4E1hqytJbTIo3Xns5flex1MFlv3AyGD/fgRNyfud0DyL1xWKAio0fn1W7FkU gSWN5DOlF9afQnFBYAsoWqHFHLfVpPWDmFwGqgMkWGllzDKaxvpkMdFE02TwgC4lbiJCbdakagt 5DegHqn9Jxxy9D8= X-Received: by 2002:a05:600c:8211:b0:43b:c0fa:f9dd with SMTP id 5b1f17b1804b1-442d6dd22edmr102455475e9.25.1747076760449; Mon, 12 May 2025 12:06:00 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGqDYoS4+yF2xInpWEdM+EQU848BdZDvOveeRScvKQD7pFfW2odX0m8DCQGlyXLMxwNwk0S5A== X-Received: by 2002:a05:600c:8211:b0:43b:c0fa:f9dd with SMTP id 5b1f17b1804b1-442d6dd22edmr102455295e9.25.1747076759832; Mon, 12 May 2025 12:05:59 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 13/16] target/i386: remove lflags Date: Mon, 12 May 2025 21:05:21 +0200 Message-ID: <20250512190524.179419-14-pbonzini@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250512190524.179419-1-pbonzini@redhat.com> References: <20250512190524.179419-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.551, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1747076844436116600 Content-Type: text/plain; charset="utf-8" Just use cc_dst and cc_src for the same purpose. Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 6 ---- target/i386/emulate/x86_emu.c | 4 +-- target/i386/emulate/x86_flags.c | 55 ++++++++++++++++----------------- 3 files changed, 29 insertions(+), 36 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 4f8ed8868e9..c51e0a43d0b 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1805,11 +1805,6 @@ typedef struct CPUCaches { CPUCacheInfo *l3_cache; } CPUCaches; =20 -typedef struct X86LazyFlags { - target_ulong result; - target_ulong auxbits; -} X86LazyFlags; - typedef struct CPUArchState { /* standard registers */ target_ulong regs[CPU_NB_REGS]; @@ -2102,7 +2097,6 @@ typedef struct CPUArchState { QemuMutex xen_timers_lock; #endif #if defined(CONFIG_HVF) - X86LazyFlags lflags; void *emu_mmio_buf; #endif =20 diff --git a/target/i386/emulate/x86_emu.c b/target/i386/emulate/x86_emu.c index 61bd5af5bb1..4890e0a4e5e 100644 --- a/target/i386/emulate/x86_emu.c +++ b/target/i386/emulate/x86_emu.c @@ -474,10 +474,10 @@ static inline void string_rep(CPUX86State *env, struc= t x86_decode *decode, while (rcx--) { func(env, decode); write_reg(env, R_ECX, rcx, decode->addressing_size); - if ((PREFIX_REP =3D=3D rep) && !env->lflags.result) { + if ((PREFIX_REP =3D=3D rep) && !env->cc_dst) { break; } - if ((PREFIX_REPN =3D=3D rep) && env->lflags.result) { + if ((PREFIX_REPN =3D=3D rep) && env->cc_dst) { break; } } diff --git a/target/i386/emulate/x86_flags.c b/target/i386/emulate/x86_flag= s.c index 42f11d7de16..47bc19778c2 100644 --- a/target/i386/emulate/x86_flags.c +++ b/target/i386/emulate/x86_flags.c @@ -31,10 +31,10 @@ =20 /* * The algorithms here are similar to those in Bochs. After an ALU - * operation, RESULT can be used to compute ZF, SF and PF, whereas - * AUXBITS is used to compute AF, CF and OF. In reality, SF and PF are the - * XOR of the value computed from RESULT and the value found in bits 7 and= 2 - * of AUXBITS; this way the same logic can be used to compute the flags + * operation, CC_DST can be used to compute ZF, SF and PF, whereas + * CC_SRC is used to compute AF, CF and OF. In reality, SF and PF are the + * XOR of the value computed from CC_DST and the value found in bits 7 and= 2 + * of CC_SRC; this way the same logic can be used to compute the flags * both before and after an ALU operation. * * Compared to the TCG CC_OP codes, this avoids conditionals when converti= ng @@ -65,14 +65,14 @@ * place PO and CF in the top two bits. */ #define SET_FLAGS_OSZAPC_SIZE(size, lf_carries, lf_result) { \ - env->lflags.result =3D (target_ulong)(int##size##_t)(lf_result); \ + env->cc_dst =3D (target_ulong)(int##size##_t)(lf_result); \ target_ulong temp =3D (lf_carries); \ if ((size) =3D=3D TARGET_LONG_BITS) { \ temp =3D temp & ~(LF_MASK_PD | LF_MASK_SD); \ } else { \ temp =3D (temp & LF_MASK_AF) | (temp << (TARGET_LONG_BITS - (size)= )); \ } \ - env->lflags.auxbits =3D temp; \ + env->cc_src =3D temp; \ } =20 /* carries, result */ @@ -89,15 +89,15 @@ /* same as setting OSZAPC, but preserve CF and flip PO if the old value of= CF * did not match the high bit of lf_carries. */ #define SET_FLAGS_OSZAP_SIZE(size, lf_carries, lf_result) { \ - env->lflags.result =3D (target_ulong)(int##size##_t)(lf_result); \ + env->cc_dst =3D (target_ulong)(int##size##_t)(lf_result); \ target_ulong temp =3D (lf_carries); \ if ((size) =3D=3D TARGET_LONG_BITS) { \ temp =3D (temp & ~(LF_MASK_PD | LF_MASK_SD)); \ } else { \ temp =3D (temp & LF_MASK_AF) | (temp << (TARGET_LONG_BITS - (size)= )); \ } \ - target_ulong cf_changed =3D ((target_long)(env->lflags.auxbits ^ temp)= ) < 0; \ - env->lflags.auxbits =3D temp ^ (cf_changed * (LF_MASK_PO | LF_MASK_CF)= ); \ + target_ulong cf_changed =3D ((target_long)(env->cc_src ^ temp)) < 0; \ + env->cc_src =3D temp ^ (cf_changed * (LF_MASK_PO | LF_MASK_CF)); \ } =20 /* carries, result */ @@ -110,9 +110,9 @@ =20 void SET_FLAGS_OxxxxC(CPUX86State *env, bool new_of, bool new_cf) { - env->lflags.auxbits &=3D ~(LF_MASK_PO | LF_MASK_CF); - env->lflags.auxbits |=3D (-(target_ulong)new_cf << LF_BIT_PO); - env->lflags.auxbits ^=3D ((target_ulong)new_of << LF_BIT_PO); + env->cc_src &=3D ~(LF_MASK_PO | LF_MASK_CF); + env->cc_src |=3D (-(target_ulong)new_cf << LF_BIT_PO); + env->cc_src ^=3D ((target_ulong)new_of << LF_BIT_PO); } =20 void SET_FLAGS_OSZAPC_SUB32(CPUX86State *env, uint32_t v1, uint32_t v2, @@ -208,37 +208,36 @@ void SET_FLAGS_OSZAPC_LOGIC8(CPUX86State *env, uint8_= t v1, uint8_t v2, =20 static inline uint32_t get_PF(CPUX86State *env) { - uint8_t temp =3D env->lflags.result; - return ((parity8(temp) - 1) ^ env->lflags.auxbits) & CC_P; + return ((parity8(env->cc_dst) - 1) ^ env->cc_src) & CC_P; } =20 static inline uint32_t get_OF(CPUX86State *env) { - return ((env->lflags.auxbits >> (LF_BIT_CF - 11)) + CC_O / 2) & CC_O; + return ((env->cc_src >> (LF_BIT_CF - 11)) + CC_O / 2) & CC_O; } =20 bool get_CF(CPUX86State *env) { - return ((target_long)env->lflags.auxbits) < 0; + return ((target_long)env->cc_src) < 0; } =20 void set_CF(CPUX86State *env, bool val) { /* If CF changes, flip PO and CF */ target_ulong temp =3D -(target_ulong)val; - target_ulong cf_changed =3D ((target_long)(env->lflags.auxbits ^ temp)= ) < 0; - env->lflags.auxbits ^=3D cf_changed * (LF_MASK_PO | LF_MASK_CF); + target_ulong cf_changed =3D ((target_long)(env->cc_src ^ temp)) < 0; + env->cc_src ^=3D cf_changed * (LF_MASK_PO | LF_MASK_CF); } =20 static inline uint32_t get_ZF(CPUX86State *env) { - return env->lflags.result ? 0 : CC_Z; + return env->cc_dst ? 0 : CC_Z; } =20 static inline uint32_t get_SF(CPUX86State *env) { - return ((env->lflags.result >> (LF_SIGN_BIT - LF_BIT_SD)) ^ - env->lflags.auxbits) & CC_S; + return ((env->cc_dst >> (LF_SIGN_BIT - LF_BIT_SD)) ^ + env->cc_src) & CC_S; } =20 void lflags_to_rflags(CPUX86State *env) @@ -246,8 +245,8 @@ void lflags_to_rflags(CPUX86State *env) env->eflags &=3D ~(CC_C|CC_P|CC_A|CC_Z|CC_S|CC_O); /* rotate left by one to move carry-out bits into CF and AF */ env->eflags |=3D ( - (env->lflags.auxbits << 1) | - (env->lflags.auxbits >> (TARGET_LONG_BITS - 1))) & (CC_C | CC_A); + (env->cc_src << 1) | + (env->cc_src >> (TARGET_LONG_BITS - 1))) & (CC_C | CC_A); env->eflags |=3D get_SF(env); env->eflags |=3D get_PF(env); env->eflags |=3D get_ZF(env); @@ -258,17 +257,17 @@ void rflags_to_lflags(CPUX86State *env) { target_ulong cf_xor_of; =20 - env->lflags.auxbits =3D CC_P; - env->lflags.auxbits ^=3D env->eflags & (CC_S | CC_P); + env->cc_src =3D CC_P; + env->cc_src ^=3D env->eflags & (CC_S | CC_P); =20 /* rotate right by one to move CF and AF into the carry-out positions = */ - env->lflags.auxbits |=3D ( + env->cc_src |=3D ( (env->eflags >> 1) | (env->eflags << (TARGET_LONG_BITS - 1))) & (CC_C | CC_A); =20 cf_xor_of =3D (env->eflags & (CC_C | CC_O)) + (CC_O - CC_C); - env->lflags.auxbits |=3D -cf_xor_of & LF_MASK_PO; + env->cc_src |=3D -cf_xor_of & LF_MASK_PO; =20 /* Leave the low byte zero so that parity is not affected. */ - env->lflags.result =3D !(env->eflags & CC_Z) << 8; + env->cc_dst =3D !(env->eflags & CC_Z) << 8; } --=20 2.49.0