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charset="utf-8" Now that we can do so after the error code has been pushed, raising the #DB exception for task-switch traps is trivial. Signed-off-by: Paolo Bonzini --- target/i386/tcg/seg_helper.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c index cb90ccd2adc..071f3fbd83d 100644 --- a/target/i386/tcg/seg_helper.c +++ b/target/i386/tcg/seg_helper.c @@ -473,10 +473,6 @@ static void switch_tss_ra(CPUX86State *env, int tss_se= lector, new_segs[R_GS] =3D 0; new_trap =3D 0; } - /* XXX: avoid a compiler warning, see - http://support.amd.com/us/Processor_TechDocs/24593.pdf - chapters 12.2.5 and 13.2.4 on how to implement TSS Trap bit */ - (void)new_trap; =20 /* clear busy bit (it is restartable) */ if (source =3D=3D SWITCH_TSS_JMP || source =3D=3D SWITCH_TSS_IRET) { @@ -622,6 +618,11 @@ static void switch_tss_ra(CPUX86State *env, int tss_se= lector, } SET_ESP(sa.sp, sa.sp_mask); } + + if (new_trap) { + env->dr[6] |=3D DR6_BT; + raise_exception_ra(env, EXCP01_DB, retaddr); + } } =20 static void switch_tss(CPUX86State *env, int tss_selector, --=20 2.49.0