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Mon, 12 May 2025 08:33:44 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE098WxtRmT/xO07l/nrGw564wWISM+qym3s1c76k8Yg7Kgf8/TRQDrg7uva5CZW0I2tmMKDA== X-Received: by 2002:a05:600c:609b:b0:43e:ee80:c233 with SMTP id 5b1f17b1804b1-442da58fb92mr99665185e9.32.1747064024119; Mon, 12 May 2025 08:33:44 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: philmd@linaro.org, peter.maydell@linaro.org Subject: [PATCH 1/2] rust: pl011: Rename RX FIFO methods Date: Mon, 12 May 2025 17:33:36 +0200 Message-ID: <20250512153337.153954-2-pbonzini@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250512153337.153954-1-pbonzini@redhat.com> References: <20250512153337.153954-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.551, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1747064719334116600 In preparation of having a TX FIFO, rename the RX FIFO methods. This is the Rust version of commit 40871ca758cf ("hw/char/pl011: Rename RX FIFO methods"). Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Peter Maydell Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/devi= ce.rs index 7c563ade9cd..94b31659849 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -329,7 +329,7 @@ fn loopback_tx(&mut self, value: registers::Data) -> bo= ol { // hardware flow-control is enabled. // // For simplicity, the above described is not emulated. - self.loopback_enabled() && self.put_fifo(value) + self.loopback_enabled() && self.fifo_rx_put(value) } =20 #[must_use] @@ -439,7 +439,7 @@ pub fn fifo_depth(&self) -> u32 { } =20 #[must_use] - pub fn put_fifo(&mut self, value: registers::Data) -> bool { + pub fn fifo_rx_put(&mut self, value: registers::Data) -> bool { let depth =3D self.fifo_depth(); assert!(depth > 0); let slot =3D (self.read_pos + self.read_count) & (depth - 1); @@ -589,7 +589,7 @@ fn receive(&self, buf: &[u8]) { } let mut regs =3D self.regs.borrow_mut(); let c: u32 =3D buf[0].into(); - let update_irq =3D !regs.loopback_enabled() && regs.put_fifo(c.int= o()); + let update_irq =3D !regs.loopback_enabled() && regs.fifo_rx_put(c.= into()); // Release the BqlRefCell before calling self.update() drop(regs); =20 @@ -602,7 +602,7 @@ fn event(&self, event: Event) { let mut update_irq =3D false; let mut regs =3D self.regs.borrow_mut(); if event =3D=3D Event::CHR_EVENT_BREAK && !regs.loopback_enabled()= { - update_irq =3D regs.put_fifo(registers::Data::BREAK); + update_irq =3D regs.fifo_rx_put(registers::Data::BREAK); } // Release the BqlRefCell before calling self.update() drop(regs); --=20 2.49.0